Merge branches 'apple/dart', 'arm/mediatek', 'arm/omap', 'arm/smmu', 'virtio', 'x86...
authorJoerg Roedel <jroedel@suse.de>
Mon, 26 Sep 2022 13:52:31 +0000 (15:52 +0200)
committerJoerg Roedel <jroedel@suse.de>
Mon, 26 Sep 2022 13:52:31 +0000 (15:52 +0200)
15 files changed:
1  2  3  4  5  6  7  8 
MAINTAINERS
arch/arm64/Kconfig
drivers/iommu/Kconfig
drivers/iommu/amd/init.c
drivers/iommu/amd/iommu.c
drivers/iommu/apple-dart.c
drivers/iommu/intel/Kconfig
drivers/iommu/intel/iommu.c
drivers/iommu/io-pgtable-arm.c
drivers/iommu/io-pgtable.c
drivers/iommu/iommu.c
drivers/iommu/mtk_iommu.c
drivers/iommu/virtio-iommu.c
drivers/vfio/vfio_iommu_type1.c
include/linux/io-pgtable.h

diff --cc MAINTAINERS
Simple merge
Simple merge
Simple merge
Simple merge
index 65b8e4fd82177872a81b706b538014f1be75a8b7,65b8e4fd82177872a81b706b538014f1be75a8b7,65b8e4fd82177872a81b706b538014f1be75a8b7,65b8e4fd82177872a81b706b538014f1be75a8b7,65b8e4fd82177872a81b706b538014f1be75a8b7,828672a46a3d4fbcd8f23b680cb59d5f90ff284d,d72d8a3253809fe69bc6ecc391addc2c787daac7,67de9c42205af481369f9748250cdebe83b11b5e..65856e401949473b27e4399f0a32e70d1c5614ba
@@@@@@@@@ -2468,24 -2468,24 -2468,24 -2468,24 -2468,24 -2469,24 -2525,14 -2452,24 +2509,14 @@@@@@@@@ int amd_iommu_domain_enable_v2(struct i
                 * devices attached when it is switched into IOMMUv2 mode.
                 */
                ret = -EBUSY;
------ -        if (domain->dev_cnt > 0 || domain->flags & PD_IOMMUV2_MASK)
       -                goto out;
       -
       -        ret = -ENOMEM;
       -        domain->gcr3_tbl = (void *)get_zeroed_page(GFP_ATOMIC);
       -        if (domain->gcr3_tbl == NULL)
++++++ +        if (pdom->dev_cnt > 0 || pdom->flags & PD_IOMMUV2_MASK)
                        goto out;
        
------          ret = -ENOMEM;
------          domain->gcr3_tbl = (void *)get_zeroed_page(GFP_ATOMIC);
------          if (domain->gcr3_tbl == NULL)
------                  goto out;
------  
------ -        domain->glx      = levels;
------ -        domain->flags   |= PD_IOMMUV2_MASK;
------ -
------ -        amd_iommu_domain_update(domain);
------ -
------ -        ret = 0;
++++++ +        if (!pdom->gcr3_tbl)
++++++ +                ret = domain_enable_v2(pdom, pasids);
        
        out:
------ -        spin_unlock_irqrestore(&domain->lock, flags);
------ -
++++++ +        spin_unlock_irqrestore(&pdom->lock, flags);
                return ret;
        }
        EXPORT_SYMBOL(amd_iommu_domain_enable_v2);
Simple merge
index 39a06d245f12e6a422d2bab42dd28dbc60423bac,39a06d245f12e6a422d2bab42dd28dbc60423bac,39a06d245f12e6a422d2bab42dd28dbc60423bac,39a06d245f12e6a422d2bab42dd28dbc60423bac,39a06d245f12e6a422d2bab42dd28dbc60423bac,cd0ec7ed48b62a4246d93b247ac80ffea32410ad,39a06d245f12e6a422d2bab42dd28dbc60423bac,c48005147ac5ef468d86153a25bcab1f4b535e78..b7dff5092fd21c06bd73e293548d3af95c7072f6
@@@@@@@@@ -19,8 -19,8 -19,8 -19,8 -19,8 -19,10 -19,8 -19,7 +19,9 @@@@@@@@@ config INTEL_IOMM
                select DMAR_TABLE
                select SWIOTLB
                select IOASID
-------         select IOMMU_DMA
                select PCI_ATS
+++++ ++        select PCI_PRI
+++++ ++        select PCI_PASID
                help
                  DMA remapping (DMAR) devices support enables independent address
                  translations for Direct Memory Access (DMA) from devices.
index 7cca030a508e1e22603a369335d6033b385f1b90,7cca030a508e1e22603a369335d6033b385f1b90,7cca030a508e1e22603a369335d6033b385f1b90,7cca030a508e1e22603a369335d6033b385f1b90,7cca030a508e1e22603a369335d6033b385f1b90,2d142ee7bbfa7b407501454b659afdefa27056de,7cca030a508e1e22603a369335d6033b385f1b90,2c6eca037f0a76199e2bb2484fc4d884bf4c5954..a8b36c3fddf1a5c5a4a058412f63bf5429199cbc
@@@@@@@@@ -402,6 -402,6 -402,6 -402,6 -402,6 -395,29 -402,6 -390,29 +395,29 @@@@@@@@@ static inline int domain_pfn_supported(
                return !(addr_width < BITS_PER_LONG && pfn >> addr_width);
        }
        
       -        fl_sagaw = BIT(2) | (cap_fl1gp_support(iommu->cap) ? BIT(3) : 0);
+++++ + /*
+++++ +  * Calculate the Supported Adjusted Guest Address Widths of an IOMMU.
+++++ +  * Refer to 11.4.2 of the VT-d spec for the encoding of each bit of
+++++ +  * the returned SAGAW.
+++++ +  */
+++++ + static unsigned long __iommu_calculate_sagaw(struct intel_iommu *iommu)
+++++ + {
+++++ +         unsigned long fl_sagaw, sl_sagaw;
+++++ + 
+++++ ++        fl_sagaw = BIT(2) | (cap_fl5lp_support(iommu->cap) ? BIT(3) : 0);
+++++ +         sl_sagaw = cap_sagaw(iommu->cap);
+++++ + 
+++++ +         /* Second level only. */
+++++ +         if (!sm_supported(iommu) || !ecap_flts(iommu->ecap))
+++++ +                 return sl_sagaw;
+++++ + 
+++++ +         /* First level only. */
+++++ +         if (!ecap_slts(iommu->ecap))
+++++ +                 return fl_sagaw;
+++++ + 
+++++ +         return fl_sagaw & sl_sagaw;
+++++ + }
+++++ + 
        static int __iommu_calculate_agaw(struct intel_iommu *iommu, int max_gaw)
        {
                unsigned long sagaw;
@@@@@@@@@ -1341,23 -1341,23 -1341,23 -1341,23 -1341,23 -1362,21 -1341,23 -1350,24 +1362,21 @@@@@@@@@ static void __iommu_flush_iotlb(struct 
        }
        
        static struct device_domain_info *
----- --iommu_support_dev_iotlb(struct dmar_domain *domain, struct intel_iommu *iommu,
----- --                        u8 bus, u8 devfn)
+++++ ++domain_lookup_dev_info(struct dmar_domain *domain,
+++++ ++                       struct intel_iommu *iommu, u8 bus, u8 devfn)
        {
                struct device_domain_info *info;
+++++ +         unsigned long flags;
        
----- --        if (!iommu->qi)
----- --                return NULL;
----- --
----- -         spin_lock(&domain->lock);
+++++ +         spin_lock_irqsave(&domain->lock, flags);
                list_for_each_entry(info, &domain->devices, link) {
                        if (info->iommu == iommu && info->bus == bus &&
                            info->devfn == devfn) {
----- -                         spin_unlock(&domain->lock);
----- -                         return info->ats_supported ? info : NULL;
+++++ +                         spin_unlock_irqrestore(&domain->lock, flags);
       -                        return info->ats_supported ? info : NULL;
+++++ ++                        return info;
                        }
                }
----- -         spin_unlock(&domain->lock);
+++++ +         spin_unlock_irqrestore(&domain->lock, flags);
        
                return NULL;
        }
@@@@@@@@@ -1375,10 -1375,10 -1375,10 -1375,10 -1375,10 -1395,10 -1375,10 -1386,10 +1395,10 @@@@@@@@@ static void domain_update_iotlb(struct 
                        }
                }
                domain->has_iotlb_device = has_iotlb_device;
----- -         spin_unlock(&domain->lock);
+++++ +         spin_unlock_irqrestore(&domain->lock, flags);
        }
        
----- --static void iommu_enable_dev_iotlb(struct device_domain_info *info)
+++++ ++static void iommu_enable_pci_caps(struct device_domain_info *info)
        {
                struct pci_dev *pdev;
        
Simple merge
Simple merge
Simple merge
Simple merge
index 08eeafc9529fa0580da66a4e93fd8fb2b81fc52e,08eeafc9529fa0580da66a4e93fd8fb2b81fc52e,08eeafc9529fa0580da66a4e93fd8fb2b81fc52e,08eeafc9529fa0580da66a4e93fd8fb2b81fc52e,9fe723f55213fbd290a3537aecc01783e41272d9,80151176ba12832a51fbfb583cde5222c7c66da6,08eeafc9529fa0580da66a4e93fd8fb2b81fc52e,1b12825e2df12b3c3f7528c15eabe71c2b3e2eba..b7c22802f57c08a08d9a2d3cc491db86267ddea7
@@@@@@@@@ -1006,7 -1006,7 -1006,7 -1006,7 -1006,7 -1006,18 -1006,7 -1005,18 +1005,18 @@@@@@@@@ static int viommu_of_xlate(struct devic
                return iommu_fwspec_add_ids(dev, args->args, 1);
        }
        
     -  static bool viommu_capable(enum iommu_cap cap)
+++++++ static bool viommu_capable(struct device *dev, enum iommu_cap cap)
+++++ + {
+++++ +         switch (cap) {
+++++ +         case IOMMU_CAP_CACHE_COHERENCY:
+++++ +                 return true;
+++++ +         default:
+++++ +                 return false;
+++++ +         }
+++++ + }
+++++ + 
        static struct iommu_ops viommu_ops = {
+++++ +         .capable                = viommu_capable,
                .domain_alloc           = viommu_domain_alloc,
                .probe_device           = viommu_probe_device,
                .probe_finalize         = viommu_probe_finalize,
Simple merge
index b768937382cd51be2c5c4120cd9441492cf807b2,ca98aeadcc80485d6e005d66ae925c773e792fa1,ca98aeadcc80485d6e005d66ae925c773e792fa1,ca98aeadcc80485d6e005d66ae925c773e792fa1,ca98aeadcc80485d6e005d66ae925c773e792fa1,ca98aeadcc80485d6e005d66ae925c773e792fa1,ffe616db9409fe183e0977d8ad717a49843a8c66,ca98aeadcc80485d6e005d66ae925c773e792fa1..1f068dfdb140c8674348b58548961bb3ac91a3bf
@@@@@@@@@ -16,8 -16,7 -16,7 -16,7 -16,7 -16,7 -16,8 -16,7 +16,9 @@@@@@@@@ enum io_pgtable_fmt 
                ARM_V7S,
                ARM_MALI_LPAE,
                AMD_IOMMU_V1,
++++++ +        AMD_IOMMU_V2,
                APPLE_DART,
 +++++++        APPLE_DART2,
                IO_PGTABLE_NUM_FMTS,
        };