Merge branch 'x86/auditsc' of git://git.kernel.org/pub/scm/linux/kernel/git/frob...
authorLinus Torvalds <torvalds@linux-foundation.org>
Thu, 24 Jul 2008 03:39:21 +0000 (20:39 -0700)
committerLinus Torvalds <torvalds@linux-foundation.org>
Thu, 24 Jul 2008 03:39:21 +0000 (20:39 -0700)
* 'x86/auditsc' of git://git.kernel.org/pub/scm/linux/kernel/git/frob/linux-2.6-roland:
  i386 syscall audit fast-path
  x86_64 ia32 syscall audit fast-path
  x86_64 syscall audit fast-path
  x86_64: remove bogus optimization in sysret_signal

158 files changed:
Documentation/kernel-parameters.txt
MAINTAINERS
arch/arm/common/sa1111.c
arch/arm/configs/ezx_defconfig [new file with mode: 0644]
arch/arm/mach-pxa/Kconfig
arch/arm/mach-pxa/Makefile
arch/arm/mach-pxa/clock.c
arch/arm/mach-pxa/clock.h
arch/arm/mach-pxa/cm-x270-pci.c
arch/arm/mach-pxa/cm-x270-pci.h
arch/arm/mach-pxa/cm-x270.c
arch/arm/mach-pxa/corgi.c
arch/arm/mach-pxa/devices.c
arch/arm/mach-pxa/devices.h
arch/arm/mach-pxa/e400_lcd.c [new file with mode: 0644]
arch/arm/mach-pxa/e740_lcd.c [new file with mode: 0644]
arch/arm/mach-pxa/e750_lcd.c [new file with mode: 0644]
arch/arm/mach-pxa/e800_lcd.c [new file with mode: 0644]
arch/arm/mach-pxa/em-x270.c
arch/arm/mach-pxa/eseries.c
arch/arm/mach-pxa/eseries_udc.c [new file with mode: 0644]
arch/arm/mach-pxa/ezx.c [new file with mode: 0644]
arch/arm/mach-pxa/littleton.c
arch/arm/mach-pxa/lubbock.c
arch/arm/mach-pxa/magician.c
arch/arm/mach-pxa/mainstone.c
arch/arm/mach-pxa/mfp-pxa2xx.c
arch/arm/mach-pxa/palmtx.c [new file with mode: 0644]
arch/arm/mach-pxa/pcm027.c
arch/arm/mach-pxa/pcm990-baseboard.c
arch/arm/mach-pxa/poodle.c
arch/arm/mach-pxa/pxa25x.c
arch/arm/mach-pxa/pxa300.c
arch/arm/mach-pxa/pxa320.c
arch/arm/mach-pxa/pxa3xx.c
arch/arm/mach-pxa/pxa930.c [new file with mode: 0644]
arch/arm/mach-pxa/reset.c [new file with mode: 0644]
arch/arm/mach-pxa/saar.c [new file with mode: 0644]
arch/arm/mach-pxa/spitz.c
arch/arm/mach-pxa/ssp.c
arch/arm/mach-pxa/tavorevb.c [new file with mode: 0644]
arch/arm/mach-pxa/tosa-bt.c [new file with mode: 0644]
arch/arm/mach-pxa/tosa.c
arch/arm/mach-pxa/trizeps4.c
arch/arm/mach-pxa/zylonite.c
arch/arm/mach-pxa/zylonite_pxa300.c
arch/arm/mach-pxa/zylonite_pxa320.c
arch/arm/mach-sa1100/clock.c
arch/arm/mm/Makefile
arch/arm/tools/mach-types
arch/sh/boards/renesas/migor/setup.c
arch/x86/kernel/acpi/cstate.c
arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c
arch/x86/kernel/cpu/cpufreq/p4-clockmod.c
arch/x86/kernel/cpu/cpufreq/powernow-k8.c
arch/x86/kernel/cpu/cpufreq/speedstep-centrino.c
arch/x86/kernel/cpu/cpufreq/speedstep-ich.c
arch/x86/kernel/cpu/intel_cacheinfo.c
arch/x86/kernel/cpu/mcheck/mce_64.c
arch/x86/kernel/cpu/mcheck/mce_amd_64.c
arch/x86/kernel/cpu/proc.c
arch/x86/kernel/genapic_flat_64.c
arch/x86/kernel/genx2apic_uv_x.c
arch/x86/kernel/io_apic_64.c
arch/x86/kernel/ldt.c
arch/x86/kernel/microcode.c
arch/x86/kernel/reboot.c
arch/x86/kernel/signal_32.c
arch/x86/kernel/signal_64.c
arch/x86/kernel/smpboot.c
arch/x86/xen/smp.c
drivers/acpi/processor_throttling.c
drivers/base/cpu.c
drivers/cpufreq/cpufreq.c
drivers/cpufreq/cpufreq_conservative.c
drivers/cpufreq/cpufreq_ondemand.c
drivers/cpufreq/cpufreq_userspace.c
drivers/firmware/dcdbas.c
drivers/infiniband/hw/ehca/ehca_irq.c
drivers/input/keyboard/tosakbd.c
drivers/mfd/Kconfig
drivers/mfd/Makefile
drivers/mfd/mfd-core.c [new file with mode: 0644]
drivers/mfd/tc6393xb.c [new file with mode: 0644]
drivers/misc/sgi-xp/xpc_main.c
drivers/mtd/nand/cmx270_nand.c
drivers/net/smc91x.c
drivers/net/smc91x.h
drivers/pcmcia/Kconfig
drivers/pcmcia/Makefile
drivers/pcmcia/pxa2xx_cm_x270.c
drivers/pcmcia/pxa2xx_palmtx.c [new file with mode: 0644]
drivers/power/Kconfig
drivers/power/Makefile
drivers/power/palmtx_battery.c [new file with mode: 0644]
drivers/usb/gadget/pxa25x_udc.c
drivers/video/pxafb.c
include/asm-arm/arch-pxa/cm-x270.h [deleted file]
include/asm-arm/arch-pxa/eseries-gpio.h [new file with mode: 0644]
include/asm-arm/arch-pxa/eseries-irq.h [new file with mode: 0644]
include/asm-arm/arch-pxa/hardware.h
include/asm-arm/arch-pxa/irqs.h
include/asm-arm/arch-pxa/mfp-pxa2xx.h
include/asm-arm/arch-pxa/mfp-pxa930.h [new file with mode: 0644]
include/asm-arm/arch-pxa/mfp.h
include/asm-arm/arch-pxa/palmtx.h [new file with mode: 0644]
include/asm-arm/arch-pxa/pxa27x-udc.h
include/asm-arm/arch-pxa/pxa2xx_spi.h
include/asm-arm/arch-pxa/pxa3xx_nand.h
include/asm-arm/arch-pxa/pxafb.h
include/asm-arm/arch-pxa/regs-lcd.h
include/asm-arm/arch-pxa/regs-ssp.h
include/asm-arm/arch-pxa/system.h
include/asm-arm/arch-pxa/tosa.h
include/asm-arm/arch-pxa/tosa_bt.h [new file with mode: 0644]
include/asm-arm/arch-pxa/uncompress.h
include/asm-arm/arch-pxa/zylonite.h
include/asm-arm/mach/udc_pxa2xx.h
include/asm-x86/ipi.h
include/asm-x86/processor.h
include/asm-x86/thread_info.h
include/linux/cpumask.h
include/linux/cpuset.h
include/linux/mfd/core.h [new file with mode: 0644]
include/linux/mfd/tc6393xb.h [new file with mode: 0644]
include/linux/mfd/tmio.h [new file with mode: 0644]
include/linux/sched.h
include/linux/smc91x.h
init/main.c
kernel/Kconfig.hz
kernel/Makefile
kernel/cpu.c
kernel/cpuset.c
kernel/rcuclassic.c
kernel/rcupreempt.c
kernel/sched.c
kernel/sched_fair.c
kernel/sched_rt.c
kernel/softlockup.c
kernel/stop_machine.c
kernel/sysctl.c
kernel/taskstats.c
kernel/time/clocksource.c
kernel/time/tick-broadcast.c
kernel/time/tick-common.c
kernel/time/tick-sched.c
kernel/trace/trace_sysprof.c
kernel/workqueue.c
lib/Kconfig.debug
lib/cpumask.c
lib/smp_processor_id.c
mm/allocpercpu.c
mm/vmstat.c
net/core/dev.c
net/iucv/iucv.c
net/sunrpc/svc.c
sound/soc/pxa/Kconfig
sound/soc/pxa/tosa.c

index 30d44b78171a53e5dcc9e3b42d67266f61975a75..47e7d8794fc6fbad46c37edbc1d9a5bc4f6c3e82 100644 (file)
@@ -2034,6 +2034,9 @@ and is between 256 and 4096 characters. It is defined in the file
 
        snd-ymfpci=     [HW,ALSA]
 
+       softlockup_panic=
+                       [KNL] Should the soft-lockup detector generate panics.
+
        sonypi.*=       [HW] Sony Programmable I/O Control Device driver
                        See Documentation/sonypi.txt
 
index f4d78211000b2a14888490a8b47a30302d9be6cd..5d8971c76a7f31df8bda0ad2071f5738de610c93 100644 (file)
@@ -480,11 +480,28 @@ M:        kernel@wantstofly.org
 L:     linux-arm-kernel@lists.arm.linux.org.uk (subscribers-only)
 S:     Maintained
 
+ARM/COMPULAB CM-X270/EM-X270 MACHINE SUPPORT
+P:     Mike Rapoport
+M:     mike@compulab.co.il
+L:     linux-arm-kernel@lists.arm.linux.org.uk (subscribers-only)
+S:     Maintained
+
 ARM/CORGI MACHINE SUPPORT
 P:     Richard Purdie
 M:     rpurdie@rpsys.net
 S:     Maintained
 
+ARM/EZX SMARTPHONES (A780, A910, A1200, E680, ROKR E2 and ROKR E6)
+P:     Daniel Ribeiro
+M:     drwyrm@gmail.com
+P:     Stefan Schmidt
+M:     stefan@openezx.org
+P:     Harald Welte
+M:     laforge@openezx.org
+L:     openezx-devel@lists.openezx.org (subscribers-only)
+W:     http://www.openezx.org/
+S:     Maintained
+
 ARM/GLOMATION GESBC9312SX MACHINE SUPPORT
 P:     Lennert Buytenhek
 M:     kernel@wantstofly.org
@@ -572,10 +589,18 @@ L:        linux-arm-kernel@lists.arm.linux.org.uk (subscribers-only)
 S:     Maintained
 
 ARM/TOSA MACHINE SUPPORT
+P:     Dmitry Baryshkov
+M:     dbaryshkov@gmail.com
 P:     Dirk Opfer
 M:     dirk@opfer-online.de
 S:     Maintained
 
+ARM/PALMTX SUPPORT
+P:     Marek Vasut
+M:     marek.vasut@gmail.com
+W:     http://hackndev.com
+S:     Maintained
+
 ARM/PLEB SUPPORT
 P:     Peter Chubb
 M:     pleb@gelato.unsw.edu.au
index c8e8f0ea59e1b2ce146da5effe3f6ebada19df6d..0a8e1ff2af8a99255b0f419d6b7b82f7fe5721a9 100644 (file)
@@ -627,7 +627,7 @@ __sa1111_probe(struct device *me, struct resource *mem, int irq)
        if (!sachip)
                return -ENOMEM;
 
-       sachip->clk = clk_get(me, "GPIO27_CLK");
+       sachip->clk = clk_get(me, "SA1111_CLK");
        if (!sachip->clk) {
                ret = PTR_ERR(sachip->clk);
                goto err_free;
diff --git a/arch/arm/configs/ezx_defconfig b/arch/arm/configs/ezx_defconfig
new file mode 100644 (file)
index 0000000..2a84d55
--- /dev/null
@@ -0,0 +1,1614 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.26-rc3
+# Mon Jul  7 17:52:21 2008
+#
+CONFIG_ARM=y
+CONFIG_HAVE_PWM=y
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+CONFIG_GENERIC_GPIO=y
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_MMU=y
+# CONFIG_NO_IOPORT is not set
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_ARCH_SUPPORTS_AOUT=y
+CONFIG_ZONE_DMA=y
+CONFIG_ARCH_MTD_XIP=y
+CONFIG_VECTORS_BASE=0xffff0000
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_LOCK_KERNEL=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION="-ezxdev"
+# CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_POSIX_MQUEUE is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_CGROUPS is not set
+CONFIG_GROUP_SCHED=y
+CONFIG_FAIR_GROUP_SCHED=y
+# CONFIG_RT_GROUP_SCHED is not set
+CONFIG_USER_SCHED=y
+# CONFIG_CGROUP_SCHED is not set
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_RELAY is not set
+# CONFIG_NAMESPACES is not set
+# CONFIG_BLK_DEV_INITRD is not set
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+CONFIG_EMBEDDED=y
+CONFIG_UID16=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_SYSCTL_SYSCALL_CHECK=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+# CONFIG_COMPAT_BRK is not set
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_ANON_INODES=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_SLAB=y
+# CONFIG_SLUB is not set
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+# CONFIG_HAVE_DMA_ATTRS is not set
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+CONFIG_MODULE_FORCE_UNLOAD=y
+CONFIG_MODVERSIONS=y
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_KMOD=y
+CONFIG_BLOCK=y
+# CONFIG_LBD is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_LSF is not set
+# CONFIG_BLK_DEV_BSG is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+# CONFIG_IOSCHED_AS is not set
+CONFIG_IOSCHED_DEADLINE=y
+# CONFIG_IOSCHED_CFQ is not set
+# CONFIG_DEFAULT_AS is not set
+CONFIG_DEFAULT_DEADLINE=y
+# CONFIG_DEFAULT_CFQ is not set
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="deadline"
+CONFIG_CLASSIC_RCU=y
+
+#
+# System Type
+#
+# CONFIG_ARCH_AAEC2000 is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_REALVIEW is not set
+# CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_AT91 is not set
+# CONFIG_ARCH_CLPS7500 is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_CO285 is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_EP93XX is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_NETX is not set
+# CONFIG_ARCH_H720X is not set
+# CONFIG_ARCH_IMX is not set
+# CONFIG_ARCH_IOP13XX is not set
+# CONFIG_ARCH_IOP32X is not set
+# CONFIG_ARCH_IOP33X is not set
+# CONFIG_ARCH_IXP23XX is not set
+# CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_KS8695 is not set
+# CONFIG_ARCH_NS9XXX is not set
+# CONFIG_ARCH_MXC is not set
+# CONFIG_ARCH_ORION5X is not set
+# CONFIG_ARCH_PNX4008 is not set
+CONFIG_ARCH_PXA=y
+# CONFIG_ARCH_RPC is not set
+# CONFIG_ARCH_SA1100 is not set
+# CONFIG_ARCH_S3C2410 is not set
+# CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_DAVINCI is not set
+# CONFIG_ARCH_OMAP is not set
+# CONFIG_ARCH_MSM7X00A is not set
+
+#
+# Intel PXA2xx/PXA3xx Implementations
+#
+# CONFIG_ARCH_GUMSTIX is not set
+# CONFIG_ARCH_LUBBOCK is not set
+# CONFIG_MACH_LOGICPD_PXA270 is not set
+# CONFIG_MACH_MAINSTONE is not set
+# CONFIG_ARCH_PXA_IDP is not set
+# CONFIG_PXA_SHARPSL is not set
+# CONFIG_ARCH_PXA_ESERIES is not set
+# CONFIG_MACH_TRIZEPS4 is not set
+# CONFIG_MACH_EM_X270 is not set
+# CONFIG_MACH_COLIBRI is not set
+# CONFIG_MACH_ZYLONITE is not set
+# CONFIG_MACH_LITTLETON is not set
+# CONFIG_MACH_ARMCORE is not set
+# CONFIG_MACH_MAGICIAN is not set
+# CONFIG_MACH_PCM027 is not set
+CONFIG_PXA_EZX=y
+CONFIG_MACH_EZX_A780=y
+CONFIG_MACH_EZX_E680=y
+CONFIG_MACH_EZX_A1200=y
+CONFIG_MACH_EZX_A910=y
+CONFIG_MACH_EZX_E6=y
+CONFIG_MACH_EZX_E2=y
+CONFIG_PXA27x=y
+CONFIG_PXA_SSP=y
+CONFIG_PXA_PWM=y
+
+#
+# Boot options
+#
+
+#
+# Power management
+#
+
+#
+# Processor Type
+#
+CONFIG_CPU_32=y
+CONFIG_CPU_XSCALE=y
+CONFIG_CPU_32v5=y
+CONFIG_CPU_ABRT_EV5T=y
+CONFIG_CPU_PABRT_NOIFAR=y
+CONFIG_CPU_CACHE_VIVT=y
+CONFIG_CPU_TLB_V4WBI=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
+
+#
+# Processor Features
+#
+CONFIG_ARM_THUMB=y
+# CONFIG_CPU_DCACHE_DISABLE is not set
+# CONFIG_OUTER_CACHE is not set
+CONFIG_IWMMXT=y
+CONFIG_XSCALE_PMU=y
+
+#
+# Bus support
+#
+# CONFIG_PCI_SYSCALL is not set
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCCARD is not set
+
+#
+# Kernel Features
+#
+CONFIG_TICK_ONESHOT=y
+# CONFIG_NO_HZ is not set
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+CONFIG_PREEMPT=y
+CONFIG_HZ=100
+CONFIG_AEABI=y
+CONFIG_OABI_COMPAT=y
+# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+# CONFIG_SPARSEMEM_STATIC is not set
+# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4096
+# CONFIG_RESOURCES_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=1
+CONFIG_BOUNCE=y
+CONFIG_VIRT_TO_BUS=y
+CONFIG_ALIGNMENT_TRAP=y
+
+#
+# Boot options
+#
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_CMDLINE="console=tty1 root=/dev/mmcblk0p2 rootfstype=ext2 rootdelay=1 ip=192.168.0.202:192.168.0.200:192.168.0.200:255.255.255.0 debug"
+# CONFIG_XIP_KERNEL is not set
+CONFIG_KEXEC=y
+CONFIG_ATAGS_PROC=y
+
+#
+# CPU Frequency scaling
+#
+# CONFIG_CPU_FREQ is not set
+
+#
+# Floating point emulation
+#
+
+#
+# At least one emulation must be selected
+#
+CONFIG_FPE_NWFPE=y
+# CONFIG_FPE_NWFPE_XP is not set
+# CONFIG_FPE_FASTFPE is not set
+
+#
+# Userspace binary formats
+#
+CONFIG_BINFMT_ELF=y
+CONFIG_BINFMT_AOUT=m
+CONFIG_BINFMT_MISC=m
+
+#
+# Power management options
+#
+CONFIG_PM=y
+# CONFIG_PM_DEBUG is not set
+CONFIG_PM_SLEEP=y
+CONFIG_SUSPEND=y
+CONFIG_SUSPEND_FREEZER=y
+CONFIG_APM_EMULATION=y
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+
+#
+# Networking
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+CONFIG_PACKET_MMAP=y
+CONFIG_UNIX=y
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_MIGRATE is not set
+# CONFIG_XFRM_STATISTICS is not set
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+CONFIG_IP_PNP_RARP=y
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+CONFIG_SYN_COOKIES=y
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+CONFIG_INET_TUNNEL=m
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+# CONFIG_INET_DIAG is not set
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IP_VS is not set
+CONFIG_IPV6=m
+# CONFIG_IPV6_PRIVACY is not set
+# CONFIG_IPV6_ROUTER_PREF is not set
+# CONFIG_IPV6_OPTIMISTIC_DAD is not set
+CONFIG_INET6_AH=m
+CONFIG_INET6_ESP=m
+CONFIG_INET6_IPCOMP=m
+CONFIG_IPV6_MIP6=m
+CONFIG_INET6_XFRM_TUNNEL=m
+CONFIG_INET6_TUNNEL=m
+CONFIG_INET6_XFRM_MODE_TRANSPORT=m
+CONFIG_INET6_XFRM_MODE_TUNNEL=m
+CONFIG_INET6_XFRM_MODE_BEET=m
+# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
+CONFIG_IPV6_SIT=m
+CONFIG_IPV6_NDISC_NODETYPE=y
+CONFIG_IPV6_TUNNEL=m
+CONFIG_IPV6_MULTIPLE_TABLES=y
+CONFIG_IPV6_SUBTREES=y
+# CONFIG_IPV6_MROUTE is not set
+# CONFIG_NETWORK_SECMARK is not set
+CONFIG_NETFILTER=y
+# CONFIG_NETFILTER_DEBUG is not set
+CONFIG_NETFILTER_ADVANCED=y
+CONFIG_BRIDGE_NETFILTER=y
+
+#
+# Core Netfilter Configuration
+#
+CONFIG_NETFILTER_NETLINK=m
+CONFIG_NETFILTER_NETLINK_QUEUE=m
+CONFIG_NETFILTER_NETLINK_LOG=m
+CONFIG_NF_CONNTRACK=m
+CONFIG_NF_CT_ACCT=y
+CONFIG_NF_CONNTRACK_MARK=y
+CONFIG_NF_CONNTRACK_EVENTS=y
+# CONFIG_NF_CT_PROTO_DCCP is not set
+CONFIG_NF_CT_PROTO_GRE=m
+CONFIG_NF_CT_PROTO_SCTP=m
+CONFIG_NF_CT_PROTO_UDPLITE=m
+CONFIG_NF_CONNTRACK_AMANDA=m
+CONFIG_NF_CONNTRACK_FTP=m
+CONFIG_NF_CONNTRACK_H323=m
+CONFIG_NF_CONNTRACK_IRC=m
+CONFIG_NF_CONNTRACK_NETBIOS_NS=m
+CONFIG_NF_CONNTRACK_PPTP=m
+CONFIG_NF_CONNTRACK_SANE=m
+CONFIG_NF_CONNTRACK_SIP=m
+CONFIG_NF_CONNTRACK_TFTP=m
+CONFIG_NF_CT_NETLINK=m
+CONFIG_NETFILTER_XTABLES=m
+CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
+# CONFIG_NETFILTER_XT_TARGET_CONNMARK is not set
+# CONFIG_NETFILTER_XT_TARGET_DSCP is not set
+CONFIG_NETFILTER_XT_TARGET_MARK=m
+CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
+CONFIG_NETFILTER_XT_TARGET_NFLOG=m
+# CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set
+# CONFIG_NETFILTER_XT_TARGET_RATEEST is not set
+# CONFIG_NETFILTER_XT_TARGET_TRACE is not set
+CONFIG_NETFILTER_XT_TARGET_TCPMSS=m
+# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set
+CONFIG_NETFILTER_XT_MATCH_COMMENT=m
+CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m
+CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m
+CONFIG_NETFILTER_XT_MATCH_CONNMARK=m
+CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
+CONFIG_NETFILTER_XT_MATCH_DCCP=m
+CONFIG_NETFILTER_XT_MATCH_DSCP=m
+CONFIG_NETFILTER_XT_MATCH_ESP=m
+CONFIG_NETFILTER_XT_MATCH_HELPER=m
+# CONFIG_NETFILTER_XT_MATCH_IPRANGE is not set
+CONFIG_NETFILTER_XT_MATCH_LENGTH=m
+CONFIG_NETFILTER_XT_MATCH_LIMIT=m
+CONFIG_NETFILTER_XT_MATCH_MAC=m
+CONFIG_NETFILTER_XT_MATCH_MARK=m
+# CONFIG_NETFILTER_XT_MATCH_OWNER is not set
+CONFIG_NETFILTER_XT_MATCH_POLICY=m
+CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
+# CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set
+CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
+CONFIG_NETFILTER_XT_MATCH_QUOTA=m
+# CONFIG_NETFILTER_XT_MATCH_RATEEST is not set
+CONFIG_NETFILTER_XT_MATCH_REALM=m
+CONFIG_NETFILTER_XT_MATCH_SCTP=m
+CONFIG_NETFILTER_XT_MATCH_STATE=m
+CONFIG_NETFILTER_XT_MATCH_STATISTIC=m
+CONFIG_NETFILTER_XT_MATCH_STRING=m
+CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
+CONFIG_NETFILTER_XT_MATCH_TIME=m
+CONFIG_NETFILTER_XT_MATCH_U32=m
+CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m
+
+#
+# IP: Netfilter Configuration
+#
+CONFIG_NF_CONNTRACK_IPV4=m
+CONFIG_NF_CONNTRACK_PROC_COMPAT=y
+CONFIG_IP_NF_QUEUE=m
+CONFIG_IP_NF_IPTABLES=m
+CONFIG_IP_NF_MATCH_RECENT=m
+CONFIG_IP_NF_MATCH_ECN=m
+CONFIG_IP_NF_MATCH_AH=m
+CONFIG_IP_NF_MATCH_TTL=m
+CONFIG_IP_NF_MATCH_ADDRTYPE=m
+CONFIG_IP_NF_FILTER=m
+CONFIG_IP_NF_TARGET_REJECT=m
+CONFIG_IP_NF_TARGET_LOG=m
+CONFIG_IP_NF_TARGET_ULOG=m
+CONFIG_NF_NAT=m
+CONFIG_NF_NAT_NEEDED=y
+CONFIG_IP_NF_TARGET_MASQUERADE=m
+CONFIG_IP_NF_TARGET_REDIRECT=m
+CONFIG_IP_NF_TARGET_NETMAP=m
+CONFIG_NF_NAT_SNMP_BASIC=m
+CONFIG_NF_NAT_PROTO_GRE=m
+CONFIG_NF_NAT_PROTO_UDPLITE=m
+CONFIG_NF_NAT_PROTO_SCTP=m
+CONFIG_NF_NAT_FTP=m
+CONFIG_NF_NAT_IRC=m
+CONFIG_NF_NAT_TFTP=m
+CONFIG_NF_NAT_AMANDA=m
+CONFIG_NF_NAT_PPTP=m
+CONFIG_NF_NAT_H323=m
+CONFIG_NF_NAT_SIP=m
+CONFIG_IP_NF_MANGLE=m
+CONFIG_IP_NF_TARGET_ECN=m
+CONFIG_IP_NF_TARGET_TTL=m
+CONFIG_IP_NF_TARGET_CLUSTERIP=m
+CONFIG_IP_NF_RAW=m
+CONFIG_IP_NF_ARPTABLES=m
+CONFIG_IP_NF_ARPFILTER=m
+CONFIG_IP_NF_ARP_MANGLE=m
+
+#
+# IPv6: Netfilter Configuration
+#
+CONFIG_NF_CONNTRACK_IPV6=m
+CONFIG_IP6_NF_QUEUE=m
+CONFIG_IP6_NF_IPTABLES=m
+CONFIG_IP6_NF_MATCH_RT=m
+CONFIG_IP6_NF_MATCH_OPTS=m
+CONFIG_IP6_NF_MATCH_FRAG=m
+CONFIG_IP6_NF_MATCH_HL=m
+CONFIG_IP6_NF_MATCH_IPV6HEADER=m
+CONFIG_IP6_NF_MATCH_AH=m
+CONFIG_IP6_NF_MATCH_MH=m
+CONFIG_IP6_NF_MATCH_EUI64=m
+CONFIG_IP6_NF_FILTER=m
+CONFIG_IP6_NF_TARGET_LOG=m
+CONFIG_IP6_NF_TARGET_REJECT=m
+CONFIG_IP6_NF_MANGLE=m
+CONFIG_IP6_NF_TARGET_HL=m
+CONFIG_IP6_NF_RAW=m
+
+#
+# Bridge: Netfilter Configuration
+#
+# CONFIG_BRIDGE_NF_EBTABLES is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+CONFIG_BRIDGE=m
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+CONFIG_LLC=m
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_SCHED is not set
+CONFIG_NET_CLS_ROUTE=y
+CONFIG_NET_SCH_FIFO=y
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+CONFIG_BT=y
+CONFIG_BT_L2CAP=m
+CONFIG_BT_SCO=y
+CONFIG_BT_RFCOMM=m
+CONFIG_BT_RFCOMM_TTY=y
+CONFIG_BT_BNEP=m
+CONFIG_BT_BNEP_MC_FILTER=y
+CONFIG_BT_BNEP_PROTO_FILTER=y
+CONFIG_BT_HIDP=m
+
+#
+# Bluetooth device drivers
+#
+# CONFIG_BT_HCIUSB is not set
+# CONFIG_BT_HCIBTUSB is not set
+# CONFIG_BT_HCIBTSDIO is not set
+CONFIG_BT_HCIUART=y
+CONFIG_BT_HCIUART_H4=y
+# CONFIG_BT_HCIUART_BCSP is not set
+# CONFIG_BT_HCIUART_LL is not set
+# CONFIG_BT_HCIBCM203X is not set
+# CONFIG_BT_HCIBPA10X is not set
+# CONFIG_BT_HCIBFUSB is not set
+# CONFIG_BT_HCIVHCI is not set
+# CONFIG_AF_RXRPC is not set
+CONFIG_FIB_RULES=y
+
+#
+# Wireless
+#
+CONFIG_CFG80211=m
+CONFIG_NL80211=y
+CONFIG_WIRELESS_EXT=y
+CONFIG_MAC80211=m
+
+#
+# Rate control algorithm selection
+#
+CONFIG_MAC80211_RC_DEFAULT_PID=y
+# CONFIG_MAC80211_RC_DEFAULT_NONE is not set
+
+#
+# Selecting 'y' for an algorithm will
+#
+
+#
+# build the algorithm into mac80211.
+#
+CONFIG_MAC80211_RC_DEFAULT="pid"
+CONFIG_MAC80211_RC_PID=y
+# CONFIG_MAC80211_MESH is not set
+CONFIG_MAC80211_LEDS=y
+# CONFIG_MAC80211_DEBUG_PACKET_ALIGNMENT is not set
+# CONFIG_MAC80211_DEBUG is not set
+CONFIG_IEEE80211=m
+# CONFIG_IEEE80211_DEBUG is not set
+CONFIG_IEEE80211_CRYPT_WEP=m
+CONFIG_IEEE80211_CRYPT_CCMP=m
+CONFIG_IEEE80211_CRYPT_TKIP=m
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=m
+# CONFIG_SYS_HYPERVISOR is not set
+CONFIG_CONNECTOR=m
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_CONCAT is not set
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_REDBOOT_PARTS is not set
+# CONFIG_MTD_CMDLINE_PARTS is not set
+# CONFIG_MTD_AFS_PARTS is not set
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+# CONFIG_MTD_BLKDEVS is not set
+# CONFIG_MTD_BLOCK is not set
+# CONFIG_MTD_BLOCK_RO is not set
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+CONFIG_MTD_CFI_ADV_OPTIONS=y
+CONFIG_MTD_CFI_NOSWAP=y
+# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
+# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
+CONFIG_MTD_CFI_GEOMETRY=y
+# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+# CONFIG_MTD_CFI_I2 is not set
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_OTP is not set
+CONFIG_MTD_CFI_INTELEXT=y
+# CONFIG_MTD_CFI_AMDSTD is not set
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+CONFIG_MTD_XIP=y
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+CONFIG_MTD_PHYSMAP=y
+CONFIG_MTD_PHYSMAP_START=0x0
+CONFIG_MTD_PHYSMAP_LEN=0x0
+CONFIG_MTD_PHYSMAP_BANKWIDTH=2
+# CONFIG_MTD_PXA2XX is not set
+# CONFIG_MTD_ARM_INTEGRATOR is not set
+# CONFIG_MTD_SHARP_SL is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_DATAFLASH is not set
+# CONFIG_MTD_M25P80 is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+# CONFIG_MTD_NAND is not set
+# CONFIG_MTD_ONENAND is not set
+
+#
+# UBI - Unsorted block images
+#
+# CONFIG_MTD_UBI is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=m
+CONFIG_BLK_DEV_CRYPTOLOOP=m
+CONFIG_BLK_DEV_NBD=m
+# CONFIG_BLK_DEV_UB is not set
+CONFIG_BLK_DEV_RAM=m
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=4096
+# CONFIG_BLK_DEV_XIP is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+CONFIG_MISC_DEVICES=y
+# CONFIG_EEPROM_93CX6 is not set
+# CONFIG_ENCLOSURE_SERVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+# CONFIG_SCSI is not set
+# CONFIG_SCSI_DMA is not set
+# CONFIG_SCSI_NETLINK is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+CONFIG_NETDEVICES=y
+# CONFIG_NETDEVICES_MULTIQUEUE is not set
+CONFIG_DUMMY=y
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+# CONFIG_NET_ETHERNET is not set
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
+
+#
+# Wireless LAN
+#
+# CONFIG_WLAN_PRE80211 is not set
+# CONFIG_WLAN_80211 is not set
+# CONFIG_IWLWIFI_LEDS is not set
+
+#
+# USB Network Adapters
+#
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_RTL8150 is not set
+# CONFIG_USB_USBNET is not set
+# CONFIG_WAN is not set
+CONFIG_PPP=m
+CONFIG_PPP_MULTILINK=y
+CONFIG_PPP_FILTER=y
+CONFIG_PPP_ASYNC=m
+CONFIG_PPP_SYNC_TTY=m
+CONFIG_PPP_DEFLATE=m
+CONFIG_PPP_BSDCOMP=m
+# CONFIG_PPP_MPPE is not set
+# CONFIG_PPPOE is not set
+# CONFIG_PPPOL2TP is not set
+# CONFIG_SLIP is not set
+CONFIG_SLHC=m
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+
+#
+# Userland interfaces
+#
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_JOYDEV is not set
+CONFIG_INPUT_EVDEV=y
+# CONFIG_INPUT_EVBUG is not set
+# CONFIG_INPUT_APMPOWER is not set
+
+#
+# Input Device Drivers
+#
+CONFIG_INPUT_KEYBOARD=y
+# CONFIG_KEYBOARD_ATKBD is not set
+# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_KEYBOARD_LKKBD is not set
+# CONFIG_KEYBOARD_XTKBD is not set
+# CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_STOWAWAY is not set
+CONFIG_KEYBOARD_PXA27x=y
+CONFIG_KEYBOARD_GPIO=y
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+CONFIG_INPUT_TOUCHSCREEN=y
+# CONFIG_TOUCHSCREEN_ADS7846 is not set
+# CONFIG_TOUCHSCREEN_FUJITSU is not set
+# CONFIG_TOUCHSCREEN_GUNZE is not set
+# CONFIG_TOUCHSCREEN_ELO is not set
+# CONFIG_TOUCHSCREEN_MTOUCH is not set
+# CONFIG_TOUCHSCREEN_MK712 is not set
+# CONFIG_TOUCHSCREEN_PENMOUNT is not set
+# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
+# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
+# CONFIG_TOUCHSCREEN_UCB1400 is not set
+# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
+CONFIG_TOUCHSCREEN_PCAP=y
+CONFIG_INPUT_MISC=y
+# CONFIG_INPUT_ATI_REMOTE is not set
+# CONFIG_INPUT_ATI_REMOTE2 is not set
+# CONFIG_INPUT_KEYSPAN_REMOTE is not set
+# CONFIG_INPUT_POWERMATE is not set
+# CONFIG_INPUT_YEALINK is not set
+CONFIG_INPUT_UINPUT=y
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+CONFIG_DEVKMEM=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_PXA=y
+CONFIG_SERIAL_PXA_CONSOLE=y
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=8
+# CONFIG_IPMI_HANDLER is not set
+CONFIG_HW_RANDOM=y
+# CONFIG_NVRAM is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_CHARDEV=y
+
+#
+# I2C Hardware Bus support
+#
+# CONFIG_I2C_GPIO is not set
+CONFIG_I2C_PXA=y
+# CONFIG_I2C_PXA_SLAVE is not set
+# CONFIG_I2C_OCORES is not set
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_TAOS_EVM is not set
+# CONFIG_I2C_STUB is not set
+# CONFIG_I2C_TINY_USB is not set
+# CONFIG_I2C_PCA_PLATFORM is not set
+
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_DS1682 is not set
+# CONFIG_SENSORS_EEPROM is not set
+# CONFIG_SENSORS_PCF8574 is not set
+# CONFIG_PCF8575 is not set
+# CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_TPS65010 is not set
+# CONFIG_SENSORS_MAX6875 is not set
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+CONFIG_SPI=y
+CONFIG_SPI_MASTER=y
+
+#
+# SPI Master Controller Drivers
+#
+# CONFIG_SPI_BITBANG is not set
+CONFIG_SPI_PXA2XX=m
+
+#
+# SPI Protocol Masters
+#
+# CONFIG_SPI_AT25 is not set
+# CONFIG_SPI_SPIDEV is not set
+# CONFIG_SPI_TLE62X0 is not set
+CONFIG_HAVE_GPIO_LIB=y
+
+#
+# GPIO Support
+#
+
+#
+# I2C GPIO expanders:
+#
+# CONFIG_GPIO_PCA953X is not set
+# CONFIG_GPIO_PCF857X is not set
+
+#
+# SPI GPIO expanders:
+#
+# CONFIG_GPIO_MCP23S08 is not set
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_WATCHDOG is not set
+
+#
+# Sonics Silicon Backplane
+#
+CONFIG_SSB_POSSIBLE=y
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_MFD_ASIC3 is not set
+# CONFIG_HTC_EGPIO is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_MFD_TC6393XB is not set
+CONFIG_EZX_PCAP=y
+
+#
+# Multimedia devices
+#
+
+#
+# Multimedia core support
+#
+CONFIG_VIDEO_DEV=m
+CONFIG_VIDEO_V4L2_COMMON=m
+CONFIG_VIDEO_ALLOW_V4L1=y
+CONFIG_VIDEO_V4L1_COMPAT=y
+# CONFIG_DVB_CORE is not set
+CONFIG_VIDEO_MEDIA=m
+
+#
+# Multimedia drivers
+#
+# CONFIG_MEDIA_ATTACH is not set
+CONFIG_MEDIA_TUNER=m
+# CONFIG_MEDIA_TUNER_CUSTOMIZE is not set
+CONFIG_MEDIA_TUNER_SIMPLE=m
+CONFIG_MEDIA_TUNER_TDA8290=m
+CONFIG_MEDIA_TUNER_TDA9887=m
+CONFIG_MEDIA_TUNER_TEA5761=m
+CONFIG_MEDIA_TUNER_TEA5767=m
+CONFIG_MEDIA_TUNER_MT20XX=m
+CONFIG_MEDIA_TUNER_XC2028=m
+CONFIG_MEDIA_TUNER_XC5000=m
+CONFIG_VIDEO_V4L2=m
+CONFIG_VIDEO_V4L1=m
+CONFIG_VIDEO_CAPTURE_DRIVERS=y
+# CONFIG_VIDEO_ADV_DEBUG is not set
+CONFIG_VIDEO_HELPER_CHIPS_AUTO=y
+# CONFIG_VIDEO_VIVI is not set
+# CONFIG_VIDEO_CPIA is not set
+# CONFIG_VIDEO_CPIA2 is not set
+# CONFIG_VIDEO_SAA5246A is not set
+# CONFIG_VIDEO_SAA5249 is not set
+# CONFIG_TUNER_3036 is not set
+# CONFIG_V4L_USB_DRIVERS is not set
+# CONFIG_SOC_CAMERA is not set
+# CONFIG_VIDEO_PXA27x is not set
+CONFIG_RADIO_ADAPTERS=y
+# CONFIG_USB_DSBR is not set
+# CONFIG_USB_SI470X is not set
+# CONFIG_DAB is not set
+
+#
+# Graphics support
+#
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+CONFIG_FB=y
+# CONFIG_FIRMWARE_EDID is not set
+# CONFIG_FB_DDC is not set
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
+# CONFIG_FB_SYS_FILLRECT is not set
+# CONFIG_FB_SYS_COPYAREA is not set
+# CONFIG_FB_SYS_IMAGEBLIT is not set
+# CONFIG_FB_FOREIGN_ENDIAN is not set
+# CONFIG_FB_SYS_FOPS is not set
+# CONFIG_FB_SVGALIB is not set
+# CONFIG_FB_MACMODES is not set
+# CONFIG_FB_BACKLIGHT is not set
+# CONFIG_FB_MODE_HELPERS is not set
+# CONFIG_FB_TILEBLITTING is not set
+
+#
+# Frame buffer hardware drivers
+#
+# CONFIG_FB_UVESA is not set
+# CONFIG_FB_S1D13XXX is not set
+CONFIG_FB_PXA=y
+# CONFIG_FB_PXA_SMARTPANEL is not set
+CONFIG_FB_PXA_PARAMETERS=y
+# CONFIG_FB_MBX is not set
+# CONFIG_FB_AM200EPD is not set
+# CONFIG_FB_VIRTUAL is not set
+CONFIG_BACKLIGHT_LCD_SUPPORT=y
+# CONFIG_LCD_CLASS_DEVICE is not set
+CONFIG_BACKLIGHT_CLASS_DEVICE=y
+# CONFIG_BACKLIGHT_CORGI is not set
+CONFIG_BACKLIGHT_PWM=y
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
+# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
+CONFIG_FONTS=y
+# CONFIG_FONT_8x8 is not set
+# CONFIG_FONT_8x16 is not set
+# CONFIG_FONT_6x11 is not set
+# CONFIG_FONT_7x14 is not set
+# CONFIG_FONT_PEARL_8x8 is not set
+# CONFIG_FONT_ACORN_8x8 is not set
+CONFIG_FONT_MINI_4x6=y
+# CONFIG_FONT_SUN8x16 is not set
+# CONFIG_FONT_SUN12x22 is not set
+# CONFIG_FONT_10x18 is not set
+# CONFIG_LOGO is not set
+
+#
+# Sound
+#
+CONFIG_SOUND=y
+
+#
+# Advanced Linux Sound Architecture
+#
+CONFIG_SND=y
+CONFIG_SND_TIMER=y
+CONFIG_SND_PCM=y
+# CONFIG_SND_SEQUENCER is not set
+CONFIG_SND_OSSEMUL=y
+CONFIG_SND_MIXER_OSS=y
+CONFIG_SND_PCM_OSS=y
+CONFIG_SND_PCM_OSS_PLUGINS=y
+# CONFIG_SND_DYNAMIC_MINORS is not set
+CONFIG_SND_SUPPORT_OLD_API=y
+CONFIG_SND_VERBOSE_PROCFS=y
+# CONFIG_SND_VERBOSE_PRINTK is not set
+# CONFIG_SND_DEBUG is not set
+
+#
+# Generic devices
+#
+# CONFIG_SND_DUMMY is not set
+# CONFIG_SND_MTPAV is not set
+# CONFIG_SND_SERIAL_U16550 is not set
+# CONFIG_SND_MPU401 is not set
+
+#
+# ALSA ARM devices
+#
+# CONFIG_SND_PXA2XX_AC97 is not set
+
+#
+# SPI devices
+#
+
+#
+# USB devices
+#
+# CONFIG_SND_USB_AUDIO is not set
+# CONFIG_SND_USB_CAIAQ is not set
+
+#
+# System on Chip audio support
+#
+CONFIG_SND_SOC=y
+CONFIG_SND_PXA2XX_SOC=y
+
+#
+# ALSA SoC audio for Freescale SOCs
+#
+
+#
+# SoC Audio for the Texas Instruments OMAP
+#
+
+#
+# Open Sound System
+#
+# CONFIG_SOUND_PRIME is not set
+CONFIG_HID_SUPPORT=y
+CONFIG_HID=y
+# CONFIG_HID_DEBUG is not set
+# CONFIG_HIDRAW is not set
+
+#
+# USB Input Devices
+#
+# CONFIG_USB_HID is not set
+
+#
+# USB HID Boot Protocol drivers
+#
+# CONFIG_USB_KBD is not set
+# CONFIG_USB_MOUSE is not set
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+# CONFIG_USB_ARCH_HAS_EHCI is not set
+CONFIG_USB=y
+# CONFIG_USB_DEBUG is not set
+# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
+
+#
+# Miscellaneous USB options
+#
+# CONFIG_USB_DEVICEFS is not set
+# CONFIG_USB_DEVICE_CLASS is not set
+# CONFIG_USB_DYNAMIC_MINORS is not set
+# CONFIG_USB_SUSPEND is not set
+# CONFIG_USB_OTG is not set
+# CONFIG_USB_OTG_WHITELIST is not set
+# CONFIG_USB_OTG_BLACKLIST_HUB is not set
+
+#
+# USB Host Controller Drivers
+#
+# CONFIG_USB_C67X00_HCD is not set
+# CONFIG_USB_ISP116X_HCD is not set
+# CONFIG_USB_ISP1760_HCD is not set
+CONFIG_USB_OHCI_HCD=y
+# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
+# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
+CONFIG_USB_OHCI_LITTLE_ENDIAN=y
+# CONFIG_USB_SL811_HCD is not set
+# CONFIG_USB_R8A66597_HCD is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+
+#
+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+#
+
+#
+# may also be needed; see USB_STORAGE Help for more information
+#
+# CONFIG_USB_LIBUSUAL is not set
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_MON is not set
+
+#
+# USB port drivers
+#
+# CONFIG_USB_SERIAL is not set
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_ADUTUX is not set
+# CONFIG_USB_AUERSWALD is not set
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_BERRY_CHARGE is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_CYPRESS_CY7C63 is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_PHIDGET is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_FTDI_ELAN is not set
+# CONFIG_USB_APPLEDISPLAY is not set
+# CONFIG_USB_LD is not set
+# CONFIG_USB_TRANCEVIBRATOR is not set
+# CONFIG_USB_IOWARRIOR is not set
+CONFIG_USB_GADGET=y
+# CONFIG_USB_GADGET_DEBUG_FILES is not set
+CONFIG_USB_GADGET_SELECTED=y
+# CONFIG_USB_GADGET_AMD5536UDC is not set
+# CONFIG_USB_GADGET_ATMEL_USBA is not set
+# CONFIG_USB_GADGET_FSL_USB2 is not set
+# CONFIG_USB_GADGET_NET2280 is not set
+# CONFIG_USB_GADGET_PXA25X is not set
+# CONFIG_USB_GADGET_M66592 is not set
+CONFIG_USB_GADGET_PXA27X=y
+CONFIG_USB_PXA27X=y
+# CONFIG_USB_GADGET_GOKU is not set
+# CONFIG_USB_GADGET_LH7A40X is not set
+# CONFIG_USB_GADGET_OMAP is not set
+# CONFIG_USB_GADGET_S3C2410 is not set
+# CONFIG_USB_GADGET_AT91 is not set
+# CONFIG_USB_GADGET_DUMMY_HCD is not set
+# CONFIG_USB_GADGET_DUALSPEED is not set
+# CONFIG_USB_ZERO is not set
+CONFIG_USB_ETH=y
+# CONFIG_USB_ETH_RNDIS is not set
+# CONFIG_USB_GADGETFS is not set
+# CONFIG_USB_FILE_STORAGE is not set
+# CONFIG_USB_G_SERIAL is not set
+# CONFIG_USB_MIDI_GADGET is not set
+# CONFIG_USB_G_PRINTER is not set
+CONFIG_MMC=y
+# CONFIG_MMC_DEBUG is not set
+CONFIG_MMC_UNSAFE_RESUME=y
+
+#
+# MMC/SD Card Drivers
+#
+CONFIG_MMC_BLOCK=y
+CONFIG_MMC_BLOCK_BOUNCE=y
+CONFIG_SDIO_UART=y
+
+#
+# MMC/SD Host Controller Drivers
+#
+CONFIG_MMC_PXA=y
+# CONFIG_MMC_SPI is not set
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+
+#
+# LED drivers
+#
+# CONFIG_LEDS_GPIO is not set
+
+#
+# LED Triggers
+#
+CONFIG_LEDS_TRIGGERS=y
+CONFIG_LEDS_TRIGGER_TIMER=y
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+# CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# I2C RTC drivers
+#
+# CONFIG_RTC_DRV_DS1307 is not set
+# CONFIG_RTC_DRV_DS1374 is not set
+# CONFIG_RTC_DRV_DS1672 is not set
+# CONFIG_RTC_DRV_MAX6900 is not set
+# CONFIG_RTC_DRV_RS5C372 is not set
+# CONFIG_RTC_DRV_ISL1208 is not set
+# CONFIG_RTC_DRV_X1205 is not set
+# CONFIG_RTC_DRV_PCF8563 is not set
+# CONFIG_RTC_DRV_PCF8583 is not set
+# CONFIG_RTC_DRV_M41T80 is not set
+# CONFIG_RTC_DRV_S35390A is not set
+
+#
+# SPI RTC drivers
+#
+# CONFIG_RTC_DRV_MAX6902 is not set
+# CONFIG_RTC_DRV_R9701 is not set
+# CONFIG_RTC_DRV_RS5C348 is not set
+
+#
+# Platform RTC drivers
+#
+# CONFIG_RTC_DRV_CMOS is not set
+# CONFIG_RTC_DRV_DS1511 is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+
+#
+# on-CPU RTC drivers
+#
+CONFIG_RTC_DRV_SA1100=m
+# CONFIG_UIO is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+CONFIG_EXT3_FS=m
+CONFIG_EXT3_FS_XATTR=y
+# CONFIG_EXT3_FS_POSIX_ACL is not set
+# CONFIG_EXT3_FS_SECURITY is not set
+# CONFIG_EXT4DEV_FS is not set
+CONFIG_JBD=m
+CONFIG_FS_MBCACHE=y
+CONFIG_REISERFS_FS=m
+# CONFIG_REISERFS_CHECK is not set
+# CONFIG_REISERFS_PROC_INFO is not set
+CONFIG_REISERFS_FS_XATTR=y
+CONFIG_REISERFS_FS_POSIX_ACL=y
+CONFIG_REISERFS_FS_SECURITY=y
+# CONFIG_JFS_FS is not set
+CONFIG_FS_POSIX_ACL=y
+CONFIG_XFS_FS=m
+# CONFIG_XFS_QUOTA is not set
+# CONFIG_XFS_POSIX_ACL is not set
+# CONFIG_XFS_RT is not set
+# CONFIG_XFS_DEBUG is not set
+# CONFIG_OCFS2_FS is not set
+CONFIG_DNOTIFY=y
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+CONFIG_AUTOFS_FS=y
+CONFIG_AUTOFS4_FS=y
+CONFIG_FUSE_FS=m
+
+#
+# CD-ROM/DVD Filesystems
+#
+CONFIG_ISO9660_FS=m
+CONFIG_JOLIET=y
+CONFIG_ZISOFS=y
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=m
+CONFIG_MSDOS_FS=m
+CONFIG_VFAT_FS=m
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_JFFS2_FS is not set
+CONFIG_CRAMFS=m
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+CONFIG_NFS_V3_ACL=y
+# CONFIG_NFS_V4 is not set
+CONFIG_NFSD=m
+CONFIG_NFSD_V2_ACL=y
+CONFIG_NFSD_V3=y
+CONFIG_NFSD_V3_ACL=y
+# CONFIG_NFSD_V4 is not set
+# CONFIG_ROOT_NFS is not set
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_EXPORTFS=m
+CONFIG_NFS_ACL_SUPPORT=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+# CONFIG_SUNRPC_BIND34 is not set
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+CONFIG_SMB_FS=m
+# CONFIG_SMB_NLS_DEFAULT is not set
+CONFIG_CIFS=m
+CONFIG_CIFS_STATS=y
+# CONFIG_CIFS_STATS2 is not set
+CONFIG_CIFS_WEAK_PW_HASH=y
+CONFIG_CIFS_XATTR=y
+CONFIG_CIFS_POSIX=y
+# CONFIG_CIFS_DEBUG2 is not set
+# CONFIG_CIFS_EXPERIMENTAL is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=m
+CONFIG_NLS_CODEPAGE_737=m
+CONFIG_NLS_CODEPAGE_775=m
+CONFIG_NLS_CODEPAGE_850=m
+CONFIG_NLS_CODEPAGE_852=m
+CONFIG_NLS_CODEPAGE_855=m
+CONFIG_NLS_CODEPAGE_857=m
+CONFIG_NLS_CODEPAGE_860=m
+CONFIG_NLS_CODEPAGE_861=m
+CONFIG_NLS_CODEPAGE_862=m
+CONFIG_NLS_CODEPAGE_863=m
+CONFIG_NLS_CODEPAGE_864=m
+CONFIG_NLS_CODEPAGE_865=m
+CONFIG_NLS_CODEPAGE_866=m
+CONFIG_NLS_CODEPAGE_869=m
+CONFIG_NLS_CODEPAGE_936=m
+CONFIG_NLS_CODEPAGE_950=m
+CONFIG_NLS_CODEPAGE_932=m
+CONFIG_NLS_CODEPAGE_949=m
+CONFIG_NLS_CODEPAGE_874=m
+CONFIG_NLS_ISO8859_8=m
+CONFIG_NLS_CODEPAGE_1250=m
+CONFIG_NLS_CODEPAGE_1251=m
+CONFIG_NLS_ASCII=m
+CONFIG_NLS_ISO8859_1=m
+CONFIG_NLS_ISO8859_2=m
+CONFIG_NLS_ISO8859_3=m
+CONFIG_NLS_ISO8859_4=m
+CONFIG_NLS_ISO8859_5=m
+CONFIG_NLS_ISO8859_6=m
+CONFIG_NLS_ISO8859_7=m
+CONFIG_NLS_ISO8859_9=m
+CONFIG_NLS_ISO8859_13=m
+CONFIG_NLS_ISO8859_14=m
+CONFIG_NLS_ISO8859_15=m
+CONFIG_NLS_KOI8_R=m
+CONFIG_NLS_KOI8_U=m
+CONFIG_NLS_UTF8=m
+# CONFIG_DLM is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
+# CONFIG_ENABLE_MUST_CHECK is not set
+CONFIG_FRAME_WARN=1024
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+# CONFIG_DEBUG_KERNEL is not set
+# CONFIG_DEBUG_BUGVERBOSE is not set
+CONFIG_FRAME_POINTER=y
+# CONFIG_SAMPLES is not set
+# CONFIG_DEBUG_USER is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+CONFIG_CRYPTO_ALGAPI=m
+CONFIG_CRYPTO_AEAD=m
+CONFIG_CRYPTO_BLKCIPHER=m
+CONFIG_CRYPTO_HASH=m
+CONFIG_CRYPTO_MANAGER=m
+CONFIG_CRYPTO_GF128MUL=m
+CONFIG_CRYPTO_NULL=m
+CONFIG_CRYPTO_CRYPTD=m
+CONFIG_CRYPTO_AUTHENC=m
+CONFIG_CRYPTO_TEST=m
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+CONFIG_CRYPTO_CBC=m
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+CONFIG_CRYPTO_ECB=m
+CONFIG_CRYPTO_LRW=m
+CONFIG_CRYPTO_PCBC=m
+CONFIG_CRYPTO_XTS=m
+
+#
+# Hash modes
+#
+CONFIG_CRYPTO_HMAC=m
+CONFIG_CRYPTO_XCBC=m
+
+#
+# Digest
+#
+CONFIG_CRYPTO_CRC32C=m
+CONFIG_CRYPTO_MD4=m
+CONFIG_CRYPTO_MD5=m
+CONFIG_CRYPTO_MICHAEL_MIC=m
+CONFIG_CRYPTO_SHA1=m
+CONFIG_CRYPTO_SHA256=m
+CONFIG_CRYPTO_SHA512=m
+CONFIG_CRYPTO_TGR192=m
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+CONFIG_CRYPTO_AES=m
+# CONFIG_CRYPTO_ANUBIS is not set
+CONFIG_CRYPTO_ARC4=m
+CONFIG_CRYPTO_BLOWFISH=m
+# CONFIG_CRYPTO_CAMELLIA is not set
+CONFIG_CRYPTO_CAST5=m
+CONFIG_CRYPTO_CAST6=m
+CONFIG_CRYPTO_DES=m
+CONFIG_CRYPTO_FCRYPT=m
+CONFIG_CRYPTO_KHAZAD=m
+# CONFIG_CRYPTO_SALSA20 is not set
+CONFIG_CRYPTO_SEED=m
+CONFIG_CRYPTO_SERPENT=m
+CONFIG_CRYPTO_TEA=m
+CONFIG_CRYPTO_TWOFISH=m
+CONFIG_CRYPTO_TWOFISH_COMMON=m
+
+#
+# Compression
+#
+CONFIG_CRYPTO_DEFLATE=m
+# CONFIG_CRYPTO_LZO is not set
+CONFIG_CRYPTO_HW=y
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+# CONFIG_GENERIC_FIND_FIRST_BIT is not set
+# CONFIG_GENERIC_FIND_NEXT_BIT is not set
+CONFIG_CRC_CCITT=m
+CONFIG_CRC16=m
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+CONFIG_LIBCRC32C=m
+CONFIG_ZLIB_INFLATE=m
+CONFIG_ZLIB_DEFLATE=m
+CONFIG_TEXTSEARCH=y
+CONFIG_TEXTSEARCH_KMP=m
+CONFIG_TEXTSEARCH_BM=m
+CONFIG_TEXTSEARCH_FSM=m
+CONFIG_PLIST=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
index 914bb33dab920e4deaff4f890916d8b3a140aee5..e8ee7ec9ff6dda45d0a0793c9887b37b2592769a 100644 (file)
@@ -16,18 +16,24 @@ config CPU_PXA310
 config CPU_PXA320
        bool "PXA320 (codename Monahans-P)"
 
+config CPU_PXA930
+       bool "PXA930 (codename Tavor-P)"
+
 endmenu
 
 endif
 
-menu "Select target boards"
-
 config ARCH_GUMSTIX
        bool "Gumstix XScale boards"
        help
          Say Y here if you intend to run this kernel on a
          Gumstix Full Function Minature Computer.
 
+config MACH_GUMSTIX_F
+       bool "Basix, Connex, ws-200ax, ws-400ax systems"
+       depends on ARCH_GUMSTIX
+       select PXA25x
+
 config ARCH_LUBBOCK
        bool "Intel DBPXA250 Development Platform"
        select PXA25x
@@ -58,6 +64,57 @@ config PXA_SHARPSL
          SL-C3000 (Spitz), SL-C3100 (Borzoi) or SL-C6000x (Tosa)
          handheld computer.
 
+config MACH_POODLE
+       bool "Enable Sharp SL-5600 (Poodle) Support"
+       depends on PXA_SHARPSL
+       select PXA25x
+       select SHARP_LOCOMO
+       select PXA_SSP
+
+config MACH_CORGI
+       bool "Enable Sharp SL-C700 (Corgi) Support"
+       depends on PXA_SHARPSL
+       select PXA25x
+       select PXA_SHARP_C7xx
+
+config MACH_SHEPHERD
+       bool "Enable Sharp SL-C750 (Shepherd) Support"
+       depends on PXA_SHARPSL
+       select PXA25x
+       select PXA_SHARP_C7xx
+
+config MACH_HUSKY
+       bool "Enable Sharp SL-C760 (Husky) Support"
+       depends on PXA_SHARPSL
+       select PXA25x
+       select PXA_SHARP_C7xx
+
+config MACH_AKITA
+       bool "Enable Sharp SL-1000 (Akita) Support"
+       depends on PXA_SHARPSL
+       select PXA27x
+       select PXA_SHARP_Cxx00
+       select MACH_SPITZ
+       select I2C
+       select I2C_PXA
+
+config MACH_SPITZ
+       bool "Enable Sharp Zaurus SL-3000 (Spitz) Support"
+       depends on PXA_SHARPSL
+       select PXA27x
+       select PXA_SHARP_Cxx00
+
+config MACH_BORZOI
+       bool "Enable Sharp Zaurus SL-3100 (Borzoi) Support"
+       depends on PXA_SHARPSL
+       select PXA27x
+       select PXA_SHARP_Cxx00
+
+config MACH_TOSA
+       bool "Enable Sharp SL-6000x (Tosa) Support"
+       depends on PXA_SHARPSL
+       select PXA25x
+
 config ARCH_PXA_ESERIES
        bool "PXA based Toshiba e-series PDAs"
        select PXA25x
@@ -70,10 +127,19 @@ config MACH_E330
          Say Y here if you intend to run this kernel on a Toshiba
          e330 family PDA.
 
+config MACH_E350
+       bool "Toshiba e350"
+       default y
+       depends on ARCH_PXA_ESERIES
+       help
+         Say Y here if you intend to run this kernel on a Toshiba
+         e350 family PDA.
+
 config MACH_E740
        bool "Toshiba e740"
        default y
        depends on ARCH_PXA_ESERIES
+       select FB_W100
        help
          Say Y here if you intend to run this kernel on a Toshiba
          e740 family PDA.
@@ -82,6 +148,7 @@ config MACH_E750
        bool "Toshiba e750"
        default y
        depends on ARCH_PXA_ESERIES
+       select FB_W100
        help
          Say Y here if you intend to run this kernel on a Toshiba
          e750 family PDA.
@@ -98,6 +165,7 @@ config MACH_E800
        bool "Toshiba e800"
        default y
        depends on ARCH_PXA_ESERIES
+       select FB_W100
        help
          Say Y here if you intend to run this kernel on a Toshiba
          e800 family PDA.
@@ -106,6 +174,10 @@ config MACH_TRIZEPS4
        bool "Keith und Koep Trizeps4 DIMM-Module"
        select PXA27x
 
+config MACH_TRIZEPS4_CONXS
+       bool "ConXS Eval Board"
+       depends on MACH_TRIZEPS4
+
 config MACH_EM_X270
        bool "CompuLab EM-x270 platform"
        select PXA27x
@@ -115,7 +187,7 @@ config MACH_COLIBRI
        select PXA27x
 
 config MACH_ZYLONITE
-       bool "PXA3xx Development Platform"
+       bool "PXA3xx Development Platform (aka Zylonite)"
        select PXA3xx
        select HAVE_PWM
 
@@ -124,6 +196,16 @@ config MACH_LITTLETON
        select PXA3xx
        select PXA_SSP
 
+config MACH_TAVOREVB
+       bool "PXA930 Evaluation Board (aka TavorEVB)"
+       select PXA3xx
+       select PXA930
+
+config MACH_SAAR
+       bool "PXA930 Handheld Platform (aka SAAR)"
+       select PXA3xx
+       select PXA930
+
 config MACH_ARMCORE
        bool "CompuLab CM-X270 modules"
        select PXA27x
@@ -131,7 +213,6 @@ config MACH_ARMCORE
 
 config MACH_MAGICIAN
        bool "Enable HTC Magician Support"
-       depends on ARCH_PXA
        select PXA27x
        select IWMMXT
 
@@ -139,18 +220,26 @@ config MACH_PCM027
        bool "Phytec phyCORE-PXA270 CPU module (PCM-027)"
        select PXA27x
        select IWMMXT
+       select PXA_SSP
 
-endmenu
+config ARCH_PXA_PALM
+       bool "PXA based Palm PDAs"
+       select HAVE_PWM
 
-choice
-       prompt "Used baseboard"
-       depends on MACH_PCM027
+config MACH_PALMTX
+       bool "Palm T|X"
+       default y
+       depends on ARCH_PXA_PALM
+       select PXA27x
+       select IWMMXT
+       help
+         Say Y here if you intend to run this kernel on a Palm T|X
+         handheld computer.
 
 config MACH_PCM990_BASEBOARD
        bool "PHYTEC PCM-990 development board"
        select HAVE_PWM
-
-endchoice
+       depends on MACH_PCM027
 
 choice
        prompt "display on pcm990"
@@ -167,88 +256,45 @@ config PCM990_DISPLAY_NONE
 
 endchoice
 
-if ARCH_GUMSTIX
-
-choice
-       prompt "Select target Gumstix board"
-
-config MACH_GUMSTIX_F
-       bool "Basix, Connex, ws-200ax, ws-400ax systems"
-       select PXA25x
-
-endchoice
-
-endif
 
+config PXA_EZX
+       bool "Motorola EZX Platform"
+       select PXA27x
+       select IWMMXT
+       select HAVE_PWM
 
-if MACH_TRIZEPS4
+config MACH_EZX_A780
+       bool "Motorola EZX A780"
+       default y
+       depends on PXA_EZX
 
-choice
-       prompt "Select base board for Trizeps 4 module"
+config MACH_EZX_E680
+       bool "Motorola EZX E680"
+       default y
+       depends on PXA_EZX
 
-config MACH_TRIZEPS4_CONXS
-       bool "ConXS Eval Board"
+config MACH_EZX_A1200
+       bool "Motorola EZX A1200"
+       default y
+       depends on PXA_EZX
 
-config MACH_TRIZEPS4_ANY
-       bool "another Board"
+config MACH_EZX_A910
+       bool "Motorola EZX A910"
+       default y
+       depends on PXA_EZX
 
-endchoice
+config MACH_EZX_E6
+       bool "Motorola EZX E6"
+       default y
+       depends on PXA_EZX
 
-endif
+config MACH_EZX_E2
+       bool "Motorola EZX E2"
+       default y
+       depends on PXA_EZX
 
 endmenu
 
-config MACH_POODLE
-       bool "Enable Sharp SL-5600 (Poodle) Support"
-       depends on PXA_SHARPSL
-       select PXA25x
-       select SHARP_LOCOMO
-       select PXA_SSP
-
-config MACH_CORGI
-       bool "Enable Sharp SL-C700 (Corgi) Support"
-       depends on PXA_SHARPSL
-       select PXA25x
-       select PXA_SHARP_C7xx
-
-config MACH_SHEPHERD
-       bool "Enable Sharp SL-C750 (Shepherd) Support"
-       depends on PXA_SHARPSL
-       select PXA25x
-       select PXA_SHARP_C7xx
-
-config MACH_HUSKY
-       bool "Enable Sharp SL-C760 (Husky) Support"
-       depends on PXA_SHARPSL
-       select PXA25x
-       select PXA_SHARP_C7xx
-
-config MACH_AKITA
-       bool "Enable Sharp SL-1000 (Akita) Support"
-       depends on PXA_SHARPSL
-       select PXA27x
-       select PXA_SHARP_Cxx00
-       select MACH_SPITZ
-       select I2C
-       select I2C_PXA
-
-config MACH_SPITZ
-       bool "Enable Sharp Zaurus SL-3000 (Spitz) Support"
-       depends on PXA_SHARPSL
-       select PXA27x
-       select PXA_SHARP_Cxx00
-
-config MACH_BORZOI
-       bool "Enable Sharp Zaurus SL-3100 (Borzoi) Support"
-       depends on PXA_SHARPSL
-       select PXA27x
-       select PXA_SHARP_Cxx00
-
-config MACH_TOSA
-       bool "Enable Sharp SL-6000x (Tosa) Support"
-       depends on PXA_SHARPSL
-       select PXA25x
-
 config PXA25x
        bool
        help
@@ -288,4 +334,13 @@ config PXA_PWM
        default BACKLIGHT_PWM
        help
          Enable support for PXA2xx/PXA3xx PWM controllers
+
+config TOSA_BT
+       tristate "Control the state of built-in bluetooth chip on Sharp SL-6000"
+       depends on MACH_TOSA
+       select RFKILL
+       help
+         This is a simple driver that is able to control
+         the state of built in bluetooth chip on tosa.
+
 endif
index c4dfbe87fc4e4768f555b53a7f679836b0e70e5e..99ecbe7f85062a343db152dec067f7889c629a3b 100644 (file)
@@ -4,7 +4,7 @@
 
 # Common support (must be linked before board specific support)
 obj-y                          += clock.o devices.o generic.o irq.o dma.o \
-                                  time.o gpio.o
+                                  time.o gpio.o reset.o
 obj-$(CONFIG_PM)               += pm.o sleep.o standby.o
 obj-$(CONFIG_CPU_FREQ)         += cpu-pxa.o
 
@@ -18,6 +18,7 @@ obj-$(CONFIG_PXA27x)          += mfp-pxa2xx.o pxa2xx.o pxa27x.o
 obj-$(CONFIG_PXA3xx)           += mfp-pxa3xx.o pxa3xx.o smemc.o
 obj-$(CONFIG_CPU_PXA300)       += pxa300.o
 obj-$(CONFIG_CPU_PXA320)       += pxa320.o
+obj-$(CONFIG_CPU_PXA930)       += pxa930.o
 
 # Specific board support
 obj-$(CONFIG_ARCH_GUMSTIX)     += gumstix.o
@@ -36,7 +37,12 @@ obj-$(CONFIG_MACH_PCM990_BASEBOARD)  += pcm990-baseboard.o
 obj-$(CONFIG_MACH_TOSA)                += tosa.o
 obj-$(CONFIG_MACH_EM_X270)     += em-x270.o
 obj-$(CONFIG_MACH_MAGICIAN)    += magician.o
-obj-$(CONFIG_ARCH_PXA_ESERIES) += eseries.o
+obj-$(CONFIG_ARCH_PXA_ESERIES) += eseries.o eseries_udc.o
+obj-$(CONFIG_MACH_E740)                += e740_lcd.o
+obj-$(CONFIG_MACH_E750)                += e750_lcd.o
+obj-$(CONFIG_MACH_E400)                += e400_lcd.o
+obj-$(CONFIG_MACH_E800)                += e800_lcd.o
+obj-$(CONFIG_MACH_PALMTX)      += palmtx.o
 
 ifeq ($(CONFIG_MACH_ZYLONITE),y)
   obj-y                                += zylonite.o
@@ -44,8 +50,11 @@ ifeq ($(CONFIG_MACH_ZYLONITE),y)
   obj-$(CONFIG_CPU_PXA320)     += zylonite_pxa320.o
 endif
 obj-$(CONFIG_MACH_LITTLETON)   += littleton.o
+obj-$(CONFIG_MACH_TAVOREVB)    += tavorevb.o
+obj-$(CONFIG_MACH_SAAR)                += saar.o
 
 obj-$(CONFIG_MACH_ARMCORE)      += cm-x270.o
+obj-$(CONFIG_PXA_EZX)           += ezx.o
 
 # Support for blinky lights
 led-y := leds.o
@@ -59,3 +68,5 @@ obj-$(CONFIG_LEDS)            += $(led-y)
 ifeq ($(CONFIG_PCI),y)
 obj-$(CONFIG_MACH_ARMCORE) += cm-x270-pci.o
 endif
+
+obj-$(CONFIG_TOSA_BT)          += tosa-bt.o
index b4d04955dcb0a08774e0214aaac6a7c1453c2d52..630063ffa6fcec90b5f3fbbb66a2588440ac70be 100644 (file)
@@ -101,21 +101,6 @@ unsigned long clk_get_rate(struct clk *clk)
 EXPORT_SYMBOL(clk_get_rate);
 
 
-static void clk_gpio27_enable(struct clk *clk)
-{
-       pxa_gpio_mode(GPIO11_3_6MHz_MD);
-}
-
-static void clk_gpio27_disable(struct clk *clk)
-{
-}
-
-static const struct clkops clk_gpio27_ops = {
-       .enable         = clk_gpio27_enable,
-       .disable        = clk_gpio27_disable,
-};
-
-
 void clk_cken_enable(struct clk *clk)
 {
        CKEN |= 1 << clk->cken;
@@ -131,14 +116,6 @@ const struct clkops clk_cken_ops = {
        .disable        = clk_cken_disable,
 };
 
-static struct clk common_clks[] = {
-       {
-               .name           = "GPIO27_CLK",
-               .ops            = &clk_gpio27_ops,
-               .rate           = 3686400,
-       },
-};
-
 void clks_register(struct clk *clks, size_t num)
 {
        int i;
@@ -148,10 +125,3 @@ void clks_register(struct clk *clks, size_t num)
                list_add(&clks[i].node, &clocks);
        mutex_unlock(&clocks_mutex);
 }
-
-static int __init clk_init(void)
-{
-       clks_register(common_clks, ARRAY_SIZE(common_clks));
-       return 0;
-}
-arch_initcall(clk_init);
index 83cbfaba485de9a96badbc4107e228979f8e4497..1ec8f9178aaf48e41cde86c1c534d76f51283422 100644 (file)
@@ -47,9 +47,42 @@ struct clk {
                .other  = _other,                       \
        }
 
+#define INIT_CLK(_name, _ops, _rate, _delay, _dev)      \
+       {                                               \
+               .name   = _name,                        \
+               .dev    = _dev,                         \
+               .ops    = _ops,                         \
+               .rate   = _rate,                        \
+               .delay  = _delay,                       \
+       }
+
 extern const struct clkops clk_cken_ops;
 
 void clk_cken_enable(struct clk *clk);
 void clk_cken_disable(struct clk *clk);
 
+#ifdef CONFIG_PXA3xx
+#define PXA3xx_CKEN(_name, _cken, _rate, _delay, _dev) \
+       {                                               \
+               .name   = _name,                        \
+               .dev    = _dev,                         \
+               .ops    = &clk_pxa3xx_cken_ops,         \
+               .rate   = _rate,                        \
+               .cken   = CKEN_##_cken,                 \
+               .delay  = _delay,                       \
+       }
+
+#define PXA3xx_CK(_name, _cken, _ops, _dev)            \
+       {                                               \
+               .name   = _name,                        \
+               .dev    = _dev,                         \
+               .ops    = _ops,                         \
+               .cken   = CKEN_##_cken,                 \
+       }
+
+extern const struct clkops clk_pxa3xx_cken_ops;
+extern void clk_pxa3xx_cken_enable(struct clk *);
+extern void clk_pxa3xx_cken_disable(struct clk *);
+#endif
+
 void clks_register(struct clk *clks, size_t num);
index 319c9ff3ab9a29ca49179fe4f180a9db8c50725b..bcf0cde6ccc965ce2a3ba925ff868596f0d8c185 100644 (file)
@@ -5,7 +5,7 @@
  *
  * Bits taken from various places.
  *
- * Copyright (C) 2007 Compulab, Ltd.
+ * Copyright (C) 2007, 2008 Compulab, Ltd.
  * Mike Rapoport <mike@compulab.co.il>
  *
  * This program is free software; you can redistribute it and/or modify
 #include <linux/device.h>
 #include <linux/platform_device.h>
 #include <linux/irq.h>
+#include <linux/gpio.h>
 
 #include <asm/mach/pci.h>
-#include <asm/arch/cm-x270.h>
 #include <asm/arch/pxa-regs.h>
-#include <asm/arch/pxa2xx-gpio.h>
 #include <asm/mach-types.h>
 
 #include <asm/hardware/it8152.h>
 
-unsigned long it8152_base_address = CMX270_IT8152_VIRT;
+unsigned long it8152_base_address;
+static int cmx270_it8152_irq_gpio;
 
 /*
  * Only first 64MB of memory can be accessed via PCI.
@@ -42,7 +42,7 @@ void __init cmx270_pci_adjust_zones(int node, unsigned long *zone_size,
        unsigned int sz = SZ_64M >> PAGE_SHIFT;
 
        if (machine_is_armcore()) {
-               pr_info("Adjusting zones for CM-x270\n");
+               pr_info("Adjusting zones for CM-X270\n");
 
                /*
                 * Only adjust if > 64M on current system
@@ -60,19 +60,20 @@ void __init cmx270_pci_adjust_zones(int node, unsigned long *zone_size,
 static void cmx270_it8152_irq_demux(unsigned int irq, struct irq_desc *desc)
 {
        /* clear our parent irq */
-       GEDR(GPIO_IT8152_IRQ) = GPIO_bit(GPIO_IT8152_IRQ);
+       GEDR(cmx270_it8152_irq_gpio) = GPIO_bit(cmx270_it8152_irq_gpio);
 
        it8152_irq_demux(irq, desc);
 }
 
-void __cmx270_pci_init_irq(void)
+void __cmx270_pci_init_irq(int irq_gpio)
 {
        it8152_init_irq();
-       pxa_gpio_mode(IRQ_TO_GPIO(GPIO_IT8152_IRQ));
-       set_irq_type(IRQ_GPIO(GPIO_IT8152_IRQ), IRQT_RISING);
 
-       set_irq_chained_handler(IRQ_GPIO(GPIO_IT8152_IRQ),
-                               cmx270_it8152_irq_demux);
+       cmx270_it8152_irq_gpio = irq_gpio;
+
+       set_irq_type(gpio_to_irq(irq_gpio), IRQT_RISING);
+
+       set_irq_chained_handler(gpio_to_irq(irq_gpio), cmx270_it8152_irq_demux);
 }
 
 #ifdef CONFIG_PM
@@ -115,8 +116,8 @@ static int __init cmx270_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
 
        /*
          Here comes the ugly part. The routing is baseboard specific,
-         but defining a platform for each possible base of CM-x270 is
-         unrealistic. Here we keep mapping for ATXBase and SB-x270.
+         but defining a platform for each possible base of CM-X270 is
+         unrealistic. Here we keep mapping for ATXBase and SB-X270.
        */
        /* ATXBASE PCI slot */
        if (slot == 7)
index ffe37b66f9a001c9290fc09e169263fb65caa4de..48f532f4cb51c4a5568994c6c86979abafc54a36 100644 (file)
@@ -1,13 +1,13 @@
-extern void __cmx270_pci_init_irq(void);
+extern void __cmx270_pci_init_irq(int irq_gpio);
 extern void __cmx270_pci_suspend(void);
 extern void __cmx270_pci_resume(void);
 
 #ifdef CONFIG_PCI
-#define cmx270_pci_init_irq __cmx270_pci_init_irq
-#define cmx270_pci_suspend __cmx270_pci_suspend
-#define cmx270_pci_resume __cmx270_pci_resume
+#define cmx270_pci_init_irq(x) __cmx270_pci_init_irq(x)
+#define cmx270_pci_suspend(x) __cmx270_pci_suspend(x)
+#define cmx270_pci_resume(x) __cmx270_pci_resume(x)
 #else
-#define cmx270_pci_init_irq() do {} while (0)
-#define cmx270_pci_suspend() do {} while (0)
-#define cmx270_pci_resume() do {} while (0)
+#define cmx270_pci_init_irq(x) do {} while (0)
+#define cmx270_pci_suspend(x) do {} while (0)
+#define cmx270_pci_resume(x) do {} while (0)
 #endif
index 01b9964acec1f39bd448114c4ee65aadbde05167..402e807eae54cef3fea7cd99d5422e87b9c0cc62 100644 (file)
@@ -1,7 +1,7 @@
 /*
  * linux/arch/arm/mach-pxa/cm-x270.c
  *
- * Copyright (C) 2007 CompuLab, Ltd.
+ * Copyright (C) 2007, 2008 CompuLab, Ltd.
  * Mike Rapoport <mike@compulab.co.il>
  *
  * This program is free software; you can redistribute it and/or modify
  * published by the Free Software Foundation.
  */
 
-#include <linux/types.h>
-#include <linux/pm.h>
-#include <linux/fb.h>
 #include <linux/platform_device.h>
-#include <linux/irq.h>
 #include <linux/sysdev.h>
-#include <linux/io.h>
-#include <linux/delay.h>
+#include <linux/irq.h>
+#include <linux/gpio.h>
 
 #include <linux/dm9000.h>
 #include <linux/rtc-v3020.h>
-#include <linux/serial_8250.h>
-
 #include <video/mbxfb.h>
+#include <linux/leds.h>
 
 #include <asm/mach/arch.h>
 #include <asm/mach-types.h>
 #include <asm/mach/map.h>
 
-#include <asm/arch/pxa-regs.h>
 #include <asm/arch/pxa2xx-regs.h>
-#include <asm/arch/pxa2xx-gpio.h>
+#include <asm/arch/mfp-pxa27x.h>
+#include <asm/arch/pxa-regs.h>
 #include <asm/arch/audio.h>
 #include <asm/arch/pxafb.h>
 #include <asm/arch/ohci.h>
 #include <asm/arch/mmc.h>
 #include <asm/arch/bitfield.h>
-#include <asm/arch/cm-x270.h>
 
 #include <asm/hardware/it8152.h>
 
 #include "generic.h"
 #include "cm-x270-pci.h"
 
+/* virtual addresses for statically mapped regions */
+#define CMX270_VIRT_BASE       (0xe8000000)
+#define CMX270_IT8152_VIRT     (CMX270_VIRT_BASE)
+
 #define RTC_PHYS_BASE          (PXA_CS1_PHYS + (5 << 22))
 #define DM9000_PHYS_BASE       (PXA_CS1_PHYS + (6 << 22))
 
-static struct resource cmx270_dm9k_resource[] = {
+/* GPIO IRQ usage */
+#define GPIO10_ETHIRQ          (10)
+#define GPIO22_IT8152_IRQ      (22)
+#define GPIO83_MMC_IRQ         (83)
+#define GPIO95_GFXIRQ          (95)
+
+#define CMX270_ETHIRQ          IRQ_GPIO(GPIO10_ETHIRQ)
+#define CMX270_IT8152_IRQ      IRQ_GPIO(GPIO22_IT8152_IRQ)
+#define CMX270_MMC_IRQ         IRQ_GPIO(GPIO83_MMC_IRQ)
+#define CMX270_GFXIRQ          IRQ_GPIO(GPIO95_GFXIRQ)
+
+/* MMC power enable */
+#define GPIO105_MMC_POWER      (105)
+
+static unsigned long cmx270_pin_config[] = {
+       /* AC'97 */
+       GPIO28_AC97_BITCLK,
+       GPIO29_AC97_SDATA_IN_0,
+       GPIO30_AC97_SDATA_OUT,
+       GPIO31_AC97_SYNC,
+       GPIO98_AC97_SYSCLK,
+       GPIO113_AC97_nRESET,
+
+       /* BTUART */
+       GPIO42_BTUART_RXD,
+       GPIO43_BTUART_TXD,
+       GPIO44_BTUART_CTS,
+       GPIO45_BTUART_RTS,
+
+       /* STUART */
+       GPIO46_STUART_RXD,
+       GPIO47_STUART_TXD,
+
+       /* MCI controller */
+       GPIO32_MMC_CLK,
+       GPIO112_MMC_CMD,
+       GPIO92_MMC_DAT_0,
+       GPIO109_MMC_DAT_1,
+       GPIO110_MMC_DAT_2,
+       GPIO111_MMC_DAT_3,
+
+       /* LCD */
+       GPIO58_LCD_LDD_0,
+       GPIO59_LCD_LDD_1,
+       GPIO60_LCD_LDD_2,
+       GPIO61_LCD_LDD_3,
+       GPIO62_LCD_LDD_4,
+       GPIO63_LCD_LDD_5,
+       GPIO64_LCD_LDD_6,
+       GPIO65_LCD_LDD_7,
+       GPIO66_LCD_LDD_8,
+       GPIO67_LCD_LDD_9,
+       GPIO68_LCD_LDD_10,
+       GPIO69_LCD_LDD_11,
+       GPIO70_LCD_LDD_12,
+       GPIO71_LCD_LDD_13,
+       GPIO72_LCD_LDD_14,
+       GPIO73_LCD_LDD_15,
+       GPIO74_LCD_FCLK,
+       GPIO75_LCD_LCLK,
+       GPIO76_LCD_PCLK,
+       GPIO77_LCD_BIAS,
+
+       /* I2C */
+       GPIO117_I2C_SCL,
+       GPIO118_I2C_SDA,
+
+       /* SSP1 */
+       GPIO23_SSP1_SCLK,
+       GPIO24_SSP1_SFRM,
+       GPIO25_SSP1_TXD,
+       GPIO26_SSP1_RXD,
+
+       /* SSP2 */
+       GPIO19_SSP2_SCLK,
+       GPIO14_SSP2_SFRM,
+       GPIO87_SSP2_TXD,
+       GPIO88_SSP2_RXD,
+
+       /* PC Card */
+       GPIO48_nPOE,
+       GPIO49_nPWE,
+       GPIO50_nPIOR,
+       GPIO51_nPIOW,
+       GPIO85_nPCE_1,
+       GPIO54_nPCE_2,
+       GPIO55_nPREG,
+       GPIO56_nPWAIT,
+       GPIO57_nIOIS16,
+
+       /* SDRAM and local bus */
+       GPIO15_nCS_1,
+       GPIO78_nCS_2,
+       GPIO79_nCS_3,
+       GPIO80_nCS_4,
+       GPIO33_nCS_5,
+       GPIO49_nPWE,
+       GPIO18_RDY,
+
+       /* GPIO */
+       GPIO0_GPIO      | WAKEUP_ON_EDGE_BOTH,
+       GPIO105_GPIO    | MFP_LPM_DRIVE_HIGH,   /* MMC/SD power */
+       GPIO53_GPIO,                            /* PC card reset */
+
+       /* NAND controls */
+       GPIO11_GPIO     | MFP_LPM_DRIVE_HIGH,   /* NAND CE# */
+       GPIO89_GPIO,                            /* NAND Ready/Busy */
+
+       /* interrupts */
+       GPIO10_GPIO,    /* DM9000 interrupt */
+       GPIO83_GPIO,    /* MMC card detect */
+};
+
+#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
+static struct resource cmx270_dm9000_resource[] = {
        [0] = {
                .start = DM9000_PHYS_BASE,
                .end   = DM9000_PHYS_BASE + 4,
@@ -64,31 +176,45 @@ static struct resource cmx270_dm9k_resource[] = {
        }
 };
 
-/* for the moment we limit ourselves to 32bit IO until some
- * better IO routines can be written and tested
- */
-static struct dm9000_plat_data cmx270_dm9k_platdata = {
+static struct dm9000_plat_data cmx270_dm9000_platdata = {
        .flags          = DM9000_PLATF_32BITONLY,
 };
 
-/* Ethernet device */
-static struct platform_device cmx270_device_dm9k = {
+static struct platform_device cmx270_dm9000_device = {
        .name           = "dm9000",
        .id             = 0,
-       .num_resources  = ARRAY_SIZE(cmx270_dm9k_resource),
-       .resource       = cmx270_dm9k_resource,
+       .num_resources  = ARRAY_SIZE(cmx270_dm9000_resource),
+       .resource       = cmx270_dm9000_resource,
        .dev            = {
-               .platform_data = &cmx270_dm9k_platdata,
+               .platform_data = &cmx270_dm9000_platdata,
        }
 };
 
-/* touchscreen controller */
+static void __init cmx270_init_dm9000(void)
+{
+       platform_device_register(&cmx270_dm9000_device);
+}
+#else
+static inline void cmx270_init_dm9000(void) {}
+#endif
+
+/* UCB1400 touchscreen controller */
+#if defined(CONFIG_TOUCHSCREEN_UCB1400) || defined(CONFIG_TOUCHSCREEN_UCB1400_MODULE)
 static struct platform_device cmx270_ts_device = {
        .name           = "ucb1400_ts",
        .id             = -1,
 };
 
-/* RTC */
+static void __init cmx270_init_touchscreen(void)
+{
+       platform_device_register(&cmx270_ts_device);
+}
+#else
+static inline void cmx270_init_touchscreen(void) {}
+#endif
+
+/* V3020 RTC */
+#if defined(CONFIG_RTC_DRV_V3020) || defined(CONFIG_RTC_DRV_V3020_MODULE)
 static struct resource cmx270_v3020_resource[] = {
        [0] = {
                .start = RTC_PHYS_BASE,
@@ -111,28 +237,67 @@ static struct platform_device cmx270_rtc_device = {
        }
 };
 
-/*
- * CM-X270 LEDs
- */
+static void __init cmx270_init_rtc(void)
+{
+       platform_device_register(&cmx270_rtc_device);
+}
+#else
+static inline void cmx270_init_rtc(void) {}
+#endif
+
+/* CM-X270 LEDs */
+#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
+static struct gpio_led cmx270_leds[] = {
+       [0] = {
+               .name = "cm-x270:red",
+               .default_trigger = "nand-disk",
+               .gpio = 93,
+               .active_low = 1,
+       },
+       [1] = {
+               .name = "cm-x270:green",
+               .default_trigger = "heartbeat",
+               .gpio = 94,
+               .active_low = 1,
+       },
+};
+
+static struct gpio_led_platform_data cmx270_gpio_led_pdata = {
+       .num_leds = ARRAY_SIZE(cmx270_leds),
+       .leds = cmx270_leds,
+};
+
 static struct platform_device cmx270_led_device = {
-       .name           = "cm-x270-led",
+       .name           = "leds-gpio",
        .id             = -1,
+       .dev            = {
+               .platform_data = &cmx270_gpio_led_pdata,
+       },
 };
 
+static void __init cmx270_init_leds(void)
+{
+       platform_device_register(&cmx270_led_device);
+}
+#else
+static inline void cmx270_init_leds(void) {}
+#endif
+
 /* 2700G graphics */
+#if defined(CONFIG_FB_MBX) || defined(CONFIG_FB_MBX_MODULE)
 static u64 fb_dma_mask = ~(u64)0;
 
 static struct resource cmx270_2700G_resource[] = {
        /* frame buffer memory including ODFB and External SDRAM */
        [0] = {
-               .start = MARATHON_PHYS,
-               .end   = MARATHON_PHYS + 0x02000000,
+               .start = PXA_CS2_PHYS,
+               .end   = PXA_CS2_PHYS + 0x01ffffff,
                .flags = IORESOURCE_MEM,
        },
        /* Marathon registers */
        [1] = {
-               .start = MARATHON_PHYS + 0x03fe0000,
-               .end   = MARATHON_PHYS + 0x03ffffff,
+               .start = PXA_CS2_PHYS + 0x03fe0000,
+               .end   = PXA_CS2_PHYS + 0x03ffffff,
                .flags = IORESOURCE_MEM,
        },
 };
@@ -200,43 +365,15 @@ static struct platform_device cmx270_2700G = {
        .id             = -1,
 };
 
-static u64 ata_dma_mask = ~(u64)0;
-
-static struct platform_device cmx270_ata = {
-       .name = "pata_cm_x270",
-       .id = -1,
-       .dev            = {
-               .dma_mask       = &ata_dma_mask,
-               .coherent_dma_mask = 0xffffffff,
-       },
-};
-
-/* platform devices */
-static struct platform_device *platform_devices[] __initdata = {
-       &cmx270_device_dm9k,
-       &cmx270_rtc_device,
-       &cmx270_2700G,
-       &cmx270_led_device,
-       &cmx270_ts_device,
-       &cmx270_ata,
-};
-
-/* Map PCI companion and IDE/General Purpose CS statically */
-static struct map_desc cmx270_io_desc[] __initdata = {
-       [0] = { /* IDE/general purpose space */
-               .virtual        = CMX270_IDE104_VIRT,
-               .pfn            = __phys_to_pfn(CMX270_IDE104_PHYS),
-               .length         = SZ_64M - SZ_8M,
-               .type           = MT_DEVICE
-       },
-       [1] = { /* PCI bridge */
-               .virtual        = CMX270_IT8152_VIRT,
-               .pfn            = __phys_to_pfn(CMX270_IT8152_PHYS),
-               .length         = SZ_64M,
-               .type           = MT_DEVICE
-       },
-};
+static void __init cmx270_init_2700G(void)
+{
+       platform_device_register(&cmx270_2700G);
+}
+#else
+static inline void cmx270_init_2700G(void) {}
+#endif
 
+#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
 /*
   Display definitions
   keep these for backwards compatibility, although symbolic names (as
@@ -446,7 +583,16 @@ static int __init cmx270_set_display(char *str)
 */
 __setup("monitor=", cmx270_set_display);
 
+static void __init cmx270_init_display(void)
+{
+       set_pxa_fb_info(cmx270_display);
+}
+#else
+static inline void cmx270_init_display(void) {}
+#endif
+
 /* PXA27x OHCI controller setup */
+#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
 static int cmx270_ohci_init(struct device *dev)
 {
        /* Set the Power Control Polarity Low */
@@ -461,35 +607,37 @@ static struct pxaohci_platform_data cmx270_ohci_platform_data = {
        .init           = cmx270_ohci_init,
 };
 
+static void __init cmx270_init_ohci(void)
+{
+       pxa_set_ohci_info(&cmx270_ohci_platform_data);
+}
+#else
+static inline void cmx270_init_ohci(void) {}
+#endif
 
+#if defined(CONFIG_MMC) || defined(CONFIG_MMC_MODULE)
 static int cmx270_mci_init(struct device *dev,
                           irq_handler_t cmx270_detect_int,
                           void *data)
 {
        int err;
 
-       /*
-        * setup GPIO for PXA27x MMC controller
-        */
-       pxa_gpio_mode(GPIO32_MMCCLK_MD);
-       pxa_gpio_mode(GPIO112_MMCCMD_MD);
-       pxa_gpio_mode(GPIO92_MMCDAT0_MD);
-       pxa_gpio_mode(GPIO109_MMCDAT1_MD);
-       pxa_gpio_mode(GPIO110_MMCDAT2_MD);
-       pxa_gpio_mode(GPIO111_MMCDAT3_MD);
-
-       /* SB-X270 uses GPIO105 as SD power enable */
-       pxa_gpio_mode(105 | GPIO_OUT);
+       err = gpio_request(GPIO105_MMC_POWER, "MMC/SD power");
+       if (err) {
+               dev_warn(dev, "power gpio unavailable\n");
+               return err;
+       }
 
-       /* card detect IRQ on GPIO 83 */
-       pxa_gpio_mode(IRQ_TO_GPIO(CMX270_MMC_IRQ));
+       gpio_direction_output(GPIO105_MMC_POWER, 0);
 
        err = request_irq(CMX270_MMC_IRQ, cmx270_detect_int,
                          IRQF_DISABLED | IRQF_TRIGGER_FALLING,
                          "MMC card detect", data);
-       if (err)
-               printk(KERN_ERR "cmx270_mci_init: MMC/SD: can't"
-                      " request MMC card detect IRQ\n");
+       if (err) {
+               gpio_free(GPIO105_MMC_POWER);
+               dev_err(dev, "cmx270_mci_init: MMC/SD: can't"
+                       " request MMC card detect IRQ\n");
+       }
 
        return err;
 }
@@ -499,17 +647,18 @@ static void cmx270_mci_setpower(struct device *dev, unsigned int vdd)
        struct pxamci_platform_data *p_d = dev->platform_data;
 
        if ((1 << vdd) & p_d->ocr_mask) {
-               printk(KERN_DEBUG "%s: on\n", __func__);
-               GPCR(105) = GPIO_bit(105);
+               dev_dbg(dev, "power on\n");
+               gpio_set_value(GPIO105_MMC_POWER, 0);
        } else {
-               GPSR(105) = GPIO_bit(105);
-               printk(KERN_DEBUG "%s: off\n", __func__);
+               gpio_set_value(GPIO105_MMC_POWER, 1);
+               dev_dbg(dev, "power off\n");
        }
 }
 
 static void cmx270_mci_exit(struct device *dev, void *data)
 {
        free_irq(CMX270_MMC_IRQ, data);
+       gpio_free(GPIO105_MMC_POWER);
 }
 
 static struct pxamci_platform_data cmx270_mci_platform_data = {
@@ -519,6 +668,14 @@ static struct pxamci_platform_data cmx270_mci_platform_data = {
        .exit           = cmx270_mci_exit,
 };
 
+static void __init cmx270_init_mmc(void)
+{
+       pxa_set_mci_info(&cmx270_mci_platform_data);
+}
+#else
+static inline void cmx270_init_mmc(void) {}
+#endif
+
 #ifdef CONFIG_PM
 static unsigned long sleep_save_msc[10];
 
@@ -580,53 +737,63 @@ static int __init cmx270_pm_init(void)
 static int __init cmx270_pm_init(void) { return 0; }
 #endif
 
-static void __init cmx270_init(void)
+#if defined(CONFIG_SND_PXA2XX_AC97) || defined(CONFIG_SND_PXA2XX_AC97_MODULE)
+static void __init cmx270_init_ac97(void)
 {
-       cmx270_pm_init();
-
-       set_pxa_fb_info(cmx270_display);
-
-       /* register CM-X270 platform devices */
-       platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
        pxa_set_ac97_info(NULL);
+}
+#else
+static inline void cmx270_init_ac97(void) {}
+#endif
 
-       /* set MCI and OHCI platform parameters */
-       pxa_set_mci_info(&cmx270_mci_platform_data);
-       pxa_set_ohci_info(&cmx270_ohci_platform_data);
-
-       /* This enables the STUART */
-       pxa_gpio_mode(GPIO46_STRXD_MD);
-       pxa_gpio_mode(GPIO47_STTXD_MD);
+static void __init cmx270_init(void)
+{
+       cmx270_pm_init();
 
-       /* This enables the BTUART  */
-       pxa_gpio_mode(GPIO42_BTRXD_MD);
-       pxa_gpio_mode(GPIO43_BTTXD_MD);
-       pxa_gpio_mode(GPIO44_BTCTS_MD);
-       pxa_gpio_mode(GPIO45_BTRTS_MD);
+       pxa2xx_mfp_config(ARRAY_AND_SIZE(cmx270_pin_config));
+
+       cmx270_init_dm9000();
+       cmx270_init_rtc();
+       cmx270_init_display();
+       cmx270_init_mmc();
+       cmx270_init_ohci();
+       cmx270_init_ac97();
+       cmx270_init_touchscreen();
+       cmx270_init_leds();
+       cmx270_init_2700G();
 }
 
 static void __init cmx270_init_irq(void)
 {
        pxa27x_init_irq();
 
+       cmx270_pci_init_irq(GPIO22_IT8152_IRQ);
+}
 
-       cmx270_pci_init_irq();
+#ifdef CONFIG_PCI
+/* Map PCI companion statically */
+static struct map_desc cmx270_io_desc[] __initdata = {
+       [0] = { /* PCI bridge */
+               .virtual        = CMX270_IT8152_VIRT,
+               .pfn            = __phys_to_pfn(PXA_CS4_PHYS),
+               .length         = SZ_64M,
+               .type           = MT_DEVICE
+       },
+};
 
-       /* Setup interrupt for dm9000 */
-       pxa_gpio_mode(IRQ_TO_GPIO(CMX270_ETHIRQ));
-       set_irq_type(CMX270_ETHIRQ, IRQT_RISING);
+static void __init cmx270_map_io(void)
+{
+       pxa_map_io();
+       iotable_init(cmx270_io_desc, ARRAY_SIZE(cmx270_io_desc));
 
-       /* Setup interrupt for 2700G */
-       pxa_gpio_mode(IRQ_TO_GPIO(CMX270_GFXIRQ));
-       set_irq_type(CMX270_GFXIRQ, IRQT_FALLING);
+       it8152_base_address = CMX270_IT8152_VIRT;
 }
-
+#else
 static void __init cmx270_map_io(void)
 {
        pxa_map_io();
-       iotable_init(cmx270_io_desc, ARRAY_SIZE(cmx270_io_desc));
 }
-
+#endif
 
 MACHINE_START(ARMCORE, "Compulab CM-x270")
        .boot_params    = 0xa0000100,
index b37671b718868249e316ed503fa33b1d5fc687fe..e58504edb1404653b0bea3f5ac8ca956f6bd6db0 100644 (file)
@@ -465,6 +465,7 @@ static void corgi_irda_transceiver_mode(struct device *dev, int mode)
                GPSR(CORGI_GPIO_IR_ON) = GPIO_bit(CORGI_GPIO_IR_ON);
        else
                GPCR(CORGI_GPIO_IR_ON) = GPIO_bit(CORGI_GPIO_IR_ON);
+       pxa2xx_transceiver_mode(dev, mode);
 }
 
 static struct pxaficp_platform_data corgi_ficp_platform_data = {
index a6f2390ce662de674a520aca8bed2d5623148c0b..84489dc51d810126c08c444f91d4d10fb0823574 100644 (file)
 #include <asm/arch/mfp-pxa27x.h>
 #include <asm/arch/ohci.h>
 #include <asm/arch/pxa27x_keypad.h>
+#include <asm/arch/pxa2xx_spi.h>
 #include <asm/arch/camera.h>
 #include <asm/arch/audio.h>
+#include <asm/arch/pxa3xx_nand.h>
 
 #include "devices.h"
 #include "generic.h"
@@ -830,4 +832,63 @@ void __init pxa3xx_set_mci3_info(struct pxamci_platform_data *info)
        pxa_register_device(&pxa3xx_device_mci3, info);
 }
 
+static struct resource pxa3xx_resources_nand[] = {
+       [0] = {
+               .start  = 0x43100000,
+               .end    = 0x43100053,
+               .flags  = IORESOURCE_MEM,
+       },
+       [1] = {
+               .start  = IRQ_NAND,
+               .end    = IRQ_NAND,
+               .flags  = IORESOURCE_IRQ,
+       },
+       [2] = {
+               /* DRCMR for Data DMA */
+               .start  = 97,
+               .end    = 97,
+               .flags  = IORESOURCE_DMA,
+       },
+       [3] = {
+               /* DRCMR for Command DMA */
+               .start  = 99,
+               .end    = 99,
+               .flags  = IORESOURCE_DMA,
+       },
+};
+
+static u64 pxa3xx_nand_dma_mask = DMA_BIT_MASK(32);
+
+struct platform_device pxa3xx_device_nand = {
+       .name           = "pxa3xx-nand",
+       .id             = -1,
+       .dev            = {
+               .dma_mask = &pxa3xx_nand_dma_mask,
+               .coherent_dma_mask = DMA_BIT_MASK(32),
+       },
+       .num_resources  = ARRAY_SIZE(pxa3xx_resources_nand),
+       .resource       = pxa3xx_resources_nand,
+};
+
+void __init pxa3xx_set_nand_info(struct pxa3xx_nand_platform_data *info)
+{
+       pxa_register_device(&pxa3xx_device_nand, info);
+}
 #endif /* CONFIG_PXA3xx */
+
+/* pxa2xx-spi platform-device ID equals respective SSP platform-device ID + 1.
+ * See comment in arch/arm/mach-pxa/ssp.c::ssp_probe() */
+void __init pxa2xx_set_spi_info(unsigned id, struct pxa2xx_spi_master *info)
+{
+       struct platform_device *pd;
+
+       pd = platform_device_alloc("pxa2xx-spi", id);
+       if (pd == NULL) {
+               printk(KERN_ERR "pxa2xx-spi: failed to allocate device id %d\n",
+                      id);
+               return;
+       }
+
+       pd->dev.platform_data = info;
+       platform_device_add(pd);
+}
index b852eb18daa5f78526a2e40d835b4d166bc93594..887c738f5911dd6d333959b489aa3dad5af35731 100644 (file)
@@ -31,4 +31,6 @@ extern struct platform_device pxa25x_device_pwm1;
 extern struct platform_device pxa27x_device_pwm0;
 extern struct platform_device pxa27x_device_pwm1;
 
+extern struct platform_device pxa3xx_device_nand;
+
 void __init pxa_register_device(struct platform_device *dev, void *data);
diff --git a/arch/arm/mach-pxa/e400_lcd.c b/arch/arm/mach-pxa/e400_lcd.c
new file mode 100644 (file)
index 0000000..16c0236
--- /dev/null
@@ -0,0 +1,56 @@
+/*
+ * e400_lcd.c
+ *
+ * (c) 2005 Ian Molton <spyro@f2s.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/module.h>
+
+#include <asm/mach-types.h>
+#include <asm/arch/pxa-regs.h>
+#include <asm/arch/pxafb.h>
+
+static struct pxafb_mode_info e400_pxafb_mode_info = {
+       .pixclock       = 140703,
+       .xres           = 240,
+       .yres           = 320,
+       .bpp            = 16,
+       .hsync_len      = 4,
+       .left_margin    = 28,
+       .right_margin   = 8,
+       .vsync_len      = 3,
+       .upper_margin   = 5,
+       .lower_margin   = 6,
+       .sync           = 0,
+};
+
+static struct pxafb_mach_info e400_pxafb_mach_info = {
+       .modes          = &e400_pxafb_mode_info,
+       .num_modes      = 1,
+       .lccr0          = LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
+       .lccr3          = 0,
+       .pxafb_backlight_power  = NULL,
+};
+
+static int __init e400_lcd_init(void)
+{
+       if (!machine_is_e400())
+               return -ENODEV;
+
+       set_pxa_fb_info(&e400_pxafb_mach_info);
+       return 0;
+}
+
+module_init(e400_lcd_init);
+
+MODULE_AUTHOR("Ian Molton <spyro@f2s.com>");
+MODULE_DESCRIPTION("e400 lcd driver");
+MODULE_LICENSE("GPLv2");
+
diff --git a/arch/arm/mach-pxa/e740_lcd.c b/arch/arm/mach-pxa/e740_lcd.c
new file mode 100644 (file)
index 0000000..26bd599
--- /dev/null
@@ -0,0 +1,123 @@
+/* e740_lcd.c
+ *
+ * This file contains the definitions for the LCD timings and functions
+ * to control the LCD power / frontlighting via the w100fb driver.
+ *
+ * (c) 2005 Ian Molton <spyro@f2s.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/device.h>
+#include <linux/fb.h>
+#include <linux/err.h>
+#include <linux/platform_device.h>
+
+#include <asm/mach-types.h>
+
+#include <video/w100fb.h>
+
+/*
+**potential** shutdown routine - to be investigated
+devmem2 0x0c010528 w 0xff3fff00
+devmem2 0x0c010190 w 0x7FFF8000
+devmem2 0x0c0101b0 w 0x00FF0000
+devmem2 0x0c01008c w 0x00000000
+devmem2 0x0c010080 w 0x000000bf
+devmem2 0x0c010098 w 0x00000015
+devmem2 0x0c010088 w 0x4b000204
+devmem2 0x0c010098 w 0x0000001d
+*/
+
+static struct w100_gen_regs e740_lcd_regs = {
+       .lcd_format =            0x00008023,
+       .lcdd_cntl1 =            0x0f000000,
+       .lcdd_cntl2 =            0x0003ffff,
+       .genlcd_cntl1 =          0x00ffff03,
+       .genlcd_cntl2 =          0x003c0f03,
+       .genlcd_cntl3 =          0x000143aa,
+};
+
+static struct w100_mode e740_lcd_mode = {
+       .xres            = 240,
+       .yres            = 320,
+       .left_margin     = 20,
+       .right_margin    = 28,
+       .upper_margin    = 9,
+       .lower_margin    = 8,
+       .crtc_ss         = 0x80140013,
+       .crtc_ls         = 0x81150110,
+       .crtc_gs         = 0x80050005,
+       .crtc_vpos_gs    = 0x000a0009,
+       .crtc_rev        = 0x0040010a,
+       .crtc_dclk       = 0xa906000a,
+       .crtc_gclk       = 0x80050108,
+       .crtc_goe        = 0x80050108,
+       .pll_freq        = 57,
+       .pixclk_divider         = 4,
+       .pixclk_divider_rotated = 4,
+       .pixclk_src     = CLK_SRC_XTAL,
+       .sysclk_divider  = 1,
+       .sysclk_src     = CLK_SRC_PLL,
+       .crtc_ps1_active =       0x41060010,
+};
+
+
+static struct w100_gpio_regs e740_w100_gpio_info = {
+       .init_data1 = 0x21002103,
+       .gpio_dir1  = 0xffffdeff,
+       .gpio_oe1   = 0x03c00643,
+       .init_data2 = 0x003f003f,
+       .gpio_dir2  = 0xffffffff,
+       .gpio_oe2   = 0x000000ff,
+};
+
+static struct w100fb_mach_info e740_fb_info = {
+       .modelist   = &e740_lcd_mode,
+       .num_modes  = 1,
+       .regs       = &e740_lcd_regs,
+       .gpio       = &e740_w100_gpio_info,
+       .xtal_freq = 14318000,
+       .xtal_dbl   = 1,
+};
+
+static struct resource e740_fb_resources[] = {
+       [0] = {
+               .start          = 0x0c000000,
+               .end            = 0x0cffffff,
+               .flags          = IORESOURCE_MEM,
+       },
+};
+
+/* ----------------------- device declarations -------------------------- */
+
+
+static struct platform_device e740_fb_device = {
+       .name           = "w100fb",
+       .id             = -1,
+       .dev            = {
+               .platform_data  = &e740_fb_info,
+       },
+       .num_resources  = ARRAY_SIZE(e740_fb_resources),
+       .resource       = e740_fb_resources,
+};
+
+static int e740_lcd_init(void)
+{
+       int ret;
+
+       if (!machine_is_e740())
+               return -ENODEV;
+
+       return platform_device_register(&e740_fb_device);
+}
+
+module_init(e740_lcd_init);
+
+MODULE_AUTHOR("Ian Molton <spyro@f2s.com>");
+MODULE_DESCRIPTION("e740 lcd driver");
+MODULE_LICENSE("GPLv2");
diff --git a/arch/arm/mach-pxa/e750_lcd.c b/arch/arm/mach-pxa/e750_lcd.c
new file mode 100644 (file)
index 0000000..75edc3b
--- /dev/null
@@ -0,0 +1,109 @@
+/* e750_lcd.c
+ *
+ * This file contains the definitions for the LCD timings and functions
+ * to control the LCD power / frontlighting via the w100fb driver.
+ *
+ * (c) 2005 Ian Molton <spyro@f2s.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/device.h>
+#include <linux/fb.h>
+#include <linux/err.h>
+#include <linux/platform_device.h>
+
+#include <asm/mach-types.h>
+
+#include <video/w100fb.h>
+
+static struct w100_gen_regs e750_lcd_regs = {
+       .lcd_format =            0x00008003,
+       .lcdd_cntl1 =            0x00000000,
+       .lcdd_cntl2 =            0x0003ffff,
+       .genlcd_cntl1 =          0x00fff003,
+       .genlcd_cntl2 =          0x003c0f03,
+       .genlcd_cntl3 =          0x000143aa,
+};
+
+static struct w100_mode e750_lcd_mode = {
+       .xres            = 240,
+       .yres            = 320,
+       .left_margin     = 21,
+       .right_margin    = 22,
+       .upper_margin    = 5,
+       .lower_margin    = 4,
+       .crtc_ss         = 0x80150014,
+       .crtc_ls         = 0x8014000d,
+       .crtc_gs         = 0xc1000005,
+       .crtc_vpos_gs    = 0x00020147,
+       .crtc_rev        = 0x0040010a,
+       .crtc_dclk       = 0xa1700030,
+       .crtc_gclk       = 0x80cc0015,
+       .crtc_goe        = 0x80cc0015,
+       .crtc_ps1_active = 0x61060017,
+       .pll_freq        = 57,
+       .pixclk_divider         = 4,
+       .pixclk_divider_rotated = 4,
+       .pixclk_src     = CLK_SRC_XTAL,
+       .sysclk_divider  = 1,
+       .sysclk_src     = CLK_SRC_PLL,
+};
+
+
+static struct w100_gpio_regs e750_w100_gpio_info = {
+       .init_data1 = 0x01192f1b,
+       .gpio_dir1  = 0xd5ffdeff,
+       .gpio_oe1   = 0x000020bf,
+       .init_data2 = 0x010f010f,
+       .gpio_dir2  = 0xffffffff,
+       .gpio_oe2   = 0x000001cf,
+};
+
+static struct w100fb_mach_info e750_fb_info = {
+       .modelist   = &e750_lcd_mode,
+       .num_modes  = 1,
+       .regs       = &e750_lcd_regs,
+       .gpio       = &e750_w100_gpio_info,
+       .xtal_freq  = 14318000,
+       .xtal_dbl   = 1,
+};
+
+static struct resource e750_fb_resources[] = {
+       [0] = {
+               .start          = 0x0c000000,
+               .end            = 0x0cffffff,
+               .flags          = IORESOURCE_MEM,
+       },
+};
+
+/* ----------------------- device declarations -------------------------- */
+
+
+static struct platform_device e750_fb_device = {
+       .name           = "w100fb",
+       .id             = -1,
+       .dev            = {
+               .platform_data  = &e750_fb_info,
+       },
+       .num_resources  = ARRAY_SIZE(e750_fb_resources),
+       .resource       = e750_fb_resources,
+};
+
+static int e750_lcd_init(void)
+{
+       if (!machine_is_e750())
+               return -ENODEV;
+
+       return platform_device_register(&e750_fb_device);
+}
+
+module_init(e750_lcd_init);
+
+MODULE_AUTHOR("Ian Molton <spyro@f2s.com>");
+MODULE_DESCRIPTION("e750 lcd driver");
+MODULE_LICENSE("GPLv2");
diff --git a/arch/arm/mach-pxa/e800_lcd.c b/arch/arm/mach-pxa/e800_lcd.c
new file mode 100644 (file)
index 0000000..e6aeab0
--- /dev/null
@@ -0,0 +1,159 @@
+/* e800_lcd.c
+ *
+ * This file contains the definitions for the LCD timings and functions
+ * to control the LCD power / frontlighting via the w100fb driver.
+ *
+ * (c) 2005 Ian Molton <spyro@f2s.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/device.h>
+#include <linux/fb.h>
+#include <linux/err.h>
+#include <linux/platform_device.h>
+
+#include <asm/mach-types.h>
+
+#include <video/w100fb.h>
+
+static struct w100_gen_regs e800_lcd_regs = {
+       .lcd_format =            0x00008003,
+       .lcdd_cntl1 =            0x02a00000,
+       .lcdd_cntl2 =            0x0003ffff,
+       .genlcd_cntl1 =          0x000ff2a3,
+       .genlcd_cntl2 =          0x000002a3,
+       .genlcd_cntl3 =          0x000102aa,
+};
+
+static struct w100_mode e800_lcd_mode[2] = {
+       [0] = {
+               .xres            = 480,
+               .yres            = 640,
+               .left_margin     = 52,
+               .right_margin    = 148,
+               .upper_margin    = 2,
+               .lower_margin    = 6,
+               .crtc_ss         = 0x80350034,
+               .crtc_ls         = 0x802b0026,
+               .crtc_gs         = 0x80160016,
+               .crtc_vpos_gs    = 0x00020003,
+               .crtc_rev        = 0x0040001d,
+               .crtc_dclk       = 0xe0000000,
+               .crtc_gclk       = 0x82a50049,
+               .crtc_goe        = 0x80ee001c,
+               .crtc_ps1_active = 0x00000000,
+               .pll_freq        = 128,
+               .pixclk_divider         = 4,
+               .pixclk_divider_rotated = 6,
+               .pixclk_src     = CLK_SRC_PLL,
+               .sysclk_divider  = 0,
+               .sysclk_src     = CLK_SRC_PLL,
+       },
+       [1] = {
+               .xres            = 240,
+               .yres            = 320,
+               .left_margin     = 15,
+               .right_margin    = 88,
+               .upper_margin    = 0,
+               .lower_margin    = 7,
+               .crtc_ss         = 0xd010000f,
+               .crtc_ls         = 0x80070003,
+               .crtc_gs         = 0x80000000,
+               .crtc_vpos_gs    = 0x01460147,
+               .crtc_rev        = 0x00400003,
+               .crtc_dclk       = 0xa1700030,
+               .crtc_gclk       = 0x814b0008,
+               .crtc_goe        = 0x80cc0015,
+               .crtc_ps1_active = 0x00000000,
+               .pll_freq        = 100,
+               .pixclk_divider         = 6, /* Wince uses 14 which gives a 7MHz pclk. */
+               .pixclk_divider_rotated = 6, /* we want a 14MHz one (much nicer to look at) */
+               .pixclk_src     = CLK_SRC_PLL,
+               .sysclk_divider  = 0,
+               .sysclk_src     = CLK_SRC_PLL,
+       }
+};
+
+
+static struct w100_gpio_regs e800_w100_gpio_info = {
+       .init_data1 = 0xc13fc019,
+       .gpio_dir1  = 0x3e40df7f,
+       .gpio_oe1   = 0x003c3000,
+       .init_data2 = 0x00000000,
+       .gpio_dir2  = 0x00000000,
+       .gpio_oe2   = 0x00000000,
+};
+
+static struct w100_mem_info e800_w100_mem_info = {
+       .ext_cntl        = 0x09640011,
+       .sdram_mode_reg  = 0x00600021,
+       .ext_timing_cntl = 0x10001545,
+       .io_cntl         = 0x7ddd7333,
+       .size            = 0x1fffff,
+};
+
+static void e800_tg_change(struct w100fb_par *par)
+{
+       unsigned long tmp;
+
+       tmp = w100fb_gpio_read(W100_GPIO_PORT_A);
+       if (par->mode->xres == 480)
+               tmp |= 0x100;
+       else
+               tmp &= ~0x100;
+       w100fb_gpio_write(W100_GPIO_PORT_A, tmp);
+}
+
+static struct w100_tg_info e800_tg_info = {
+       .change = e800_tg_change,
+};
+
+static struct w100fb_mach_info e800_fb_info = {
+       .modelist   = e800_lcd_mode,
+       .num_modes  = 2,
+       .regs       = &e800_lcd_regs,
+       .gpio       = &e800_w100_gpio_info,
+       .mem        = &e800_w100_mem_info,
+       .tg         = &e800_tg_info,
+       .xtal_freq  = 16000000,
+};
+
+static struct resource e800_fb_resources[] = {
+       [0] = {
+               .start          = 0x0c000000,
+               .end            = 0x0cffffff,
+               .flags          = IORESOURCE_MEM,
+       },
+};
+
+/* ----------------------- device declarations -------------------------- */
+
+
+static struct platform_device e800_fb_device = {
+       .name           = "w100fb",
+       .id             = -1,
+       .dev            = {
+               .platform_data  = &e800_fb_info,
+       },
+       .num_resources  = ARRAY_SIZE(e800_fb_resources),
+       .resource       = e800_fb_resources,
+};
+
+static int e800_lcd_init(void)
+{
+       if (!machine_is_e800())
+               return -ENODEV;
+
+       return platform_device_register(&e800_fb_device);
+}
+
+module_init(e800_lcd_init);
+
+MODULE_AUTHOR("Ian Molton <spyro@f2s.com>");
+MODULE_DESCRIPTION("e800 lcd driver");
+MODULE_LICENSE("GPLv2");
index 1bf6807499284a3e298f8b12167267b8d7ce63f0..e5cc6ca63c754e687f75f0391fbb60f2fbb8d02e 100644 (file)
@@ -1,7 +1,7 @@
 /*
- * Support for CompuLab EM-x270 platform
+ * Support for CompuLab EM-X270 platform
  *
- * Copyright (C) 2007 CompuLab, Ltd.
+ * Copyright (C) 2007, 2008 CompuLab, Ltd.
  * Author: Mike Rapoport <mike@compulab.co.il>
  *
  * This program is free software; you can redistribute it and/or modify
 
 #include <linux/dm9000.h>
 #include <linux/rtc-v3020.h>
-
 #include <linux/mtd/nand.h>
 #include <linux/mtd/partitions.h>
+#include <linux/input.h>
+#include <linux/gpio_keys.h>
+#include <linux/gpio.h>
 
 #include <asm/mach-types.h>
-
 #include <asm/mach/arch.h>
 
+#include <asm/arch/mfp-pxa27x.h>
 #include <asm/arch/pxa-regs.h>
-#include <asm/arch/pxa2xx-gpio.h>
 #include <asm/arch/pxa27x-udc.h>
 #include <asm/arch/audio.h>
 #include <asm/arch/pxafb.h>
 #include <asm/arch/ohci.h>
 #include <asm/arch/mmc.h>
-#include <asm/arch/bitfield.h>
+#include <asm/arch/pxa27x_keypad.h>
 
 #include "generic.h"
 
 /* GPIO IRQ usage */
-#define EM_X270_MMC_PD         (105)
-#define EM_X270_ETHIRQ         IRQ_GPIO(41)
-#define EM_X270_MMC_IRQ                IRQ_GPIO(13)
+#define GPIO41_ETHIRQ          (41)
+#define GPIO13_MMC_CD          (13)
+#define EM_X270_ETHIRQ         IRQ_GPIO(GPIO41_ETHIRQ)
+#define EM_X270_MMC_CD         IRQ_GPIO(GPIO13_MMC_CD)
+
+/* NAND control GPIOs */
+#define GPIO11_NAND_CS (11)
+#define GPIO56_NAND_RB (56)
+
+static unsigned long em_x270_pin_config[] = {
+       /* AC'97 */
+       GPIO28_AC97_BITCLK,
+       GPIO29_AC97_SDATA_IN_0,
+       GPIO30_AC97_SDATA_OUT,
+       GPIO31_AC97_SYNC,
+       GPIO98_AC97_SYSCLK,
+       GPIO113_AC97_nRESET,
+
+       /* BTUART */
+       GPIO42_BTUART_RXD,
+       GPIO43_BTUART_TXD,
+       GPIO44_BTUART_CTS,
+       GPIO45_BTUART_RTS,
+
+       /* STUART */
+       GPIO46_STUART_RXD,
+       GPIO47_STUART_TXD,
+
+       /* MCI controller */
+       GPIO32_MMC_CLK,
+       GPIO112_MMC_CMD,
+       GPIO92_MMC_DAT_0,
+       GPIO109_MMC_DAT_1,
+       GPIO110_MMC_DAT_2,
+       GPIO111_MMC_DAT_3,
+
+       /* LCD */
+       GPIO58_LCD_LDD_0,
+       GPIO59_LCD_LDD_1,
+       GPIO60_LCD_LDD_2,
+       GPIO61_LCD_LDD_3,
+       GPIO62_LCD_LDD_4,
+       GPIO63_LCD_LDD_5,
+       GPIO64_LCD_LDD_6,
+       GPIO65_LCD_LDD_7,
+       GPIO66_LCD_LDD_8,
+       GPIO67_LCD_LDD_9,
+       GPIO68_LCD_LDD_10,
+       GPIO69_LCD_LDD_11,
+       GPIO70_LCD_LDD_12,
+       GPIO71_LCD_LDD_13,
+       GPIO72_LCD_LDD_14,
+       GPIO73_LCD_LDD_15,
+       GPIO74_LCD_FCLK,
+       GPIO75_LCD_LCLK,
+       GPIO76_LCD_PCLK,
+       GPIO77_LCD_BIAS,
+
+       /* QCI */
+       GPIO84_CIF_FV,
+       GPIO25_CIF_LV,
+       GPIO53_CIF_MCLK,
+       GPIO54_CIF_PCLK,
+       GPIO81_CIF_DD_0,
+       GPIO55_CIF_DD_1,
+       GPIO51_CIF_DD_2,
+       GPIO50_CIF_DD_3,
+       GPIO52_CIF_DD_4,
+       GPIO48_CIF_DD_5,
+       GPIO17_CIF_DD_6,
+       GPIO12_CIF_DD_7,
+
+       /* I2C */
+       GPIO117_I2C_SCL,
+       GPIO118_I2C_SDA,
+
+       /* Keypad */
+       GPIO100_KP_MKIN_0       | WAKEUP_ON_LEVEL_HIGH,
+       GPIO101_KP_MKIN_1       | WAKEUP_ON_LEVEL_HIGH,
+       GPIO102_KP_MKIN_2       | WAKEUP_ON_LEVEL_HIGH,
+       GPIO34_KP_MKIN_3        | WAKEUP_ON_LEVEL_HIGH,
+       GPIO39_KP_MKIN_4        | WAKEUP_ON_LEVEL_HIGH,
+       GPIO99_KP_MKIN_5        | WAKEUP_ON_LEVEL_HIGH,
+       GPIO91_KP_MKIN_6        | WAKEUP_ON_LEVEL_HIGH,
+       GPIO36_KP_MKIN_7        | WAKEUP_ON_LEVEL_HIGH,
+       GPIO103_KP_MKOUT_0,
+       GPIO104_KP_MKOUT_1,
+       GPIO105_KP_MKOUT_2,
+       GPIO106_KP_MKOUT_3,
+       GPIO107_KP_MKOUT_4,
+       GPIO108_KP_MKOUT_5,
+       GPIO96_KP_MKOUT_6,
+       GPIO22_KP_MKOUT_7,
+
+       /* SSP1 */
+       GPIO26_SSP1_RXD,
+       GPIO23_SSP1_SCLK,
+       GPIO24_SSP1_SFRM,
+       GPIO57_SSP1_TXD,
+
+       /* SSP2 */
+       GPIO19_SSP2_SCLK,
+       GPIO14_SSP2_SFRM,
+       GPIO89_SSP2_TXD,
+       GPIO88_SSP2_RXD,
+
+       /* SDRAM and local bus */
+       GPIO15_nCS_1,
+       GPIO78_nCS_2,
+       GPIO79_nCS_3,
+       GPIO80_nCS_4,
+       GPIO49_nPWE,
+       GPIO18_RDY,
+
+       /* GPIO */
+       GPIO1_GPIO | WAKEUP_ON_EDGE_BOTH,
+
+       /* power controls */
+       GPIO20_GPIO     | MFP_LPM_DRIVE_LOW,    /* GPRS_PWEN */
+       GPIO115_GPIO    | MFP_LPM_DRIVE_LOW,    /* WLAN_PWEN */
+
+       /* NAND controls */
+       GPIO11_GPIO     | MFP_LPM_DRIVE_HIGH,   /* NAND CE# */
+       GPIO56_GPIO,                            /* NAND Ready/Busy */
+
+       /* interrupts */
+       GPIO13_GPIO,    /* MMC card detect */
+       GPIO41_GPIO,    /* DM9000 interrupt */
+};
 
-static struct resource em_x270_dm9k_resource[] = {
+#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
+static struct resource em_x270_dm9000_resource[] = {
        [0] = {
                .start = PXA_CS2_PHYS,
                .end   = PXA_CS2_PHYS + 3,
@@ -56,32 +184,30 @@ static struct resource em_x270_dm9k_resource[] = {
        }
 };
 
-/* for the moment we limit ourselves to 32bit IO until some
- * better IO routines can be written and tested
- */
-static struct dm9000_plat_data em_x270_dm9k_platdata = {
+static struct dm9000_plat_data em_x270_dm9000_platdata = {
        .flags          = DM9000_PLATF_32BITONLY,
 };
 
-/* Ethernet device */
-static struct platform_device em_x270_dm9k = {
+static struct platform_device em_x270_dm9000 = {
        .name           = "dm9000",
        .id             = 0,
-       .num_resources  = ARRAY_SIZE(em_x270_dm9k_resource),
-       .resource       = em_x270_dm9k_resource,
+       .num_resources  = ARRAY_SIZE(em_x270_dm9000_resource),
+       .resource       = em_x270_dm9000_resource,
        .dev            = {
-               .platform_data = &em_x270_dm9k_platdata,
+               .platform_data = &em_x270_dm9000_platdata,
        }
 };
 
-/* WM9712 touchscreen controller. Hopefully the driver will make it to
- * the mainstream sometime */
-static struct platform_device em_x270_ts = {
-       .name           = "wm97xx-ts",
-       .id             = -1,
-};
+static void __init em_x270_init_dm9000(void)
+{
+       platform_device_register(&em_x270_dm9000);
+}
+#else
+static inline void em_x270_init_dm9000(void) {}
+#endif
 
-/* RTC */
+/* V3020 RTC */
+#if defined(CONFIG_RTC_DRV_V3020) || defined(CONFIG_RTC_DRV_V3020_MODULE)
 static struct resource em_x270_v3020_resource[] = {
        [0] = {
                .start = PXA_CS4_PHYS,
@@ -104,20 +230,26 @@ static struct platform_device em_x270_rtc = {
        }
 };
 
-/* NAND flash */
-#define GPIO_NAND_CS   (11)
-#define GPIO_NAND_RB   (56)
+static void __init em_x270_init_rtc(void)
+{
+       platform_device_register(&em_x270_rtc);
+}
+#else
+static inline void em_x270_init_rtc(void) {}
+#endif
 
+/* NAND flash */
+#if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
 static inline void nand_cs_on(void)
 {
-       GPCR(GPIO_NAND_CS) = GPIO_bit(GPIO_NAND_CS);
+       gpio_set_value(GPIO11_NAND_CS, 0);
 }
 
 static void nand_cs_off(void)
 {
        dsb();
 
-       GPSR(GPIO_NAND_CS) = GPIO_bit(GPIO_NAND_CS);
+       gpio_set_value(GPIO11_NAND_CS, 1);
 }
 
 /* hardware specific access to control-lines */
@@ -157,7 +289,7 @@ static int em_x270_nand_device_ready(struct mtd_info *mtd)
 {
        dsb();
 
-       return GPLR(GPIO_NAND_RB) & GPIO_bit(GPIO_NAND_RB);
+       return gpio_get_value(GPIO56_NAND_RB);
 }
 
 static struct mtd_partition em_x270_partition_info[] = {
@@ -210,16 +342,35 @@ static struct platform_device em_x270_nand = {
        }
 };
 
-/* platform devices */
-static struct platform_device *platform_devices[] __initdata = {
-       &em_x270_dm9k,
-       &em_x270_ts,
-       &em_x270_rtc,
-       &em_x270_nand,
-};
+static void __init em_x270_init_nand(void)
+{
+       int err;
 
+       err = gpio_request(GPIO11_NAND_CS, "NAND CS");
+       if (err) {
+               pr_warning("EM-X270: failed to request NAND CS gpio\n");
+               return;
+       }
+
+       gpio_direction_output(GPIO11_NAND_CS, 1);
+
+       err = gpio_request(GPIO56_NAND_RB, "NAND R/B");
+       if (err) {
+               pr_warning("EM-X270: failed to request NAND R/B gpio\n");
+               gpio_free(GPIO11_NAND_CS);
+               return;
+       }
+
+       gpio_direction_input(GPIO56_NAND_RB);
+
+       platform_device_register(&em_x270_nand);
+}
+#else
+static inline void em_x270_init_nand(void) {}
+#endif
 
 /* PXA27x OHCI controller setup */
+#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
 static int em_x270_ohci_init(struct device *dev)
 {
        /* Set the Power Control Polarity Low */
@@ -237,27 +388,23 @@ static struct pxaohci_platform_data em_x270_ohci_platform_data = {
        .init           = em_x270_ohci_init,
 };
 
+static void __init em_x270_init_ohci(void)
+{
+       pxa_set_ohci_info(&em_x270_ohci_platform_data);
+}
+#else
+static inline void em_x270_init_ohci(void) {}
+#endif
 
+/* MCI controller setup */
+#if defined(CONFIG_MMC) || defined(CONFIG_MMC_MODULE)
 static int em_x270_mci_init(struct device *dev,
                            irq_handler_t em_x270_detect_int,
                            void *data)
 {
-       int err;
-
-       /* setup GPIO for PXA27x MMC controller */
-       pxa_gpio_mode(GPIO32_MMCCLK_MD);
-       pxa_gpio_mode(GPIO112_MMCCMD_MD);
-       pxa_gpio_mode(GPIO92_MMCDAT0_MD);
-       pxa_gpio_mode(GPIO109_MMCDAT1_MD);
-       pxa_gpio_mode(GPIO110_MMCDAT2_MD);
-       pxa_gpio_mode(GPIO111_MMCDAT3_MD);
-
-       /* EM-X270 uses GPIO13 as SD power enable */
-       pxa_gpio_mode(EM_X270_MMC_PD | GPIO_OUT);
-
-       err = request_irq(EM_X270_MMC_IRQ, em_x270_detect_int,
-                         IRQF_DISABLED | IRQF_TRIGGER_FALLING,
-                         "MMC card detect", data);
+       int err = request_irq(EM_X270_MMC_CD, em_x270_detect_int,
+                             IRQF_DISABLED | IRQF_TRIGGER_FALLING,
+                             "MMC card detect", data);
        if (err) {
                printk(KERN_ERR "%s: can't request MMC card detect IRQ: %d\n",
                       __func__, err);
@@ -279,7 +426,8 @@ static void em_x270_mci_setpower(struct device *dev, unsigned int vdd)
 
 static void em_x270_mci_exit(struct device *dev, void *data)
 {
-       free_irq(EM_X270_MMC_IRQ, data);
+       int irq = gpio_to_irq(GPIO13_MMC_CD);
+       free_irq(irq, data);
 }
 
 static struct pxamci_platform_data em_x270_mci_platform_data = {
@@ -289,7 +437,16 @@ static struct pxamci_platform_data em_x270_mci_platform_data = {
        .exit           = em_x270_mci_exit,
 };
 
+static void __init em_x270_init_mmc(void)
+{
+       pxa_set_mci_info(&em_x270_mci_platform_data);
+}
+#else
+static inline void em_x270_init_mmc(void) {}
+#endif
+
 /* LCD 480x640 */
+#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
 static struct pxafb_mode_info em_x270_lcd_mode = {
        .pixclock       = 50000,
        .bpp            = 16,
@@ -307,40 +464,96 @@ static struct pxafb_mode_info em_x270_lcd_mode = {
 static struct pxafb_mach_info em_x270_lcd = {
        .modes          = &em_x270_lcd_mode,
        .num_modes      = 1,
-       .cmap_inverse   = 0,
-       .cmap_static    = 0,
-       .lccr0          = LCCR0_PAS,
-       .lccr3          = LCCR3_PixClkDiv(0x01) | LCCR3_Acb(0xff),
+       .lcd_conn       = LCD_COLOR_TFT_16BPP,
 };
-
-static void __init em_x270_init(void)
+static void __init em_x270_init_lcd(void)
 {
-       /* setup LCD */
        set_pxa_fb_info(&em_x270_lcd);
+}
+#else
+static inline void em_x270_init_lcd(void) {}
+#endif
 
-       /* register EM-X270 platform devices */
-       platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
+#if defined(CONFIG_SND_PXA2XX_AC97) || defined(CONFIG_SND_PXA2XX_AC97_MODULE)
+static void __init em_x270_init_ac97(void)
+{
        pxa_set_ac97_info(NULL);
+}
+#else
+static inline void em_x270_init_ac97(void) {}
+#endif
+
+#if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULE)
+static unsigned int em_x270_matrix_keys[] = {
+       KEY(0, 0, KEY_A), KEY(1, 0, KEY_UP), KEY(2, 1, KEY_B),
+       KEY(0, 2, KEY_LEFT), KEY(1, 1, KEY_ENTER), KEY(2, 0, KEY_RIGHT),
+       KEY(0, 1, KEY_C), KEY(1, 2, KEY_DOWN), KEY(2, 2, KEY_D),
+};
 
-       /* set MCI and OHCI platform parameters */
-       pxa_set_mci_info(&em_x270_mci_platform_data);
-       pxa_set_ohci_info(&em_x270_ohci_platform_data);
+struct pxa27x_keypad_platform_data em_x270_keypad_info = {
+       /* code map for the matrix keys */
+       .matrix_key_rows        = 3,
+       .matrix_key_cols        = 3,
+       .matrix_key_map         = em_x270_matrix_keys,
+       .matrix_key_map_size    = ARRAY_SIZE(em_x270_matrix_keys),
+};
+
+static void __init em_x270_init_keypad(void)
+{
+       pxa_set_keypad_info(&em_x270_keypad_info);
+}
+#else
+static inline void em_x270_init_keypad(void) {}
+#endif
 
-       /* setup STUART GPIOs */
-       pxa_gpio_mode(GPIO46_STRXD_MD);
-       pxa_gpio_mode(GPIO47_STTXD_MD);
+#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
+static struct gpio_keys_button gpio_keys_button[] = {
+       [0] = {
+               .desc   = "sleep/wakeup",
+               .code   = KEY_SUSPEND,
+               .type   = EV_PWR,
+               .gpio   = 1,
+               .wakeup = 1,
+       },
+};
 
-       /* setup BTUART GPIOs */
-       pxa_gpio_mode(GPIO42_BTRXD_MD);
-       pxa_gpio_mode(GPIO43_BTTXD_MD);
-       pxa_gpio_mode(GPIO44_BTCTS_MD);
-       pxa_gpio_mode(GPIO45_BTRTS_MD);
+static struct gpio_keys_platform_data em_x270_gpio_keys_data = {
+       .buttons        = gpio_keys_button,
+       .nbuttons       = 1,
+};
 
-       /* Setup interrupt for dm9000 */
-       set_irq_type(EM_X270_ETHIRQ, IRQT_RISING);
+static struct platform_device em_x270_gpio_keys = {
+       .name           = "gpio-keys",
+       .id             = -1,
+       .dev            = {
+               .platform_data  = &em_x270_gpio_keys_data,
+       },
+};
+
+static void __init em_x270_init_gpio_keys(void)
+{
+       platform_device_register(&em_x270_gpio_keys);
+}
+#else
+static inline void em_x270_init_gpio_keys(void) {}
+#endif
+
+static void __init em_x270_init(void)
+{
+       pxa2xx_mfp_config(ARRAY_AND_SIZE(em_x270_pin_config));
+
+       em_x270_init_dm9000();
+       em_x270_init_rtc();
+       em_x270_init_nand();
+       em_x270_init_lcd();
+       em_x270_init_mmc();
+       em_x270_init_ohci();
+       em_x270_init_keypad();
+       em_x270_init_gpio_keys();
+       em_x270_init_ac97();
 }
 
-MACHINE_START(EM_X270, "Compulab EM-x270")
+MACHINE_START(EM_X270, "Compulab EM-X270")
        .boot_params    = 0xa0000100,
        .phys_io        = 0x40000000,
        .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
index ee0ae93c876a4c82971463cc27e77d25ff3da750..c29b7b21c11be82862accaa0c3aa7e9620b1d0b2 100644 (file)
@@ -17,7 +17,7 @@
 #include <asm/arch/hardware.h>
 #include <asm/mach-types.h>
 
-#include <generic.h>
+#include "generic.h"
 
 /* Only e800 has 128MB RAM */
 static void __init eseries_fixup(struct machine_desc *desc,
@@ -47,6 +47,19 @@ MACHINE_START(E330, "Toshiba e330")
 MACHINE_END
 #endif
 
+#ifdef CONFIG_MACH_E350
+MACHINE_START(E350, "Toshiba e350")
+       /* Maintainer: Ian Molton (spyro@f2s.com) */
+       .phys_io        = 0x40000000,
+       .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
+       .boot_params    = 0xa0000100,
+       .map_io         = pxa_map_io,
+       .init_irq       = pxa25x_init_irq,
+       .fixup          = eseries_fixup,
+       .timer = &pxa_timer,
+MACHINE_END
+#endif
+
 #ifdef CONFIG_MACH_E740
 MACHINE_START(E740, "Toshiba e740")
         /* Maintainer: Ian Molton (spyro@f2s.com) */
diff --git a/arch/arm/mach-pxa/eseries_udc.c b/arch/arm/mach-pxa/eseries_udc.c
new file mode 100644 (file)
index 0000000..362847a
--- /dev/null
@@ -0,0 +1,57 @@
+/*
+ * UDC functions for the Toshiba e-series PDAs
+ *
+ * Copyright (c) Ian Molton 2003
+ *
+ * This file is licensed under
+ * the terms of the GNU General Public License version 2. This program
+ * is licensed "as is" without any warranty of any kind, whether express
+ * or implied.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/device.h>
+
+#include <asm/arch/udc.h>
+#include <asm/arch/eseries-gpio.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/pxa-regs.h>
+#include <asm/mach/arch.h>
+#include <asm/mach-types.h>
+#include <asm/mach/map.h>
+#include <asm/domain.h>
+
+/* local PXA generic code */
+#include "generic.h"
+
+static struct pxa2xx_udc_mach_info e7xx_udc_mach_info = {
+       .gpio_vbus   = GPIO_E7XX_USB_DISC,
+       .gpio_pullup = GPIO_E7XX_USB_PULLUP,
+       .gpio_pullup_inverted = 1
+};
+
+static struct pxa2xx_udc_mach_info e800_udc_mach_info = {
+       .gpio_vbus   = GPIO_E800_USB_DISC,
+       .gpio_pullup = GPIO_E800_USB_PULLUP,
+       .gpio_pullup_inverted = 1
+};
+
+static int __init eseries_udc_init(void)
+{
+       if (machine_is_e330() || machine_is_e350() ||
+           machine_is_e740() || machine_is_e750() ||
+           machine_is_e400())
+               pxa_set_udc_info(&e7xx_udc_mach_info);
+       else if (machine_is_e800())
+               pxa_set_udc_info(&e800_udc_mach_info);
+
+       return 0;
+}
+
+module_init(eseries_udc_init);
+
+MODULE_AUTHOR("Ian Molton <spyro@f2s.com>");
+MODULE_DESCRIPTION("eseries UDC support");
+MODULE_LICENSE("GPLv2");
diff --git a/arch/arm/mach-pxa/ezx.c b/arch/arm/mach-pxa/ezx.c
new file mode 100644 (file)
index 0000000..0143eed
--- /dev/null
@@ -0,0 +1,220 @@
+/*
+ *  ezx.c - Common code for the EZX platform.
+ *
+ *  Copyright (C) 2005-2006 Harald Welte <laforge@openezx.org>,
+ *               2007-2008 Daniel Ribeiro <drwyrm@gmail.com>,
+ *               2007-2008 Stefan Schmidt <stefan@datenfreihafen.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License version 2 as
+ *  published by the Free Software Foundation.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/delay.h>
+#include <linux/pwm_backlight.h>
+
+#include <asm/setup.h>
+#include <asm/arch/pxafb.h>
+#include <asm/arch/ohci.h>
+#include <asm/arch/i2c.h>
+
+#include <asm/arch/mfp-pxa27x.h>
+#include <asm/arch/pxa-regs.h>
+#include <asm/arch/pxa2xx-regs.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+
+#include "devices.h"
+#include "generic.h"
+
+static struct platform_pwm_backlight_data ezx_backlight_data = {
+       .pwm_id         = 0,
+       .max_brightness = 1023,
+       .dft_brightness = 1023,
+       .pwm_period_ns  = 78770,
+};
+
+static struct platform_device ezx_backlight_device = {
+       .name           = "pwm-backlight",
+       .dev            = {
+               .parent = &pxa27x_device_pwm0.dev,
+               .platform_data = &ezx_backlight_data,
+       },
+};
+
+static struct pxafb_mode_info mode_ezx_old = {
+       .pixclock               = 150000,
+       .xres                   = 240,
+       .yres                   = 320,
+       .bpp                    = 16,
+       .hsync_len              = 10,
+       .left_margin            = 20,
+       .right_margin           = 10,
+       .vsync_len              = 2,
+       .upper_margin           = 3,
+       .lower_margin           = 2,
+       .sync                   = 0,
+};
+
+static struct pxafb_mach_info ezx_fb_info_1 = {
+       .modes          = &mode_ezx_old,
+       .num_modes      = 1,
+       .lcd_conn       = LCD_COLOR_TFT_16BPP,
+};
+
+static struct pxafb_mode_info mode_72r89803y01 = {
+       .pixclock               = 192308,
+       .xres                   = 240,
+       .yres                   = 320,
+       .bpp                    = 32,
+       .depth                  = 18,
+       .hsync_len              = 10,
+       .left_margin            = 20,
+       .right_margin           = 10,
+       .vsync_len              = 2,
+       .upper_margin           = 3,
+       .lower_margin           = 2,
+       .sync                   = 0,
+};
+
+static struct pxafb_mach_info ezx_fb_info_2 = {
+       .modes          = &mode_72r89803y01,
+       .num_modes      = 1,
+       .lcd_conn       = LCD_COLOR_TFT_18BPP,
+};
+
+static struct platform_device *devices[] __initdata = {
+       &ezx_backlight_device,
+};
+
+static unsigned long ezx_pin_config[] __initdata = {
+       /* PWM backlight */
+       GPIO16_PWM0_OUT,
+
+       /* BTUART */
+       GPIO42_BTUART_RXD,
+       GPIO43_BTUART_TXD,
+       GPIO44_BTUART_CTS,
+       GPIO45_BTUART_RTS,
+
+       /* STUART */
+       GPIO46_STUART_RXD,
+       GPIO47_STUART_TXD,
+
+       /* For A780 support (connected with Neptune GSM chip) */
+       GPIO30_USB_P3_2,        /* ICL_TXENB */
+       GPIO31_USB_P3_6,        /* ICL_VPOUT */
+       GPIO90_USB_P3_5,        /* ICL_VPIN */
+       GPIO91_USB_P3_1,        /* ICL_XRXD */
+       GPIO56_USB_P3_4,        /* ICL_VMOUT */
+       GPIO113_USB_P3_3,       /* /ICL_VMIN */
+};
+
+static void __init ezx_init(void)
+{
+       pxa2xx_mfp_config(ARRAY_AND_SIZE(ezx_pin_config));
+       pxa_set_i2c_info(NULL);
+       if (machine_is_ezx_a780() || machine_is_ezx_e680())
+               set_pxa_fb_info(&ezx_fb_info_1);
+       else
+               set_pxa_fb_info(&ezx_fb_info_2);
+
+       platform_add_devices(devices, ARRAY_SIZE(devices));
+}
+
+static void __init ezx_fixup(struct machine_desc *desc, struct tag *tags,
+               char **cmdline, struct meminfo *mi)
+{
+       /* We have two ram chips. First one with 32MB at 0xA0000000 and a second
+        * 16MB one at 0xAC000000
+        */
+       mi->nr_banks = 2;
+       mi->bank[0].start = 0xa0000000;
+       mi->bank[0].node = 0;
+       mi->bank[0].size = (32*1024*1024);
+       mi->bank[1].start = 0xac000000;
+       mi->bank[1].node = 1;
+       mi->bank[1].size = (16*1024*1024);
+}
+
+#ifdef CONFIG_MACH_EZX_A780
+MACHINE_START(EZX_A780, "Motorola EZX A780")
+       .phys_io        = 0x40000000,
+       .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
+       .fixup                  = ezx_fixup,
+       .boot_params    = 0xa0000100,
+       .map_io         = pxa_map_io,
+       .init_irq       = pxa27x_init_irq,
+       .timer          = &pxa_timer,
+       .init_machine   = &ezx_init,
+MACHINE_END
+#endif
+
+#ifdef CONFIG_MACH_EZX_E680
+MACHINE_START(EZX_E680, "Motorola EZX E680")
+       .phys_io        = 0x40000000,
+       .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
+       .fixup                  = ezx_fixup,
+       .boot_params    = 0xa0000100,
+       .map_io         = pxa_map_io,
+       .init_irq       = pxa27x_init_irq,
+       .timer          = &pxa_timer,
+       .init_machine   = &ezx_init,
+MACHINE_END
+#endif
+
+#ifdef CONFIG_MACH_EZX_A1200
+MACHINE_START(EZX_A1200, "Motorola EZX A1200")
+       .phys_io        = 0x40000000,
+       .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
+       .fixup                  = ezx_fixup,
+       .boot_params    = 0xa0000100,
+       .map_io         = pxa_map_io,
+       .init_irq       = pxa27x_init_irq,
+       .timer          = &pxa_timer,
+       .init_machine   = &ezx_init,
+MACHINE_END
+#endif
+
+#ifdef CONFIG_MACH_EZX_A910
+MACHINE_START(EZX_A910, "Motorola EZX A910")
+       .phys_io        = 0x40000000,
+       .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
+       .fixup                  = ezx_fixup,
+       .boot_params    = 0xa0000100,
+       .map_io         = pxa_map_io,
+       .init_irq       = pxa27x_init_irq,
+       .timer          = &pxa_timer,
+       .init_machine   = &ezx_init,
+MACHINE_END
+#endif
+
+#ifdef CONFIG_MACH_EZX_E6
+MACHINE_START(EZX_E6, "Motorola EZX E6")
+       .phys_io        = 0x40000000,
+       .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
+       .fixup                  = ezx_fixup,
+       .boot_params    = 0xa0000100,
+       .map_io         = pxa_map_io,
+       .init_irq       = pxa27x_init_irq,
+       .timer          = &pxa_timer,
+       .init_machine   = &ezx_init,
+MACHINE_END
+#endif
+
+#ifdef CONFIG_MACH_EZX_E2
+MACHINE_START(EZX_E2, "Motorola EZX E2")
+       .phys_io        = 0x40000000,
+       .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
+       .fixup                  = ezx_fixup,
+       .boot_params    = 0xa0000100,
+       .map_io         = pxa_map_io,
+       .init_irq       = pxa27x_init_irq,
+       .timer          = &pxa_timer,
+       .init_machine   = &ezx_init,
+MACHINE_END
+#endif
index 530654474bb23bda983e2909b6bbf802748d44d3..dd759d03a9fd90ff1d64ec37a2beaa83e3382a85 100644 (file)
@@ -20,6 +20,7 @@
 #include <linux/delay.h>
 #include <linux/platform_device.h>
 #include <linux/clk.h>
+#include <linux/smc91x.h>
 
 #include <asm/types.h>
 #include <asm/setup.h>
@@ -38,6 +39,7 @@
 #include <asm/arch/pxafb.h>
 #include <asm/arch/ssp.h>
 #include <asm/arch/pxa27x_keypad.h>
+#include <asm/arch/pxa3xx_nand.h>
 #include <asm/arch/littleton.h>
 
 #include "generic.h"
@@ -101,18 +103,26 @@ static struct resource smc91x_resources[] = {
        [1] = {
                .start  = IRQ_GPIO(mfp_to_gpio(MFP_PIN_GPIO90)),
                .end    = IRQ_GPIO(mfp_to_gpio(MFP_PIN_GPIO90)),
-               .flags  = IORESOURCE_IRQ | IRQF_TRIGGER_FALLING,
+               .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
        }
 };
 
+static struct smc91x_platdata littleton_smc91x_info = {
+       .flags  = SMC91X_USE_8BIT | SMC91X_USE_16BIT |
+                 SMC91X_NOWAIT | SMC91X_USE_DMA,
+};
+
 static struct platform_device smc91x_device = {
        .name           = "smc91x",
        .id             = 0,
        .num_resources  = ARRAY_SIZE(smc91x_resources),
        .resource       = smc91x_resources,
+       .dev            = {
+               .platform_data = &littleton_smc91x_info,
+       },
 };
 
-#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULES)
+#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
 /* use bit 30, 31 as the indicator of command parameter number */
 #define CMD0(x)                ((0x00000000) | ((x) << 9))
 #define CMD1(x, x1)    ((0x40000000) | ((x) << 9) | 0x100 | (x1))
@@ -311,9 +321,9 @@ static void littleton_init_lcd(void)
 }
 #else
 static inline void littleton_init_lcd(void) {};
-#endif /* CONFIG_FB_PXA || CONFIG_FB_PXA_MODULES */
+#endif /* CONFIG_FB_PXA || CONFIG_FB_PXA_MODULE */
 
-#if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULES)
+#if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULE)
 static unsigned int littleton_matrix_key_map[] = {
        /* KEY(row, col, key_code) */
        KEY(1, 3, KEY_0), KEY(0, 0, KEY_1), KEY(1, 0, KEY_2), KEY(2, 0, KEY_3),
@@ -361,6 +371,57 @@ static void __init littleton_init_keypad(void)
 static inline void littleton_init_keypad(void) {}
 #endif
 
+#if defined(CONFIG_MTD_NAND_PXA3xx) || defined(CONFIG_MTD_NAND_PXA3xx_MODULE)
+static struct mtd_partition littleton_nand_partitions[] = {
+       [0] = {
+               .name        = "Bootloader",
+               .offset      = 0,
+               .size        = 0x060000,
+               .mask_flags  = MTD_WRITEABLE, /* force read-only */
+       },
+       [1] = {
+               .name        = "Kernel",
+               .offset      = 0x060000,
+               .size        = 0x200000,
+               .mask_flags  = MTD_WRITEABLE, /* force read-only */
+       },
+       [2] = {
+               .name        = "Filesystem",
+               .offset      = 0x0260000,
+               .size        = 0x3000000,     /* 48M - rootfs */
+       },
+       [3] = {
+               .name        = "MassStorage",
+               .offset      = 0x3260000,
+               .size        = 0x3d40000,
+       },
+       [4] = {
+               .name        = "BBT",
+               .offset      = 0x6FA0000,
+               .size        = 0x80000,
+               .mask_flags  = MTD_WRITEABLE,  /* force read-only */
+       },
+       /* NOTE: we reserve some blocks at the end of the NAND flash for
+        * bad block management, and the max number of relocation blocks
+        * differs on different platforms. Please take care with it when
+        * defining the partition table.
+        */
+};
+
+static struct pxa3xx_nand_platform_data littleton_nand_info = {
+       .enable_arbiter = 1,
+       .parts          = littleton_nand_partitions,
+       .nr_parts       = ARRAY_SIZE(littleton_nand_partitions),
+};
+
+static void __init littleton_init_nand(void)
+{
+       pxa3xx_set_nand_info(&littleton_nand_info);
+}
+#else
+static inline void littleton_init_nand(void) {}
+#endif /* CONFIG_MTD_NAND_PXA3xx || CONFIG_MTD_NAND_PXA3xx_MODULE */
+
 static void __init littleton_init(void)
 {
        /* initialize MFP configurations */
@@ -374,6 +435,7 @@ static void __init littleton_init(void)
 
        littleton_init_lcd();
        littleton_init_keypad();
+       littleton_init_nand();
 }
 
 MACHINE_START(LITTLETON, "Marvell Form Factor Development Platform (aka Littleton)")
index a3fae4139203d42325f6ecc0f3b833e57bc804b5..ac26423cd20cbda2ce8db0667887625c4ef466da 100644 (file)
@@ -21,6 +21,7 @@
 #include <linux/interrupt.h>
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/partitions.h>
+#include <linux/smc91x.h>
 
 #include <linux/spi/spi.h>
 #include <linux/spi/ads7846.h>
@@ -226,14 +227,6 @@ static struct pxa2xx_spi_master pxa_ssp_master_info = {
        .num_chipselect = 0,
 };
 
-static struct platform_device pxa_ssp = {
-       .name           = "pxa2xx-spi",
-       .id             = 1,
-       .dev = {
-               .platform_data  = &pxa_ssp_master_info,
-       },
-};
-
 static int lubbock_ads7846_pendown_state(void)
 {
        /* TS_BUSY is bit 8 in LUB_MISC_RD, but pendown is irq-only */
@@ -292,11 +285,18 @@ static struct resource smc91x_resources[] = {
        },
 };
 
+static struct smc91x_platdata lubbock_smc91x_info = {
+       .flags  = SMC91X_USE_16BIT | SMC91X_NOWAIT | SMC91X_IO_SHIFT_2,
+};
+
 static struct platform_device smc91x_device = {
        .name           = "smc91x",
        .id             = -1,
        .num_resources  = ARRAY_SIZE(smc91x_resources),
        .resource       = smc91x_resources,
+       .dev            = {
+               .platform_data = &lubbock_smc91x_info,
+       },
 };
 
 static struct resource flash_resources[] = {
@@ -367,7 +367,6 @@ static struct platform_device *devices[] __initdata = {
        &smc91x_device,
        &lubbock_flash_device[0],
        &lubbock_flash_device[1],
-       &pxa_ssp,
 };
 
 static struct pxafb_mode_info sharp_lm8v31_mode = {
@@ -471,6 +470,7 @@ static void lubbock_irda_transceiver_mode(struct device *dev, int mode)
        } else if (mode & IR_FIRMODE) {
                LUB_MISC_WR |= 1 << 4;
        }
+       pxa2xx_transceiver_mode(dev, mode);
        local_irq_restore(flags);
 }
 
@@ -501,6 +501,7 @@ static void __init lubbock_init(void)
        lubbock_flash_data[flashboot].name = "boot-rom";
        (void) platform_add_devices(devices, ARRAY_SIZE(devices));
 
+       pxa2xx_set_spi_info(1, &pxa_ssp_master_info);
        spi_register_board_info(spi_board_info, ARRAY_SIZE(spi_board_info));
 }
 
index 01b2fa7902179c952c2e5ff36381d07930016d01..c9d274f0048f6f85eb8278f6d50c24e2a11d3285 100644 (file)
 #include <linux/init.h>
 #include <linux/platform_device.h>
 #include <linux/delay.h>
+#include <linux/gpio.h>
 #include <linux/gpio_keys.h>
 #include <linux/input.h>
 #include <linux/mfd/htc-egpio.h>
 #include <linux/mfd/htc-pasic3.h>
-#include <linux/mtd/mtd.h>
-#include <linux/mtd/map.h>
 #include <linux/mtd/physmap.h>
 #include <linux/pda_power.h>
 #include <linux/pwm_backlight.h>
 
-#include <asm/gpio.h>
 #include <asm/hardware.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
@@ -44,7 +42,7 @@
 #include "devices.h"
 #include "generic.h"
 
-static unsigned long magician_pin_config[] = {
+static unsigned long magician_pin_config[] __initdata = {
 
        /* SDRAM and Static Memory I/O Signals */
        GPIO20_nSDCS_2,
@@ -134,6 +132,7 @@ static unsigned long magician_pin_config[] = {
 static void magician_irda_transceiver_mode(struct device *dev, int mode)
 {
        gpio_set_value(GPIO83_MAGICIAN_nIR_EN, mode & IR_OFF);
+       pxa2xx_transceiver_mode(dev, mode);
 }
 
 static struct pxaficp_platform_data magician_ficp_info = {
@@ -399,6 +398,7 @@ static struct platform_pwm_backlight_data backlight_data = {
 
 static struct platform_device backlight = {
        .name = "pwm-backlight",
+       .id   = -1,
        .dev  = {
                .parent        = &pxa27x_device_pwm0.dev,
                .platform_data = &backlight_data,
@@ -511,6 +511,37 @@ static struct platform_device pasic3 = {
  * External power
  */
 
+static int power_supply_init(struct device *dev)
+{
+       int ret;
+
+       ret = gpio_request(EGPIO_MAGICIAN_CABLE_STATE_AC, "CABLE_STATE_AC");
+       if (ret)
+               goto err_cs_ac;
+       ret = gpio_request(EGPIO_MAGICIAN_CABLE_STATE_USB, "CABLE_STATE_USB");
+       if (ret)
+               goto err_cs_usb;
+       ret = gpio_request(EGPIO_MAGICIAN_CHARGE_EN, "CHARGE_EN");
+       if (ret)
+               goto err_chg_en;
+       ret = gpio_request(GPIO30_MAGICIAN_nCHARGE_EN, "nCHARGE_EN");
+       if (!ret)
+               ret = gpio_direction_output(GPIO30_MAGICIAN_nCHARGE_EN, 0);
+       if (ret)
+               goto err_nchg_en;
+
+       return 0;
+
+err_nchg_en:
+       gpio_free(EGPIO_MAGICIAN_CHARGE_EN);
+err_chg_en:
+       gpio_free(EGPIO_MAGICIAN_CABLE_STATE_USB);
+err_cs_usb:
+       gpio_free(EGPIO_MAGICIAN_CABLE_STATE_AC);
+err_cs_ac:
+       return ret;
+}
+
 static int magician_is_ac_online(void)
 {
        return gpio_get_value(EGPIO_MAGICIAN_CABLE_STATE_AC);
@@ -527,14 +558,24 @@ static void magician_set_charge(int flags)
        gpio_set_value(EGPIO_MAGICIAN_CHARGE_EN, flags);
 }
 
+static void power_supply_exit(struct device *dev)
+{
+       gpio_free(GPIO30_MAGICIAN_nCHARGE_EN);
+       gpio_free(EGPIO_MAGICIAN_CHARGE_EN);
+       gpio_free(EGPIO_MAGICIAN_CABLE_STATE_USB);
+       gpio_free(EGPIO_MAGICIAN_CABLE_STATE_AC);
+}
+
 static char *magician_supplicants[] = {
        "ds2760-battery.0", "backup-battery"
 };
 
 static struct pda_power_pdata power_supply_info = {
+       .init            = power_supply_init,
        .is_ac_online    = magician_is_ac_online,
        .is_usb_online   = magician_is_usb_online,
        .set_charge      = magician_set_charge,
+       .exit            = power_supply_exit,
        .supplied_to     = magician_supplicants,
        .num_supplicants = ARRAY_SIZE(magician_supplicants),
 };
index f2e9e7c4da8e625988d3d401c84a3650795caea8..851ec2d9b699c178fe36aa723269150d67f409f4 100644 (file)
@@ -26,6 +26,7 @@
 #include <linux/input.h>
 #include <linux/gpio_keys.h>
 #include <linux/pwm_backlight.h>
+#include <linux/smc91x.h>
 
 #include <asm/types.h>
 #include <asm/setup.h>
@@ -110,9 +111,9 @@ static unsigned long mainstone_pin_config[] = {
        GPIO45_AC97_SYSCLK,
 
        /* Keypad */
-       GPIO93_KP_DKIN_0        | WAKEUP_ON_LEVEL_HIGH,
-       GPIO94_KP_DKIN_1        | WAKEUP_ON_LEVEL_HIGH,
-       GPIO95_KP_DKIN_2        | WAKEUP_ON_LEVEL_HIGH,
+       GPIO93_KP_DKIN_0,
+       GPIO94_KP_DKIN_1,
+       GPIO95_KP_DKIN_2,
        GPIO100_KP_MKIN_0       | WAKEUP_ON_LEVEL_HIGH,
        GPIO101_KP_MKIN_1       | WAKEUP_ON_LEVEL_HIGH,
        GPIO102_KP_MKIN_2       | WAKEUP_ON_LEVEL_HIGH,
@@ -240,11 +241,19 @@ static struct resource smc91x_resources[] = {
        }
 };
 
+static struct smc91x_platdata mainstone_smc91x_info = {
+       .flags  = SMC91X_USE_8BIT | SMC91X_USE_16BIT | SMC91X_USE_32BIT |
+                 SMC91X_NOWAIT | SMC91X_USE_DMA,
+};
+
 static struct platform_device smc91x_device = {
        .name           = "smc91x",
        .id             = 0,
        .num_resources  = ARRAY_SIZE(smc91x_resources),
        .resource       = smc91x_resources,
+       .dev            = {
+               .platform_data = &mainstone_smc91x_info,
+       },
 };
 
 static int mst_audio_startup(struct snd_pcm_substream *substream, void *priv)
@@ -455,6 +464,7 @@ static void mainstone_irda_transceiver_mode(struct device *dev, int mode)
        } else if (mode & IR_FIRMODE) {
                MST_MSCWR1 |= MST_MSCWR1_IRDA_FIR;
        }
+       pxa2xx_transceiver_mode(dev, mode);
        if (mode & IR_OFF) {
                MST_MSCWR1 = (MST_MSCWR1 & ~MST_MSCWR1_IRDA_MASK) | MST_MSCWR1_IRDA_OFF;
        } else {
@@ -513,7 +523,7 @@ static struct pxaohci_platform_data mainstone_ohci_platform_data = {
        .init           = mainstone_ohci_init,
 };
 
-#if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULES)
+#if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULE)
 static unsigned int mainstone_matrix_keys[] = {
        KEY(0, 0, KEY_A), KEY(1, 0, KEY_B), KEY(2, 0, KEY_C),
        KEY(3, 0, KEY_D), KEY(4, 0, KEY_E), KEY(5, 0, KEY_F),
index d1cdb4ecb0b8c28c38586af34f035e2baca0cfcb..fd4545eab8033172144a27f54edff48c4931872f 100644 (file)
@@ -39,6 +39,28 @@ struct gpio_desc {
 
 static struct gpio_desc gpio_desc[MFP_PIN_GPIO127 + 1];
 
+static int __mfp_config_lpm(unsigned gpio, unsigned long lpm)
+{
+       unsigned mask = GPIO_bit(gpio);
+
+       /* low power state */
+       switch (lpm) {
+       case MFP_LPM_DRIVE_HIGH:
+               PGSR(gpio) |= mask;
+               break;
+       case MFP_LPM_DRIVE_LOW:
+               PGSR(gpio) &= ~mask;
+               break;
+       case MFP_LPM_INPUT:
+               break;
+       default:
+               pr_warning("%s: invalid low power state for GPIO%d\n",
+                               __func__, gpio);
+               return -EINVAL;
+       }
+       return 0;
+}
+
 static int __mfp_config_gpio(unsigned gpio, unsigned long c)
 {
        unsigned long gafr, mask = GPIO_bit(gpio);
@@ -57,21 +79,8 @@ static int __mfp_config_gpio(unsigned gpio, unsigned long c)
        else
                GPDR(gpio) &= ~mask;
 
-       /* low power state */
-       switch (c & MFP_LPM_STATE_MASK) {
-       case MFP_LPM_DRIVE_HIGH:
-               PGSR(gpio) |= mask;
-               break;
-       case MFP_LPM_DRIVE_LOW:
-               PGSR(gpio) &= ~mask;
-               break;
-       case MFP_LPM_INPUT:
-               break;
-       default:
-               pr_warning("%s: invalid low power state for GPIO%d\n",
-                               __func__, gpio);
+       if (__mfp_config_lpm(gpio, c & MFP_LPM_STATE_MASK))
                return -EINVAL;
-       }
 
        /* give early warning if MFP_LPM_CAN_WAKEUP is set on the
         * configurations of those pins not able to wakeup
@@ -91,6 +100,18 @@ static int __mfp_config_gpio(unsigned gpio, unsigned long c)
        return 0;
 }
 
+static inline int __mfp_validate(int mfp)
+{
+       int gpio = mfp_to_gpio(mfp);
+
+       if ((mfp > MFP_PIN_GPIO127) || !gpio_desc[gpio].valid) {
+               pr_warning("%s: GPIO%d is invalid pin\n", __func__, gpio);
+               return -1;
+       }
+
+       return gpio;
+}
+
 void pxa2xx_mfp_config(unsigned long *mfp_cfgs, int num)
 {
        unsigned long flags;
@@ -99,13 +120,9 @@ void pxa2xx_mfp_config(unsigned long *mfp_cfgs, int num)
 
        for (i = 0, c = mfp_cfgs; i < num; i++, c++) {
 
-               gpio = mfp_to_gpio(MFP_PIN(*c));
-
-               if (!gpio_desc[gpio].valid) {
-                       pr_warning("%s: GPIO%d is invalid pin\n",
-                               __func__, gpio);
+               gpio = __mfp_validate(MFP_PIN(*c));
+               if (gpio < 0)
                        continue;
-               }
 
                local_irq_save(flags);
 
@@ -116,6 +133,20 @@ void pxa2xx_mfp_config(unsigned long *mfp_cfgs, int num)
        }
 }
 
+void pxa2xx_mfp_set_lpm(int mfp, unsigned long lpm)
+{
+       unsigned long flags;
+       int gpio;
+
+       gpio = __mfp_validate(mfp);
+       if (gpio < 0)
+               return;
+
+       local_irq_save(flags);
+       __mfp_config_lpm(gpio, lpm);
+       local_irq_restore(flags);
+}
+
 int gpio_set_wake(unsigned int gpio, unsigned int on)
 {
        struct gpio_desc *d;
diff --git a/arch/arm/mach-pxa/palmtx.c b/arch/arm/mach-pxa/palmtx.c
new file mode 100644 (file)
index 0000000..408657a
--- /dev/null
@@ -0,0 +1,416 @@
+/*
+ * Hardware definitions for PalmTX
+ *
+ * Author:     Marek Vasut <marek.vasut@gmail.com>
+ *
+ * Based on work of:
+ *             Alex Osborne <ato@meshy.org>
+ *             Cristiano P. <cristianop@users.sourceforge.net>
+ *             Jan Herman <2hp@seznam.cz>
+ *             Michal Hrusecky
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * (find more info at www.hackndev.com)
+ *
+ */
+
+#include <linux/platform_device.h>
+#include <linux/delay.h>
+#include <linux/irq.h>
+#include <linux/gpio_keys.h>
+#include <linux/input.h>
+#include <linux/pda_power.h>
+#include <linux/pwm_backlight.h>
+#include <linux/gpio.h>
+
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+
+#include <asm/arch/audio.h>
+#include <asm/arch/palmtx.h>
+#include <asm/arch/mmc.h>
+#include <asm/arch/pxafb.h>
+#include <asm/arch/pxa-regs.h>
+#include <asm/arch/mfp-pxa27x.h>
+#include <asm/arch/irda.h>
+#include <asm/arch/pxa27x_keypad.h>
+#include <asm/arch/udc.h>
+
+#include "generic.h"
+#include "devices.h"
+
+/******************************************************************************
+ * Pin configuration
+ ******************************************************************************/
+static unsigned long palmtx_pin_config[] __initdata = {
+       /* MMC */
+       GPIO32_MMC_CLK,
+       GPIO92_MMC_DAT_0,
+       GPIO109_MMC_DAT_1,
+       GPIO110_MMC_DAT_2,
+       GPIO111_MMC_DAT_3,
+       GPIO112_MMC_CMD,
+
+       /* AC97 */
+       GPIO28_AC97_BITCLK,
+       GPIO29_AC97_SDATA_IN_0,
+       GPIO30_AC97_SDATA_OUT,
+       GPIO31_AC97_SYNC,
+
+       /* IrDA */
+       GPIO46_FICP_RXD,
+       GPIO47_FICP_TXD,
+
+       /* PWM */
+       GPIO16_PWM0_OUT,
+
+       /* USB */
+       GPIO13_GPIO,
+
+       /* PCMCIA */
+       GPIO48_nPOE,
+       GPIO49_nPWE,
+       GPIO50_nPIOR,
+       GPIO51_nPIOW,
+       GPIO85_nPCE_1,
+       GPIO54_nPCE_2,
+       GPIO79_PSKTSEL,
+       GPIO55_nPREG,
+       GPIO56_nPWAIT,
+       GPIO57_nIOIS16,
+};
+
+/******************************************************************************
+ * SD/MMC card controller
+ ******************************************************************************/
+static int palmtx_mci_init(struct device *dev, irq_handler_t palmtx_detect_int,
+                               void *data)
+{
+       int err = 0;
+
+       /* Setup an interrupt for detecting card insert/remove events */
+       err = request_irq(IRQ_GPIO_PALMTX_SD_DETECT_N, palmtx_detect_int,
+                       IRQF_DISABLED | IRQF_SAMPLE_RANDOM |
+                       IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
+                       "SD/MMC card detect", data);
+       if (err) {
+               printk(KERN_ERR "%s: cannot request SD/MMC card detect IRQ\n",
+                               __func__);
+               return err;
+       }
+
+       err = gpio_request(GPIO_NR_PALMTX_SD_POWER, "SD_POWER");
+       if (err)
+               goto pwr_err;
+
+       err = gpio_request(GPIO_NR_PALMTX_SD_READONLY, "SD_READONLY");
+       if (err)
+               goto ro_err;
+
+       printk(KERN_DEBUG "%s: irq registered\n", __func__);
+
+       return 0;
+
+ro_err:
+       gpio_free(GPIO_NR_PALMTX_SD_POWER);
+pwr_err:
+       free_irq(IRQ_GPIO_PALMTX_SD_DETECT_N, data);
+       return err;
+}
+
+static void palmtx_mci_exit(struct device *dev, void *data)
+{
+       gpio_free(GPIO_NR_PALMTX_SD_READONLY);
+       gpio_free(GPIO_NR_PALMTX_SD_POWER);
+       free_irq(IRQ_GPIO_PALMTX_SD_DETECT_N, data);
+}
+
+static void palmtx_mci_power(struct device *dev, unsigned int vdd)
+{
+       struct pxamci_platform_data *p_d = dev->platform_data;
+       gpio_set_value(GPIO_NR_PALMTX_SD_POWER, p_d->ocr_mask & (1 << vdd));
+}
+
+static int palmtx_mci_get_ro(struct device *dev)
+{
+       return gpio_get_value(GPIO_NR_PALMTX_SD_READONLY);
+}
+
+static struct pxamci_platform_data palmtx_mci_platform_data = {
+       .ocr_mask       = MMC_VDD_32_33 | MMC_VDD_33_34,
+       .setpower       = palmtx_mci_power,
+       .get_ro         = palmtx_mci_get_ro,
+       .init           = palmtx_mci_init,
+       .exit           = palmtx_mci_exit,
+};
+
+/******************************************************************************
+ * GPIO keyboard
+ ******************************************************************************/
+static unsigned int palmtx_matrix_keys[] = {
+       KEY(0, 0, KEY_POWER),
+       KEY(0, 1, KEY_F1),
+       KEY(0, 2, KEY_ENTER),
+
+       KEY(1, 0, KEY_F2),
+       KEY(1, 1, KEY_F3),
+       KEY(1, 2, KEY_F4),
+
+       KEY(2, 0, KEY_UP),
+       KEY(2, 2, KEY_DOWN),
+
+       KEY(3, 0, KEY_RIGHT),
+       KEY(3, 2, KEY_LEFT),
+
+};
+
+static struct pxa27x_keypad_platform_data palmtx_keypad_platform_data = {
+       .matrix_key_rows        = 4,
+       .matrix_key_cols        = 3,
+       .matrix_key_map         = palmtx_matrix_keys,
+       .matrix_key_map_size    = ARRAY_SIZE(palmtx_matrix_keys),
+
+       .debounce_interval      = 30,
+};
+
+/******************************************************************************
+ * GPIO keys
+ ******************************************************************************/
+static struct gpio_keys_button palmtx_pxa_buttons[] = {
+       {KEY_F8, GPIO_NR_PALMTX_HOTSYNC_BUTTON_N, 1, "HotSync Button" },
+};
+
+static struct gpio_keys_platform_data palmtx_pxa_keys_data = {
+       .buttons        = palmtx_pxa_buttons,
+       .nbuttons       = ARRAY_SIZE(palmtx_pxa_buttons),
+};
+
+static struct platform_device palmtx_pxa_keys = {
+       .name   = "gpio-keys",
+       .id     = -1,
+       .dev    = {
+               .platform_data = &palmtx_pxa_keys_data,
+       },
+};
+
+/******************************************************************************
+ * Backlight
+ ******************************************************************************/
+static int palmtx_backlight_init(struct device *dev)
+{
+       int ret;
+
+       ret = gpio_request(GPIO_NR_PALMTX_BL_POWER, "BL POWER");
+       if (ret)
+               goto err;
+       ret = gpio_request(GPIO_NR_PALMTX_LCD_POWER, "LCD POWER");
+       if (ret)
+               goto err2;
+
+       return 0;
+err2:
+       gpio_free(GPIO_NR_PALMTX_BL_POWER);
+err:
+       return ret;
+}
+
+static int palmtx_backlight_notify(int brightness)
+{
+       gpio_set_value(GPIO_NR_PALMTX_BL_POWER, brightness);
+       gpio_set_value(GPIO_NR_PALMTX_LCD_POWER, brightness);
+       return brightness;
+}
+
+static void palmtx_backlight_exit(struct device *dev)
+{
+       gpio_free(GPIO_NR_PALMTX_BL_POWER);
+       gpio_free(GPIO_NR_PALMTX_LCD_POWER);
+}
+
+static struct platform_pwm_backlight_data palmtx_backlight_data = {
+       .pwm_id         = 0,
+       .max_brightness = PALMTX_MAX_INTENSITY,
+       .dft_brightness = PALMTX_MAX_INTENSITY,
+       .pwm_period_ns  = PALMTX_PERIOD_NS,
+       .init           = palmtx_backlight_init,
+       .notify         = palmtx_backlight_notify,
+       .exit           = palmtx_backlight_exit,
+};
+
+static struct platform_device palmtx_backlight = {
+       .name   = "pwm-backlight",
+       .dev    = {
+               .parent         = &pxa27x_device_pwm0.dev,
+               .platform_data  = &palmtx_backlight_data,
+       },
+};
+
+/******************************************************************************
+ * IrDA
+ ******************************************************************************/
+static void palmtx_irda_transceiver_mode(struct device *dev, int mode)
+{
+       gpio_set_value(GPIO_NR_PALMTX_IR_DISABLE, mode & IR_OFF);
+       pxa2xx_transceiver_mode(dev, mode);
+}
+
+static struct pxaficp_platform_data palmtx_ficp_platform_data = {
+       .transceiver_cap        = IR_SIRMODE | IR_FIRMODE | IR_OFF,
+       .transceiver_mode       = palmtx_irda_transceiver_mode,
+};
+
+/******************************************************************************
+ * UDC
+ ******************************************************************************/
+static void palmtx_udc_command(int cmd)
+{
+       gpio_set_value(GPIO_NR_PALMTX_USB_POWER, !cmd);
+       udelay(50);
+       gpio_set_value(GPIO_NR_PALMTX_USB_PULLUP, !cmd);
+}
+
+static struct pxa2xx_udc_mach_info palmtx_udc_info __initdata = {
+       .gpio_vbus              = GPIO_NR_PALMTX_USB_DETECT_N,
+       .gpio_vbus_inverted     = 1,
+       .udc_command            = palmtx_udc_command,
+};
+
+/******************************************************************************
+ * Power supply
+ ******************************************************************************/
+static int power_supply_init(struct device *dev)
+{
+       int ret;
+
+       ret = gpio_request(GPIO_NR_PALMTX_POWER_DETECT, "CABLE_STATE_AC");
+       if (ret)
+               goto err_cs_ac;
+
+       ret = gpio_request(GPIO_NR_PALMTX_USB_DETECT_N, "CABLE_STATE_USB");
+       if (ret)
+               goto err_cs_usb;
+
+       return 0;
+
+err_cs_usb:
+       gpio_free(GPIO_NR_PALMTX_POWER_DETECT);
+err_cs_ac:
+       return ret;
+}
+
+static int palmtx_is_ac_online(void)
+{
+       return gpio_get_value(GPIO_NR_PALMTX_POWER_DETECT);
+}
+
+static int palmtx_is_usb_online(void)
+{
+       return !gpio_get_value(GPIO_NR_PALMTX_USB_DETECT_N);
+}
+
+static void power_supply_exit(struct device *dev)
+{
+       gpio_free(GPIO_NR_PALMTX_USB_DETECT_N);
+       gpio_free(GPIO_NR_PALMTX_POWER_DETECT);
+}
+
+static char *palmtx_supplicants[] = {
+       "main-battery",
+};
+
+static struct pda_power_pdata power_supply_info = {
+       .init            = power_supply_init,
+       .is_ac_online    = palmtx_is_ac_online,
+       .is_usb_online   = palmtx_is_usb_online,
+       .exit            = power_supply_exit,
+       .supplied_to     = palmtx_supplicants,
+       .num_supplicants = ARRAY_SIZE(palmtx_supplicants),
+};
+
+static struct platform_device power_supply = {
+       .name = "pda-power",
+       .id   = -1,
+       .dev  = {
+               .platform_data = &power_supply_info,
+       },
+};
+
+/******************************************************************************
+ * Framebuffer
+ ******************************************************************************/
+static struct pxafb_mode_info palmtx_lcd_modes[] = {
+{
+       .pixclock       = 57692,
+       .xres           = 320,
+       .yres           = 480,
+       .bpp            = 16,
+
+       .left_margin    = 32,
+       .right_margin   = 1,
+       .upper_margin   = 7,
+       .lower_margin   = 1,
+
+       .hsync_len      = 4,
+       .vsync_len      = 1,
+},
+};
+
+static struct pxafb_mach_info palmtx_lcd_screen = {
+       .modes          = palmtx_lcd_modes,
+       .num_modes      = ARRAY_SIZE(palmtx_lcd_modes),
+       .lcd_conn       = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
+};
+
+/******************************************************************************
+ * Machine init
+ ******************************************************************************/
+static struct platform_device *devices[] __initdata = {
+#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
+       &palmtx_pxa_keys,
+#endif
+       &palmtx_backlight,
+       &power_supply,
+};
+
+static struct map_desc palmtx_io_desc[] __initdata = {
+{
+       .virtual        = PALMTX_PCMCIA_VIRT,
+       .pfn            = __phys_to_pfn(PALMTX_PCMCIA_PHYS),
+       .length         = PALMTX_PCMCIA_SIZE,
+       .type           = MT_DEVICE
+},
+};
+
+static void __init palmtx_map_io(void)
+{
+       pxa_map_io();
+       iotable_init(palmtx_io_desc, ARRAY_SIZE(palmtx_io_desc));
+}
+
+static void __init palmtx_init(void)
+{
+       pxa2xx_mfp_config(ARRAY_AND_SIZE(palmtx_pin_config));
+
+       set_pxa_fb_info(&palmtx_lcd_screen);
+       pxa_set_mci_info(&palmtx_mci_platform_data);
+       pxa_set_udc_info(&palmtx_udc_info);
+       pxa_set_ac97_info(NULL);
+       pxa_set_ficp_info(&palmtx_ficp_platform_data);
+       pxa_set_keypad_info(&palmtx_keypad_platform_data);
+
+       platform_add_devices(devices, ARRAY_SIZE(devices));
+}
+
+MACHINE_START(PALMTX, "Palm T|X")
+       .phys_io        = PALMTX_PHYS_IO_START,
+       .io_pg_offst    = io_p2v(0x40000000),
+       .boot_params    = 0xa0000100,
+       .map_io         = palmtx_map_io,
+       .init_irq       = pxa27x_init_irq,
+       .timer          = &pxa_timer,
+       .init_machine   = palmtx_init
+MACHINE_END
index 3b945eb0aee3768a1c22b2efa12be75537b8a13a..377f3be8ce578fc5f04477cb12c9ef94532c7d41 100644 (file)
@@ -24,7 +24,9 @@
 #include <linux/platform_device.h>
 #include <linux/mtd/physmap.h>
 #include <linux/spi/spi.h>
+#include <linux/spi/max7301.h>
 #include <linux/leds.h>
+
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/arch/hardware.h>
@@ -108,6 +110,32 @@ static struct platform_device smc91x_device = {
        .resource       = smc91x_resources,
 };
 
+/*
+ * SPI host and devices
+ */
+static struct pxa2xx_spi_master pxa_ssp_master_info = {
+       .num_chipselect = 1,
+};
+
+static struct max7301_platform_data max7301_info = {
+       .base = -1,
+};
+
+/* bus_num must match id in pxa2xx_set_spi_info() call */
+static struct spi_board_info spi_board_info[] __initdata = {
+       {
+               .modalias       = "max7301",
+               .platform_data  = &max7301_info,
+               .max_speed_hz   = 13000000,
+               .bus_num        = 1,
+               .chip_select    = 0,
+               .mode           = SPI_MODE_0,
+       },
+};
+
+/*
+ * NOR flash
+ */
 static struct physmap_flash_data pcm027_flash_data = {
        .width  = 4,
 };
@@ -190,6 +218,9 @@ static void __init pcm027_init(void)
 #ifdef CONFIG_MACH_PCM990_BASEBOARD
        pcm990_baseboard_init();
 #endif
+
+       pxa2xx_set_spi_info(1, &pxa_ssp_master_info);
+       spi_register_board_info(spi_board_info, ARRAY_SIZE(spi_board_info));
 }
 
 static void __init pcm027_map_io(void)
index 5d87c7c866e4b30da57fa90a1693741220298815..30023b00e476161a691aa8a5603c1a0b08fa534d 100644 (file)
 #include <asm/arch/camera.h>
 #include <asm/mach/map.h>
 #include <asm/arch/pxa-regs.h>
-#include <asm/arch/pxa2xx-gpio.h>
 #include <asm/arch/audio.h>
 #include <asm/arch/mmc.h>
 #include <asm/arch/ohci.h>
 #include <asm/arch/pcm990_baseboard.h>
 #include <asm/arch/pxafb.h>
+#include <asm/arch/mfp-pxa27x.h>
 
 #include "devices.h"
+#include "generic.h"
+
+static unsigned long pcm990_pin_config[] __initdata = {
+       /* MMC */
+       GPIO32_MMC_CLK,
+       GPIO112_MMC_CMD,
+       GPIO92_MMC_DAT_0,
+       GPIO109_MMC_DAT_1,
+       GPIO110_MMC_DAT_2,
+       GPIO111_MMC_DAT_3,
+       /* USB */
+       GPIO88_USBH1_PWR,
+       GPIO89_USBH1_PEN,
+       /* PWM0 */
+       GPIO16_PWM0_OUT,
+};
 
 /*
  * pcm990_lcd_power - control power supply to the LCD
@@ -277,16 +293,6 @@ static int pcm990_mci_init(struct device *dev, irq_handler_t mci_detect_int,
 {
        int err;
 
-       /*
-        * enable GPIO for PXA27x MMC controller
-        */
-       pxa_gpio_mode(GPIO32_MMCCLK_MD);
-       pxa_gpio_mode(GPIO112_MMCCMD_MD);
-       pxa_gpio_mode(GPIO92_MMCDAT0_MD);
-       pxa_gpio_mode(GPIO109_MMCDAT1_MD);
-       pxa_gpio_mode(GPIO110_MMCDAT2_MD);
-       pxa_gpio_mode(GPIO111_MMCDAT3_MD);
-
        err = request_irq(PCM027_MMCDET_IRQ, mci_detect_int, IRQF_DISABLED,
                             "MMC card detect", data);
        if (err)
@@ -333,8 +339,6 @@ static struct pxamci_platform_data pcm990_mci_platform_data = {
  */
 static int pcm990_ohci_init(struct device *dev)
 {
-       pxa_gpio_mode(PCM990_USB_OVERCURRENT);
-       pxa_gpio_mode(PCM990_USB_PWR_EN);
        /*
         * disable USB port 2 and 3
         * power sense is active low
@@ -361,23 +365,27 @@ static struct pxaohci_platform_data pcm990_ohci_platform_data = {
  * PXA27x Camera specific stuff
  */
 #if defined(CONFIG_VIDEO_PXA27x) || defined(CONFIG_VIDEO_PXA27x_MODULE)
+static unsigned long pcm990_camera_pin_config[] = {
+       /* CIF */
+       GPIO98_CIF_DD_0,
+       GPIO105_CIF_DD_1,
+       GPIO104_CIF_DD_2,
+       GPIO103_CIF_DD_3,
+       GPIO95_CIF_DD_4,
+       GPIO94_CIF_DD_5,
+       GPIO93_CIF_DD_6,
+       GPIO108_CIF_DD_7,
+       GPIO107_CIF_DD_8,
+       GPIO106_CIF_DD_9,
+       GPIO42_CIF_MCLK,
+       GPIO45_CIF_PCLK,
+       GPIO43_CIF_FV,
+       GPIO44_CIF_LV,
+};
+
 static int pcm990_pxacamera_init(struct device *dev)
 {
-       pxa_gpio_mode(GPIO98_CIF_DD_0_MD);
-       pxa_gpio_mode(GPIO105_CIF_DD_1_MD);
-       pxa_gpio_mode(GPIO104_CIF_DD_2_MD);
-       pxa_gpio_mode(GPIO103_CIF_DD_3_MD);
-       pxa_gpio_mode(GPIO95_CIF_DD_4_MD);
-       pxa_gpio_mode(GPIO94_CIF_DD_5_MD);
-       pxa_gpio_mode(GPIO93_CIF_DD_6_MD);
-       pxa_gpio_mode(GPIO108_CIF_DD_7_MD);
-       pxa_gpio_mode(GPIO107_CIF_DD_8_MD);
-       pxa_gpio_mode(GPIO106_CIF_DD_9_MD);
-       pxa_gpio_mode(GPIO42_CIF_MCLK_MD);
-       pxa_gpio_mode(GPIO45_CIF_PCLK_MD);
-       pxa_gpio_mode(GPIO43_CIF_FV_MD);
-       pxa_gpio_mode(GPIO44_CIF_LV_MD);
-
+       pxa2xx_mfp_config(ARRAY_AND_SIZE(pcm990_camera_pin_config));
        return 0;
 }
 
@@ -449,8 +457,10 @@ static struct map_desc pcm990_io_desc[] __initdata = {
  */
 void __init pcm990_baseboard_init(void)
 {
+       pxa2xx_mfp_config(ARRAY_AND_SIZE(pcm990_pin_config));
+
        /* register CPLD access */
-       iotable_init(pcm990_io_desc, ARRAY_SIZE(pcm990_io_desc));
+       iotable_init(ARRAY_AND_SIZE(pcm990_io_desc));
 
        /* register CPLD's IRQ controller */
        pcm990_init_irq();
@@ -458,7 +468,6 @@ void __init pcm990_baseboard_init(void)
 #ifndef CONFIG_PCM990_DISPLAY_NONE
        set_pxa_fb_info(&pcm990_fbinfo);
 #endif
-       pxa_gpio_mode(GPIO16_PWM0_MD);
        platform_device_register(&pcm990_backlight_device);
 
        /* MMC */
@@ -473,9 +482,8 @@ void __init pcm990_baseboard_init(void)
 #if defined(CONFIG_VIDEO_PXA27x) || defined(CONFIG_VIDEO_PXA27x_MODULE)
        pxa_set_camera_info(&pcm990_pxacamera_platform_data);
 
-       i2c_register_board_info(0, pcm990_i2c_devices,
-               ARRAY_SIZE(pcm990_i2c_devices));
+       i2c_register_board_info(0, ARRAY_AND_SIZE(pcm990_i2c_devices));
 #endif
 
-       printk(KERN_INFO"PCM-990 Evaluation baseboard initialized\n");
+       printk(KERN_INFO "PCM-990 Evaluation baseboard initialized\n");
 }
index f81c10cafd485760f10fb30c1988533a1973f0b2..39612cfa0b4d79191f523b6e2dbb0c1855eddcfb 100644 (file)
@@ -267,6 +267,7 @@ static void poodle_irda_transceiver_mode(struct device *dev, int mode)
        } else {
                GPCR(POODLE_GPIO_IR_ON) = GPIO_bit(POODLE_GPIO_IR_ON);
        }
+       pxa2xx_transceiver_mode(dev, mode);
 }
 
 static struct pxaficp_platform_data poodle_ficp_platform_data = {
index 4cd50e3005e90d6e538e3d8f412db149b8cc2169..c5b845b935bb6f5122826507bf640b2deb87e61e 100644 (file)
@@ -109,6 +109,52 @@ static const struct clkops clk_pxa25x_lcd_ops = {
        .getrate        = clk_pxa25x_lcd_getrate,
 };
 
+static unsigned long gpio12_config_32k[] = {
+       GPIO12_32KHz,
+};
+
+static unsigned long gpio12_config_gpio[] = {
+       GPIO12_GPIO,
+};
+
+static void clk_gpio12_enable(struct clk *clk)
+{
+       pxa2xx_mfp_config(gpio12_config_32k, 1);
+}
+
+static void clk_gpio12_disable(struct clk *clk)
+{
+       pxa2xx_mfp_config(gpio12_config_gpio, 1);
+}
+
+static const struct clkops clk_pxa25x_gpio12_ops = {
+       .enable         = clk_gpio12_enable,
+       .disable        = clk_gpio12_disable,
+};
+
+static unsigned long gpio11_config_3m6[] = {
+       GPIO11_3_6MHz,
+};
+
+static unsigned long gpio11_config_gpio[] = {
+       GPIO11_GPIO,
+};
+
+static void clk_gpio11_enable(struct clk *clk)
+{
+       pxa2xx_mfp_config(gpio11_config_3m6, 1);
+}
+
+static void clk_gpio11_disable(struct clk *clk)
+{
+       pxa2xx_mfp_config(gpio11_config_gpio, 1);
+}
+
+static const struct clkops clk_pxa25x_gpio11_ops = {
+       .enable         = clk_gpio11_enable,
+       .disable        = clk_gpio11_disable,
+};
+
 /*
  * 3.6864MHz -> OST, GPIO, SSP, PWM, PLLs (95.842MHz, 147.456MHz)
  * 95.842MHz -> MMC 19.169MHz, I2C 31.949MHz, FICP 47.923MHz, USB 47.923MHz
@@ -128,6 +174,8 @@ static struct clk pxa25x_clks[] = {
        INIT_CKEN("UARTCLK", BTUART, 14745600, 1, &pxa_device_btuart.dev),
        INIT_CKEN("UARTCLK", STUART, 14745600, 1, NULL),
        INIT_CKEN("UDCCLK", USB, 47923000, 5, &pxa25x_device_udc.dev),
+       INIT_CLK("GPIO11_CLK", &clk_pxa25x_gpio11_ops, 3686400, 0, NULL),
+       INIT_CLK("GPIO12_CLK", &clk_pxa25x_gpio12_ops, 32768, 0, NULL),
        INIT_CKEN("MMCCLK", MMC, 19169000, 0, &pxa_device_mci.dev),
        INIT_CKEN("I2CCLK", I2C, 31949000, 0, &pxa_device_i2c.dev),
 
@@ -145,7 +193,10 @@ static struct clk pxa25x_clks[] = {
        INIT_CKEN("FICPCLK", FICP, 47923000, 0, NULL),
 };
 
-static struct clk gpio7_clk = INIT_CKOTHER("GPIO7_CK", &pxa25x_clks[4], NULL);
+static struct clk pxa2xx_clk_aliases[] = {
+       INIT_CKOTHER("GPIO7_CLK", &pxa25x_clks[4], NULL),
+       INIT_CKOTHER("SA1111_CLK", &pxa25x_clks[5], NULL),
+};
 
 #ifdef CONFIG_PM
 
@@ -293,7 +344,7 @@ static int __init pxa25x_init(void)
        int i, ret = 0;
 
        /* Only add HWUART for PXA255/26x; PXA210/250/27x do not have it. */
-       if (cpu_is_pxa25x())
+       if (cpu_is_pxa255())
                clks_register(&pxa25x_hwuart_clk, 1);
 
        if (cpu_is_pxa21x() || cpu_is_pxa25x()) {
@@ -317,10 +368,10 @@ static int __init pxa25x_init(void)
        }
 
        /* Only add HWUART for PXA255/26x; PXA210/250/27x do not have it. */
-       if (cpu_is_pxa25x())
+       if (cpu_is_pxa255())
                ret = platform_device_register(&pxa_device_hwuart);
 
-       clks_register(&gpio7_clk, 1);
+       clks_register(pxa2xx_clk_aliases, ARRAY_SIZE(pxa2xx_clk_aliases));
 
        return ret;
 }
index 0a0d3877f2125e65fa09db0aba2f401c080291fa..da92e9733886432edc3b38cfccceeac898ce45df 100644 (file)
 
 #include <linux/module.h>
 #include <linux/kernel.h>
+#include <linux/platform_device.h>
 
 #include <asm/hardware.h>
+#include <asm/arch/pxa3xx-regs.h>
 #include <asm/arch/mfp-pxa300.h>
 
+#include "generic.h"
+#include "devices.h"
+#include "clock.h"
+
 static struct pxa3xx_mfp_addr_map pxa300_mfp_addr_map[] __initdata = {
 
        MFP_ADDR_X(GPIO0,   GPIO2,   0x00b4),
@@ -79,15 +85,26 @@ static struct pxa3xx_mfp_addr_map pxa310_mfp_addr_map[] __initdata = {
        MFP_ADDR_END,
 };
 
+static struct clk common_clks[] = {
+       PXA3xx_CKEN("NANDCLK", NAND, 156000000, 0, &pxa3xx_device_nand.dev),
+};
+
+static struct clk pxa310_clks[] = {
+       PXA3xx_CKEN("MMCCLK", MMC3, 19500000, 0, &pxa3xx_device_mci3.dev),
+};
+
 static int __init pxa300_init(void)
 {
        if (cpu_is_pxa300() || cpu_is_pxa310()) {
                pxa3xx_init_mfp();
                pxa3xx_mfp_init_addr(pxa300_mfp_addr_map);
+               clks_register(ARRAY_AND_SIZE(common_clks));
        }
 
-       if (cpu_is_pxa310())
+       if (cpu_is_pxa310()) {
                pxa3xx_mfp_init_addr(pxa310_mfp_addr_map);
+               clks_register(ARRAY_AND_SIZE(pxa310_clks));
+       }
 
        return 0;
 }
index 74128eb8f8d0dd5983585c89203e45410e53cfbc..c557c23a1efeaa9cc5e00b0b5f140f78ca340d94 100644 (file)
 
 #include <linux/module.h>
 #include <linux/kernel.h>
+#include <linux/platform_device.h>
 
 #include <asm/hardware.h>
 #include <asm/arch/mfp.h>
+#include <asm/arch/pxa3xx-regs.h>
 #include <asm/arch/mfp-pxa320.h>
 
+#include "generic.h"
+#include "devices.h"
+#include "clock.h"
+
 static struct pxa3xx_mfp_addr_map pxa320_mfp_addr_map[] __initdata = {
 
        MFP_ADDR_X(GPIO0,  GPIO4,   0x0124),
@@ -74,16 +80,17 @@ static struct pxa3xx_mfp_addr_map pxa320_mfp_addr_map[] __initdata = {
        MFP_ADDR_END,
 };
 
-static void __init pxa320_init_mfp(void)
-{
-       pxa3xx_init_mfp();
-       pxa3xx_mfp_init_addr(pxa320_mfp_addr_map);
-}
+static struct clk pxa320_clks[] = {
+       PXA3xx_CKEN("NANDCLK", NAND, 104000000, 0, &pxa3xx_device_nand.dev),
+};
 
 static int __init pxa320_init(void)
 {
-       if (cpu_is_pxa320())
-               pxa320_init_mfp();
+       if (cpu_is_pxa320()) {
+               pxa3xx_init_mfp();
+               pxa3xx_mfp_init_addr(pxa320_mfp_addr_map);
+               clks_register(ARRAY_AND_SIZE(pxa320_clks));
+       }
 
        return 0;
 }
index 15685d2b8f8ce4187a970b0f181ba90fc8ba613b..f491025a0c82c41873bf404494d8a64a35216d28 100644 (file)
@@ -144,7 +144,7 @@ static unsigned long clk_pxa3xx_hsio_getrate(struct clk *clk)
        return hsio_clk;
 }
 
-static void clk_pxa3xx_cken_enable(struct clk *clk)
+void clk_pxa3xx_cken_enable(struct clk *clk)
 {
        unsigned long mask = 1ul << (clk->cken & 0x1f);
 
@@ -154,7 +154,7 @@ static void clk_pxa3xx_cken_enable(struct clk *clk)
                CKENB |= mask;
 }
 
-static void clk_pxa3xx_cken_disable(struct clk *clk)
+void clk_pxa3xx_cken_disable(struct clk *clk)
 {
        unsigned long mask = 1ul << (clk->cken & 0x1f);
 
@@ -164,7 +164,7 @@ static void clk_pxa3xx_cken_disable(struct clk *clk)
                CKENB &= ~mask;
 }
 
-static const struct clkops clk_pxa3xx_cken_ops = {
+const struct clkops clk_pxa3xx_cken_ops = {
        .enable         = clk_pxa3xx_cken_enable,
        .disable        = clk_pxa3xx_cken_disable,
 };
@@ -196,24 +196,6 @@ static const struct clkops clk_pout_ops = {
        .disable        = clk_pout_disable,
 };
 
-#define PXA3xx_CKEN(_name, _cken, _rate, _delay, _dev) \
-       {                                               \
-               .name   = _name,                        \
-               .dev    = _dev,                         \
-               .ops    = &clk_pxa3xx_cken_ops,         \
-               .rate   = _rate,                        \
-               .cken   = CKEN_##_cken,                 \
-               .delay  = _delay,                       \
-       }
-
-#define PXA3xx_CK(_name, _cken, _ops, _dev)            \
-       {                                               \
-               .name   = _name,                        \
-               .dev    = _dev,                         \
-               .ops    = _ops,                         \
-               .cken   = CKEN_##_cken,                 \
-       }
-
 static struct clk pxa3xx_clks[] = {
        {
                .name           = "CLK_POUT",
@@ -244,7 +226,6 @@ static struct clk pxa3xx_clks[] = {
 
        PXA3xx_CKEN("MMCCLK", MMC1, 19500000, 0, &pxa_device_mci.dev),
        PXA3xx_CKEN("MMCCLK", MMC2, 19500000, 0, &pxa3xx_device_mci2.dev),
-       PXA3xx_CKEN("MMCCLK", MMC3, 19500000, 0, &pxa3xx_device_mci3.dev),
 };
 
 #ifdef CONFIG_PM
diff --git a/arch/arm/mach-pxa/pxa930.c b/arch/arm/mach-pxa/pxa930.c
new file mode 100644 (file)
index 0000000..9503897
--- /dev/null
@@ -0,0 +1,190 @@
+/*
+ * linux/arch/arm/mach-pxa/pxa930.c
+ *
+ * Code specific to PXA930
+ *
+ * Copyright (C) 2007-2008 Marvell Internation Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/platform_device.h>
+#include <linux/irq.h>
+#include <linux/dma-mapping.h>
+
+#include <asm/hardware.h>
+#include <asm/arch/mfp-pxa930.h>
+
+static struct pxa3xx_mfp_addr_map pxa930_mfp_addr_map[] __initdata = {
+
+       MFP_ADDR(GPIO0, 0x02e0),
+       MFP_ADDR(GPIO1, 0x02dc),
+       MFP_ADDR(GPIO2, 0x02e8),
+       MFP_ADDR(GPIO3, 0x02d8),
+       MFP_ADDR(GPIO4, 0x02e4),
+       MFP_ADDR(GPIO5, 0x02ec),
+       MFP_ADDR(GPIO6, 0x02f8),
+       MFP_ADDR(GPIO7, 0x02fc),
+       MFP_ADDR(GPIO8, 0x0300),
+       MFP_ADDR(GPIO9, 0x02d4),
+       MFP_ADDR(GPIO10, 0x02f4),
+       MFP_ADDR(GPIO11, 0x02f0),
+       MFP_ADDR(GPIO12, 0x0304),
+       MFP_ADDR(GPIO13, 0x0310),
+       MFP_ADDR(GPIO14, 0x0308),
+       MFP_ADDR(GPIO15, 0x030c),
+       MFP_ADDR(GPIO16, 0x04e8),
+       MFP_ADDR(GPIO17, 0x04f4),
+       MFP_ADDR(GPIO18, 0x04f8),
+       MFP_ADDR(GPIO19, 0x04fc),
+       MFP_ADDR(GPIO20, 0x0518),
+       MFP_ADDR(GPIO21, 0x051c),
+       MFP_ADDR(GPIO22, 0x04ec),
+       MFP_ADDR(GPIO23, 0x0500),
+       MFP_ADDR(GPIO24, 0x04f0),
+       MFP_ADDR(GPIO25, 0x0504),
+       MFP_ADDR(GPIO26, 0x0510),
+       MFP_ADDR(GPIO27, 0x0514),
+       MFP_ADDR(GPIO28, 0x0520),
+       MFP_ADDR(GPIO29, 0x0600),
+       MFP_ADDR(GPIO30, 0x0618),
+       MFP_ADDR(GPIO31, 0x0610),
+       MFP_ADDR(GPIO32, 0x060c),
+       MFP_ADDR(GPIO33, 0x061c),
+       MFP_ADDR(GPIO34, 0x0620),
+       MFP_ADDR(GPIO35, 0x0628),
+       MFP_ADDR(GPIO36, 0x062c),
+       MFP_ADDR(GPIO37, 0x0630),
+       MFP_ADDR(GPIO38, 0x0634),
+       MFP_ADDR(GPIO39, 0x0638),
+       MFP_ADDR(GPIO40, 0x063c),
+       MFP_ADDR(GPIO41, 0x0614),
+       MFP_ADDR(GPIO42, 0x0624),
+       MFP_ADDR(GPIO43, 0x0608),
+       MFP_ADDR(GPIO44, 0x0604),
+       MFP_ADDR(GPIO45, 0x050c),
+       MFP_ADDR(GPIO46, 0x0508),
+       MFP_ADDR(GPIO47, 0x02bc),
+       MFP_ADDR(GPIO48, 0x02b4),
+       MFP_ADDR(GPIO49, 0x02b8),
+       MFP_ADDR(GPIO50, 0x02c8),
+       MFP_ADDR(GPIO51, 0x02c0),
+       MFP_ADDR(GPIO52, 0x02c4),
+       MFP_ADDR(GPIO53, 0x02d0),
+       MFP_ADDR(GPIO54, 0x02cc),
+       MFP_ADDR(GPIO55, 0x029c),
+       MFP_ADDR(GPIO56, 0x02a0),
+       MFP_ADDR(GPIO57, 0x0294),
+       MFP_ADDR(GPIO58, 0x0298),
+       MFP_ADDR(GPIO59, 0x02a4),
+       MFP_ADDR(GPIO60, 0x02a8),
+       MFP_ADDR(GPIO61, 0x02b0),
+       MFP_ADDR(GPIO62, 0x02ac),
+       MFP_ADDR(GPIO63, 0x0640),
+       MFP_ADDR(GPIO64, 0x065c),
+       MFP_ADDR(GPIO65, 0x0648),
+       MFP_ADDR(GPIO66, 0x0644),
+       MFP_ADDR(GPIO67, 0x0674),
+       MFP_ADDR(GPIO68, 0x0658),
+       MFP_ADDR(GPIO69, 0x0654),
+       MFP_ADDR(GPIO70, 0x0660),
+       MFP_ADDR(GPIO71, 0x0668),
+       MFP_ADDR(GPIO72, 0x0664),
+       MFP_ADDR(GPIO73, 0x0650),
+       MFP_ADDR(GPIO74, 0x066c),
+       MFP_ADDR(GPIO75, 0x064c),
+       MFP_ADDR(GPIO76, 0x0670),
+       MFP_ADDR(GPIO77, 0x0678),
+       MFP_ADDR(GPIO78, 0x067c),
+       MFP_ADDR(GPIO79, 0x0694),
+       MFP_ADDR(GPIO80, 0x069c),
+       MFP_ADDR(GPIO81, 0x06a0),
+       MFP_ADDR(GPIO82, 0x06a4),
+       MFP_ADDR(GPIO83, 0x0698),
+       MFP_ADDR(GPIO84, 0x06bc),
+       MFP_ADDR(GPIO85, 0x06b4),
+       MFP_ADDR(GPIO86, 0x06b0),
+       MFP_ADDR(GPIO87, 0x06c0),
+       MFP_ADDR(GPIO88, 0x06c4),
+       MFP_ADDR(GPIO89, 0x06ac),
+       MFP_ADDR(GPIO90, 0x0680),
+       MFP_ADDR(GPIO91, 0x0684),
+       MFP_ADDR(GPIO92, 0x0688),
+       MFP_ADDR(GPIO93, 0x0690),
+       MFP_ADDR(GPIO94, 0x068c),
+       MFP_ADDR(GPIO95, 0x06a8),
+       MFP_ADDR(GPIO96, 0x06b8),
+       MFP_ADDR(GPIO97, 0x0410),
+       MFP_ADDR(GPIO98, 0x0418),
+       MFP_ADDR(GPIO99, 0x041c),
+       MFP_ADDR(GPIO100, 0x0414),
+       MFP_ADDR(GPIO101, 0x0408),
+       MFP_ADDR(GPIO102, 0x0324),
+       MFP_ADDR(GPIO103, 0x040c),
+       MFP_ADDR(GPIO104, 0x0400),
+       MFP_ADDR(GPIO105, 0x0328),
+       MFP_ADDR(GPIO106, 0x0404),
+
+       MFP_ADDR(nXCVREN, 0x0204),
+       MFP_ADDR(DF_CLE_nOE, 0x020c),
+       MFP_ADDR(DF_nADV1_ALE, 0x0218),
+       MFP_ADDR(DF_SCLK_E, 0x0214),
+       MFP_ADDR(DF_SCLK_S, 0x0210),
+       MFP_ADDR(nBE0, 0x021c),
+       MFP_ADDR(nBE1, 0x0220),
+       MFP_ADDR(DF_nADV2_ALE, 0x0224),
+       MFP_ADDR(DF_INT_RnB, 0x0228),
+       MFP_ADDR(DF_nCS0, 0x022c),
+       MFP_ADDR(DF_nCS1, 0x0230),
+       MFP_ADDR(nLUA, 0x0254),
+       MFP_ADDR(nLLA, 0x0258),
+       MFP_ADDR(DF_nWE, 0x0234),
+       MFP_ADDR(DF_nRE_nOE, 0x0238),
+       MFP_ADDR(DF_ADDR0, 0x024c),
+       MFP_ADDR(DF_ADDR1, 0x0250),
+       MFP_ADDR(DF_ADDR2, 0x025c),
+       MFP_ADDR(DF_ADDR3, 0x0260),
+       MFP_ADDR(DF_IO0, 0x023c),
+       MFP_ADDR(DF_IO1, 0x0240),
+       MFP_ADDR(DF_IO2, 0x0244),
+       MFP_ADDR(DF_IO3, 0x0248),
+       MFP_ADDR(DF_IO4, 0x0264),
+       MFP_ADDR(DF_IO5, 0x0268),
+       MFP_ADDR(DF_IO6, 0x026c),
+       MFP_ADDR(DF_IO7, 0x0270),
+       MFP_ADDR(DF_IO8, 0x0274),
+       MFP_ADDR(DF_IO9, 0x0278),
+       MFP_ADDR(DF_IO10, 0x027c),
+       MFP_ADDR(DF_IO11, 0x0280),
+       MFP_ADDR(DF_IO12, 0x0284),
+       MFP_ADDR(DF_IO13, 0x0288),
+       MFP_ADDR(DF_IO14, 0x028c),
+       MFP_ADDR(DF_IO15, 0x0290),
+
+       MFP_ADDR(GSIM_UIO, 0x0314),
+       MFP_ADDR(GSIM_UCLK, 0x0318),
+       MFP_ADDR(GSIM_UDET, 0x031c),
+       MFP_ADDR(GSIM_nURST, 0x0320),
+
+       MFP_ADDR(PMIC_INT, 0x06c8),
+
+       MFP_ADDR(RDY, 0x0200),
+
+       MFP_ADDR_END,
+};
+
+static int __init pxa930_init(void)
+{
+       if (cpu_is_pxa930()) {
+               pxa3xx_init_mfp();
+               pxa3xx_mfp_init_addr(pxa930_mfp_addr_map);
+       }
+
+       return 0;
+}
+
+core_initcall(pxa930_init);
diff --git a/arch/arm/mach-pxa/reset.c b/arch/arm/mach-pxa/reset.c
new file mode 100644 (file)
index 0000000..9d39dea
--- /dev/null
@@ -0,0 +1,96 @@
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/delay.h>
+#include <linux/gpio.h>
+#include <asm/io.h>
+#include <asm/proc-fns.h>
+
+#include <asm/arch/pxa-regs.h>
+#include <asm/arch/pxa2xx-regs.h>
+
+static void do_hw_reset(void);
+
+static int reset_gpio = -1;
+
+int init_gpio_reset(int gpio)
+{
+       int rc;
+
+       rc = gpio_request(gpio, "reset generator");
+       if (rc) {
+               printk(KERN_ERR "Can't request reset_gpio\n");
+               goto out;
+       }
+
+       rc = gpio_direction_input(gpio);
+       if (rc) {
+               printk(KERN_ERR "Can't configure reset_gpio for input\n");
+               gpio_free(gpio);
+               goto out;
+       }
+
+out:
+       if (!rc)
+               reset_gpio = gpio;
+
+       return rc;
+}
+
+/*
+ * Trigger GPIO reset.
+ * This covers various types of logic connecting gpio pin
+ * to RESET pins (nRESET or GPIO_RESET):
+ */
+static void do_gpio_reset(void)
+{
+       BUG_ON(reset_gpio == -1);
+
+       /* drive it low */
+       gpio_direction_output(reset_gpio, 0);
+       mdelay(2);
+       /* rising edge or drive high */
+       gpio_set_value(reset_gpio, 1);
+       mdelay(2);
+       /* falling edge */
+       gpio_set_value(reset_gpio, 0);
+
+       /* give it some time */
+       mdelay(10);
+
+       WARN_ON(1);
+       /* fallback */
+       do_hw_reset();
+}
+
+static void do_hw_reset(void)
+{
+       /* Initialize the watchdog and let it fire */
+       OWER = OWER_WME;
+       OSSR = OSSR_M3;
+       OSMR3 = OSCR + 368640;  /* ... in 100 ms */
+}
+
+void arch_reset(char mode)
+{
+       if (cpu_is_pxa2xx())
+               RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR;
+
+       switch (mode) {
+       case 's':
+               /* Jump into ROM at address 0 */
+               cpu_reset(0);
+               break;
+       case 'h':
+               do_hw_reset();
+               break;
+       case 'g':
+               do_gpio_reset();
+               break;
+       }
+}
+
diff --git a/arch/arm/mach-pxa/saar.c b/arch/arm/mach-pxa/saar.c
new file mode 100644 (file)
index 0000000..d02bc6f
--- /dev/null
@@ -0,0 +1,84 @@
+/*
+ *  linux/arch/arm/mach-pxa/saar.c
+ *
+ *  Support for the Marvell PXA930 Handheld Platform (aka SAAR)
+ *
+ *  Copyright (C) 2007-2008 Marvell International Ltd.
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License version 2 as
+ *  publishhed by the Free Software Foundation.
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/interrupt.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/clk.h>
+#include <linux/gpio.h>
+#include <linux/smc91x.h>
+
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/hardware.h>
+#include <asm/arch/pxa3xx-regs.h>
+#include <asm/arch/mfp-pxa930.h>
+
+#include "devices.h"
+#include "generic.h"
+
+/* SAAR MFP configurations */
+static mfp_cfg_t saar_mfp_cfg[] __initdata = {
+       /* Ethernet */
+       DF_nCS1_nCS3,
+       GPIO97_GPIO,
+};
+
+#define SAAR_ETH_PHYS  (0x14000000)
+
+static struct resource smc91x_resources[] = {
+       [0] = {
+               .start  = (SAAR_ETH_PHYS + 0x300),
+               .end    = (SAAR_ETH_PHYS + 0xfffff),
+               .flags  = IORESOURCE_MEM,
+       },
+       [1] = {
+               .start  = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO97)),
+               .end    = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO97)),
+               .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
+       }
+};
+
+static struct smc91x_platdata saar_smc91x_info = {
+       .flags  = SMC91X_USE_16BIT | SMC91X_NOWAIT | SMC91X_USE_DMA,
+};
+
+static struct platform_device smc91x_device = {
+       .name           = "smc91x",
+       .id             = 0,
+       .num_resources  = ARRAY_SIZE(smc91x_resources),
+       .resource       = smc91x_resources,
+       .dev            = {
+               .platform_data = &saar_smc91x_info,
+       },
+};
+
+static void __init saar_init(void)
+{
+       /* initialize MFP configurations */
+       pxa3xx_mfp_config(ARRAY_AND_SIZE(saar_mfp_cfg));
+
+       platform_device_register(&smc91x_device);
+}
+
+MACHINE_START(SAAR, "PXA930 Handheld Platform (aka SAAR)")
+       /* Maintainer: Eric Miao <eric.miao@marvell.com> */
+       .phys_io        = 0x40000000,
+       .boot_params    = 0xa0000100,
+       .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
+       .map_io         = pxa_map_io,
+       .init_irq       = pxa3xx_init_irq,
+       .timer          = &pxa_timer,
+       .init_machine   = saar_init,
+MACHINE_END
index e7d0fcd9b43ffbb2c749fe139b8649090e1e8ada..762249c03ded4e5d9311513e96b9b260e0dbc2a4 100644 (file)
@@ -38,6 +38,7 @@
 #include <asm/arch/pxa-regs.h>
 #include <asm/arch/pxa2xx-regs.h>
 #include <asm/arch/pxa2xx-gpio.h>
+#include <asm/arch/pxa27x-udc.h>
 #include <asm/arch/irda.h>
 #include <asm/arch/mmc.h>
 #include <asm/arch/ohci.h>
@@ -450,6 +451,7 @@ static void spitz_irda_transceiver_mode(struct device *dev, int mode)
                set_scoop_gpio(&spitzscoop2_device.dev, SPITZ_SCP2_IR_ON);
        else
                reset_scoop_gpio(&spitzscoop2_device.dev, SPITZ_SCP2_IR_ON);
+       pxa2xx_transceiver_mode(dev, mode);
 }
 
 #ifdef CONFIG_MACH_AKITA
@@ -459,6 +461,7 @@ static void akita_irda_transceiver_mode(struct device *dev, int mode)
                akita_set_ioexp(&akitaioexp_device.dev, AKITA_IOEXP_IR_ON);
        else
                akita_reset_ioexp(&akitaioexp_device.dev, AKITA_IOEXP_IR_ON);
+       pxa2xx_transceiver_mode(dev, mode);
 }
 #endif
 
@@ -529,11 +532,7 @@ static struct platform_device *devices[] __initdata = {
 
 static void spitz_poweroff(void)
 {
-       pxa_gpio_mode(SPITZ_GPIO_ON_RESET | GPIO_OUT);
-       GPSR(SPITZ_GPIO_ON_RESET) = GPIO_bit(SPITZ_GPIO_ON_RESET);
-
-       mdelay(1000);
-       arm_machine_restart('h');
+       arm_machine_restart('g');
 }
 
 static void spitz_restart(char mode)
@@ -547,6 +546,7 @@ static void spitz_restart(char mode)
 
 static void __init common_init(void)
 {
+       init_gpio_reset(SPITZ_GPIO_ON_RESET);
        pm_power_off = spitz_poweroff;
        arm_pm_restart = spitz_restart;
 
index 0bb31982fb6f1b5b5ffb7d89e8a3bee28284c101..89f38683787eaded0b2c30e417a96f9c86b6eeea 100644 (file)
  *  IO-based SSP applications and allows easy port setup for DMA access.
  *
  *  Author: Liam Girdwood <liam.girdwood@wolfsonmicro.com>
- *
- *  Revision history:
- *   22nd Aug 2003 Initial version.
- *   20th Dec 2004 Added ssp_config for changing port config without
- *                 closing the port.
- *    4th Aug 2005 Added option to disable irq handler registration and
- *                 cleaned up irq and clock detection.
  */
 
 #include <linux/module.h>
@@ -285,7 +278,7 @@ int ssp_init(struct ssp_dev *dev, u32 port, u32 init_flags)
                        goto out_region;
                dev->irq = ssp->irq;
        } else
-               dev->irq = 0;
+               dev->irq = NO_IRQ;
 
        /* turn on SSP port clock */
        clk_enable(ssp->clk);
@@ -306,7 +299,8 @@ void ssp_exit(struct ssp_dev *dev)
        struct ssp_device *ssp = dev->ssp;
 
        ssp_disable(dev);
-       free_irq(dev->irq, dev);
+       if (dev->irq != NO_IRQ)
+               free_irq(dev->irq, dev);
        clk_disable(ssp->clk);
        ssp_free(ssp);
 }
@@ -360,6 +354,7 @@ static int __devinit ssp_probe(struct platform_device *pdev, int type)
                dev_err(&pdev->dev, "failed to allocate memory");
                return -ENOMEM;
        }
+       ssp->pdev = pdev;
 
        ssp->clk = clk_get(&pdev->dev, "SSPCLK");
        if (IS_ERR(ssp->clk)) {
diff --git a/arch/arm/mach-pxa/tavorevb.c b/arch/arm/mach-pxa/tavorevb.c
new file mode 100644 (file)
index 0000000..ac28350
--- /dev/null
@@ -0,0 +1,84 @@
+/*
+ *  linux/arch/arm/mach-pxa/tavorevb.c
+ *
+ *  Support for the Marvell PXA930 Evaluation Board
+ *
+ *  Copyright (C) 2007-2008 Marvell International Ltd.
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License version 2 as
+ *  publishhed by the Free Software Foundation.
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/interrupt.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/clk.h>
+#include <linux/gpio.h>
+#include <linux/smc91x.h>
+
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/hardware.h>
+#include <asm/arch/pxa3xx-regs.h>
+#include <asm/arch/mfp-pxa930.h>
+
+#include "devices.h"
+#include "generic.h"
+
+/* Tavor EVB MFP configurations */
+static mfp_cfg_t tavorevb_mfp_cfg[] __initdata = {
+       /* Ethernet */
+       DF_nCS1_nCS3,
+       GPIO47_GPIO,
+};
+
+#define TAVOREVB_ETH_PHYS      (0x14000000)
+
+static struct resource smc91x_resources[] = {
+       [0] = {
+               .start  = (TAVOREVB_ETH_PHYS + 0x300),
+               .end    = (TAVOREVB_ETH_PHYS + 0xfffff),
+               .flags  = IORESOURCE_MEM,
+       },
+       [1] = {
+               .start  = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO47)),
+               .end    = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO47)),
+               .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
+       }
+};
+
+static struct smc91x_platdata tavorevb_smc91x_info = {
+       .flags  = SMC91X_USE_16BIT | SMC91X_NOWAIT | SMC91X_USE_DMA,
+};
+
+static struct platform_device smc91x_device = {
+       .name           = "smc91x",
+       .id             = 0,
+       .num_resources  = ARRAY_SIZE(smc91x_resources),
+       .resource       = smc91x_resources,
+       .dev            = {
+               .platform_data = &tavorevb_smc91x_info,
+       },
+};
+
+static void __init tavorevb_init(void)
+{
+       /* initialize MFP configurations */
+       pxa3xx_mfp_config(ARRAY_AND_SIZE(tavorevb_mfp_cfg));
+
+       platform_device_register(&smc91x_device);
+}
+
+MACHINE_START(TAVOREVB, "PXA930 Evaluation Board (aka TavorEVB)")
+       /* Maintainer: Eric Miao <eric.miao@marvell.com> */
+       .phys_io        = 0x40000000,
+       .boot_params    = 0xa0000100,
+       .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
+       .map_io         = pxa_map_io,
+       .init_irq       = pxa3xx_init_irq,
+       .timer          = &pxa_timer,
+       .init_machine   = tavorevb_init,
+MACHINE_END
diff --git a/arch/arm/mach-pxa/tosa-bt.c b/arch/arm/mach-pxa/tosa-bt.c
new file mode 100644 (file)
index 0000000..7d85054
--- /dev/null
@@ -0,0 +1,150 @@
+/*
+ * Bluetooth built-in chip control
+ *
+ * Copyright (c) 2008 Dmitry Baryshkov
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/gpio.h>
+#include <linux/delay.h>
+#include <linux/rfkill.h>
+
+#include <asm/arch/tosa_bt.h>
+
+static void tosa_bt_on(struct tosa_bt_data *data)
+{
+       gpio_set_value(data->gpio_reset, 0);
+       gpio_set_value(data->gpio_pwr, 1);
+       gpio_set_value(data->gpio_reset, 1);
+       mdelay(20);
+       gpio_set_value(data->gpio_reset, 0);
+}
+
+static void tosa_bt_off(struct tosa_bt_data *data)
+{
+       gpio_set_value(data->gpio_reset, 1);
+       mdelay(10);
+       gpio_set_value(data->gpio_pwr, 0);
+       gpio_set_value(data->gpio_reset, 0);
+}
+
+static int tosa_bt_toggle_radio(void *data, enum rfkill_state state)
+{
+       pr_info("BT_RADIO going: %s\n",
+                       state == RFKILL_STATE_ON ? "on" : "off");
+
+       if (state == RFKILL_STATE_ON) {
+               pr_info("TOSA_BT: going ON\n");
+               tosa_bt_on(data);
+       } else {
+               pr_info("TOSA_BT: going OFF\n");
+               tosa_bt_off(data);
+       }
+       return 0;
+}
+
+static int tosa_bt_probe(struct platform_device *dev)
+{
+       int rc;
+       struct rfkill *rfk;
+
+       struct tosa_bt_data *data = dev->dev.platform_data;
+
+       rc = gpio_request(data->gpio_reset, "Bluetooth reset");
+       if (rc)
+               goto err_reset;
+       rc = gpio_direction_output(data->gpio_reset, 0);
+       if (rc)
+               goto err_reset_dir;
+       rc = gpio_request(data->gpio_pwr, "Bluetooth power");
+       if (rc)
+               goto err_pwr;
+       rc = gpio_direction_output(data->gpio_pwr, 0);
+       if (rc)
+               goto err_pwr_dir;
+
+       rfk = rfkill_allocate(&dev->dev, RFKILL_TYPE_BLUETOOTH);
+       if (!rfk) {
+               rc = -ENOMEM;
+               goto err_rfk_alloc;
+       }
+
+       rfk->name = "tosa-bt";
+       rfk->toggle_radio = tosa_bt_toggle_radio;
+       rfk->data = data;
+#ifdef CONFIG_RFKILL_LEDS
+       rfk->led_trigger.name = "tosa-bt";
+#endif
+
+       rc = rfkill_register(rfk);
+       if (rc)
+               goto err_rfkill;
+
+       platform_set_drvdata(dev, rfk);
+
+       return 0;
+
+err_rfkill:
+       if (rfk)
+               rfkill_free(rfk);
+       rfk = NULL;
+err_rfk_alloc:
+       tosa_bt_off(data);
+err_pwr_dir:
+       gpio_free(data->gpio_pwr);
+err_pwr:
+err_reset_dir:
+       gpio_free(data->gpio_reset);
+err_reset:
+       return rc;
+}
+
+static int __devexit tosa_bt_remove(struct platform_device *dev)
+{
+       struct tosa_bt_data *data = dev->dev.platform_data;
+       struct rfkill *rfk = platform_get_drvdata(dev);
+
+       platform_set_drvdata(dev, NULL);
+
+       if (rfk)
+               rfkill_unregister(rfk);
+       rfk = NULL;
+
+       tosa_bt_off(data);
+
+       gpio_free(data->gpio_pwr);
+       gpio_free(data->gpio_reset);
+
+       return 0;
+}
+
+static struct platform_driver tosa_bt_driver = {
+       .probe = tosa_bt_probe,
+       .remove = __devexit_p(tosa_bt_remove),
+
+       .driver = {
+               .name = "tosa-bt",
+               .owner = THIS_MODULE,
+       },
+};
+
+
+static int __init tosa_bt_init(void)
+{
+       return platform_driver_register(&tosa_bt_driver);
+}
+
+static void __exit tosa_bt_exit(void)
+{
+       platform_driver_unregister(&tosa_bt_driver);
+}
+
+module_init(tosa_bt_init);
+module_exit(tosa_bt_exit);
index ab4a9f57991352c82a5520701ceca365a66f21fc..fea17ce6b55f5a812fa5f89e57cf851fc78850c5 100644 (file)
 #include <linux/major.h>
 #include <linux/fs.h>
 #include <linux/interrupt.h>
+#include <linux/delay.h>
+#include <linux/fb.h>
 #include <linux/mmc/host.h>
+#include <linux/mfd/tc6393xb.h>
+#include <linux/mfd/tmio.h>
+#include <linux/mtd/nand.h>
+#include <linux/mtd/partitions.h>
 #include <linux/pm.h>
-#include <linux/delay.h>
 #include <linux/gpio_keys.h>
 #include <linux/input.h>
 #include <linux/gpio.h>
+#include <linux/pda_power.h>
+#include <linux/rfkill.h>
 
 #include <asm/setup.h>
-#include <asm/memory.h>
 #include <asm/mach-types.h>
-#include <asm/hardware.h>
-#include <asm/irq.h>
-#include <asm/system.h>
-#include <asm/arch/pxa-regs.h>
 #include <asm/arch/pxa2xx-regs.h>
 #include <asm/arch/mfp-pxa25x.h>
 #include <asm/arch/irda.h>
 #include <asm/arch/i2c.h>
 #include <asm/arch/mmc.h>
 #include <asm/arch/udc.h>
+#include <asm/arch/tosa_bt.h>
 
 #include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-#include <asm/mach/irq.h>
 #include <asm/arch/tosa.h>
 
 #include <asm/hardware/scoop.h>
@@ -86,7 +87,7 @@ static unsigned long tosa_pin_config[] = {
        GPIO6_MMC_CLK,
        GPIO8_MMC_CS0,
        GPIO9_GPIO, /* Detect */
-       // GPIO10 nSD_INT
+       GPIO10_GPIO, /* nSD_INT */
 
        /* CF */
        GPIO13_GPIO, /* CD_IRQ */
@@ -124,34 +125,34 @@ static unsigned long tosa_pin_config[] = {
        GPIO44_BTUART_CTS,
        GPIO45_BTUART_RTS,
 
-       /* IrDA */
-       GPIO46_STUART_RXD,
-       GPIO47_STUART_TXD,
-
        /* Keybd */
-       GPIO58_GPIO,
-       GPIO59_GPIO,
-       GPIO60_GPIO,
-       GPIO61_GPIO,
-       GPIO62_GPIO,
-       GPIO63_GPIO,
-       GPIO64_GPIO,
-       GPIO65_GPIO,
-       GPIO66_GPIO,
-       GPIO67_GPIO,
-       GPIO68_GPIO,
-       GPIO69_GPIO,
-       GPIO70_GPIO,
-       GPIO71_GPIO,
-       GPIO72_GPIO,
-       GPIO73_GPIO,
-       GPIO74_GPIO,
-       GPIO75_GPIO,
+       GPIO58_GPIO | MFP_LPM_DRIVE_LOW,
+       GPIO59_GPIO | MFP_LPM_DRIVE_LOW,
+       GPIO60_GPIO | MFP_LPM_DRIVE_LOW,
+       GPIO61_GPIO | MFP_LPM_DRIVE_LOW,
+       GPIO62_GPIO | MFP_LPM_DRIVE_LOW,
+       GPIO63_GPIO | MFP_LPM_DRIVE_LOW,
+       GPIO64_GPIO | MFP_LPM_DRIVE_LOW,
+       GPIO65_GPIO | MFP_LPM_DRIVE_LOW,
+       GPIO66_GPIO | MFP_LPM_DRIVE_LOW,
+       GPIO67_GPIO | MFP_LPM_DRIVE_LOW,
+       GPIO68_GPIO | MFP_LPM_DRIVE_LOW,
+       GPIO69_GPIO | MFP_LPM_DRIVE_LOW,
+       GPIO70_GPIO | MFP_LPM_DRIVE_LOW,
+       GPIO71_GPIO | MFP_LPM_DRIVE_LOW,
+       GPIO72_GPIO | MFP_LPM_DRIVE_LOW,
+       GPIO73_GPIO | MFP_LPM_DRIVE_LOW,
+       GPIO74_GPIO | MFP_LPM_DRIVE_LOW,
+       GPIO75_GPIO | MFP_LPM_DRIVE_LOW,
 
        /* SPI */
        GPIO81_SSP2_CLK_OUT,
        GPIO82_SSP2_FRM_OUT,
        GPIO83_SSP2_TXD,
+
+       /* IrDA is managed in other way */
+       GPIO46_GPIO,
+       GPIO47_GPIO,
 };
 
 /*
@@ -249,6 +250,15 @@ static int tosa_mci_init(struct device *dev, irq_handler_t tosa_detect_int, void
 
        tosa_mci_platform_data.detect_delay = msecs_to_jiffies(250);
 
+       err = gpio_request(TOSA_GPIO_nSD_DETECT, "MMC/SD card detect");
+       if (err) {
+               printk(KERN_ERR "tosa_mci_init: can't request nSD_DETECT gpio\n");
+               goto err_gpio_detect;
+       }
+       err = gpio_direction_input(TOSA_GPIO_nSD_DETECT);
+       if (err)
+               goto err_gpio_detect_dir;
+
        err = request_irq(TOSA_IRQ_GPIO_nSD_DETECT, tosa_detect_int,
                          IRQF_DISABLED | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
                                "MMC/SD card detect", data);
@@ -257,7 +267,7 @@ static int tosa_mci_init(struct device *dev, irq_handler_t tosa_detect_int, void
                goto err_irq;
        }
 
-       err = gpio_request(TOSA_GPIO_SD_WP, "sd_wp");
+       err = gpio_request(TOSA_GPIO_SD_WP, "SD Write Protect");
        if (err) {
                printk(KERN_ERR "tosa_mci_init: can't request SD_WP gpio\n");
                goto err_gpio_wp;
@@ -266,7 +276,7 @@ static int tosa_mci_init(struct device *dev, irq_handler_t tosa_detect_int, void
        if (err)
                goto err_gpio_wp_dir;
 
-       err = gpio_request(TOSA_GPIO_PWR_ON, "sd_pwr");
+       err = gpio_request(TOSA_GPIO_PWR_ON, "SD Power");
        if (err) {
                printk(KERN_ERR "tosa_mci_init: can't request SD_PWR gpio\n");
                goto err_gpio_pwr;
@@ -275,8 +285,20 @@ static int tosa_mci_init(struct device *dev, irq_handler_t tosa_detect_int, void
        if (err)
                goto err_gpio_pwr_dir;
 
+       err = gpio_request(TOSA_GPIO_nSD_INT, "SD Int");
+       if (err) {
+               printk(KERN_ERR "tosa_mci_init: can't request SD_PWR gpio\n");
+               goto err_gpio_int;
+       }
+       err = gpio_direction_input(TOSA_GPIO_nSD_INT);
+       if (err)
+               goto err_gpio_int_dir;
+
        return 0;
 
+err_gpio_int_dir:
+       gpio_free(TOSA_GPIO_nSD_INT);
+err_gpio_int:
 err_gpio_pwr_dir:
        gpio_free(TOSA_GPIO_PWR_ON);
 err_gpio_pwr:
@@ -285,6 +307,9 @@ err_gpio_wp_dir:
 err_gpio_wp:
        free_irq(TOSA_IRQ_GPIO_nSD_DETECT, data);
 err_irq:
+err_gpio_detect_dir:
+       gpio_free(TOSA_GPIO_nSD_DETECT);
+err_gpio_detect:
        return err;
 }
 
@@ -306,9 +331,11 @@ static int tosa_mci_get_ro(struct device *dev)
 
 static void tosa_mci_exit(struct device *dev, void *data)
 {
+       gpio_free(TOSA_GPIO_nSD_INT);
        gpio_free(TOSA_GPIO_PWR_ON);
        gpio_free(TOSA_GPIO_SD_WP);
        free_irq(TOSA_IRQ_GPIO_nSD_DETECT, data);
+       gpio_free(TOSA_GPIO_nSD_DETECT);
 }
 
 static struct pxamci_platform_data tosa_mci_platform_data = {
@@ -322,29 +349,55 @@ static struct pxamci_platform_data tosa_mci_platform_data = {
 /*
  * Irda
  */
+static void tosa_irda_transceiver_mode(struct device *dev, int mode)
+{
+       if (mode & IR_OFF) {
+               gpio_set_value(TOSA_GPIO_IR_POWERDWN, 0);
+               pxa2xx_transceiver_mode(dev, mode);
+               gpio_direction_output(TOSA_GPIO_IRDA_TX, 0);
+       } else {
+               pxa2xx_transceiver_mode(dev, mode);
+               gpio_set_value(TOSA_GPIO_IR_POWERDWN, 1);
+       }
+}
+
 static int tosa_irda_startup(struct device *dev)
 {
        int ret;
 
+       ret = gpio_request(TOSA_GPIO_IRDA_TX, "IrDA TX");
+       if (ret)
+               goto err_tx;
+       ret = gpio_direction_output(TOSA_GPIO_IRDA_TX, 0);
+       if (ret)
+               goto err_tx_dir;
+
        ret = gpio_request(TOSA_GPIO_IR_POWERDWN, "IrDA powerdown");
        if (ret)
-               return ret;
+               goto err_pwr;
 
        ret = gpio_direction_output(TOSA_GPIO_IR_POWERDWN, 0);
        if (ret)
-               gpio_free(TOSA_GPIO_IR_POWERDWN);
+               goto err_pwr_dir;
 
-       return ret;
-       }
+       tosa_irda_transceiver_mode(dev, IR_SIRMODE | IR_OFF);
 
-static void tosa_irda_shutdown(struct device *dev)
-{
+       return 0;
+
+err_pwr_dir:
        gpio_free(TOSA_GPIO_IR_POWERDWN);
+err_pwr:
+err_tx_dir:
+       gpio_free(TOSA_GPIO_IRDA_TX);
+err_tx:
+       return ret;
 }
 
-static void tosa_irda_transceiver_mode(struct device *dev, int mode)
+static void tosa_irda_shutdown(struct device *dev)
 {
-       gpio_set_value(TOSA_GPIO_IR_POWERDWN, !(mode & IR_OFF));
+       tosa_irda_transceiver_mode(dev, IR_SIRMODE | IR_OFF);
+       gpio_free(TOSA_GPIO_IR_POWERDWN);
+       gpio_free(TOSA_GPIO_IRDA_TX);
 }
 
 static struct pxaficp_platform_data tosa_ficp_platform_data = {
@@ -354,6 +407,70 @@ static struct pxaficp_platform_data tosa_ficp_platform_data = {
        .shutdown = tosa_irda_shutdown,
 };
 
+/*
+ * Tosa AC IN
+ */
+static int tosa_power_init(struct device *dev)
+{
+       int ret = gpio_request(TOSA_GPIO_AC_IN, "ac in");
+       if (ret)
+               goto err_gpio_req;
+
+       ret = gpio_direction_input(TOSA_GPIO_AC_IN);
+       if (ret)
+               goto err_gpio_in;
+
+       return 0;
+
+err_gpio_in:
+       gpio_free(TOSA_GPIO_AC_IN);
+err_gpio_req:
+       return ret;
+}
+
+static void tosa_power_exit(struct device *dev)
+{
+       gpio_free(TOSA_GPIO_AC_IN);
+}
+
+static int tosa_power_ac_online(void)
+{
+       return gpio_get_value(TOSA_GPIO_AC_IN) == 0;
+}
+
+static char *tosa_ac_supplied_to[] = {
+       "main-battery",
+       "backup-battery",
+       "jacket-battery",
+};
+
+static struct pda_power_pdata tosa_power_data = {
+       .init                   = tosa_power_init,
+       .is_ac_online           = tosa_power_ac_online,
+       .exit                   = tosa_power_exit,
+       .supplied_to            = tosa_ac_supplied_to,
+       .num_supplicants        = ARRAY_SIZE(tosa_ac_supplied_to),
+};
+
+static struct resource tosa_power_resource[] = {
+       {
+               .name           = "ac",
+               .start          = gpio_to_irq(TOSA_GPIO_AC_IN),
+               .end            = gpio_to_irq(TOSA_GPIO_AC_IN),
+               .flags          = IORESOURCE_IRQ |
+                                 IORESOURCE_IRQ_HIGHEDGE |
+                                 IORESOURCE_IRQ_LOWEDGE,
+       },
+};
+
+static struct platform_device tosa_power_device = {
+       .name                   = "pda-power",
+       .id                     = -1,
+       .dev.platform_data      = &tosa_power_data,
+       .resource               = tosa_power_resource,
+       .num_resources          = ARRAY_SIZE(tosa_power_resource),
+};
+
 /*
  * Tosa Keyboard
  */
@@ -439,7 +556,7 @@ static struct gpio_led tosa_gpio_leds[] = {
        },
        {
                .name                   = "tosa:blue:bluetooth",
-               .default_trigger        = "none",
+               .default_trigger        = "tosa-bt",
                .gpio                   = TOSA_GPIO_BT_LED,
        },
 };
@@ -457,21 +574,184 @@ static struct platform_device tosaled_device = {
        },
 };
 
+/*
+ * Toshiba Mobile IO Controller
+ */
+static struct resource tc6393xb_resources[] = {
+       [0] = {
+               .start  = TOSA_LCDC_PHYS,
+               .end    = TOSA_LCDC_PHYS + 0x3ffffff,
+               .flags  = IORESOURCE_MEM,
+       },
+
+       [1] = {
+               .start  = TOSA_IRQ_GPIO_TC6393XB_INT,
+               .end    = TOSA_IRQ_GPIO_TC6393XB_INT,
+               .flags  = IORESOURCE_IRQ,
+       },
+};
+
+
+static int tosa_tc6393xb_enable(struct platform_device *dev)
+{
+       int rc;
+
+       rc = gpio_request(TOSA_GPIO_TC6393XB_REST_IN, "tc6393xb #pclr");
+       if (rc)
+               goto err_req_pclr;
+       rc = gpio_request(TOSA_GPIO_TC6393XB_SUSPEND, "tc6393xb #suspend");
+       if (rc)
+               goto err_req_suspend;
+       rc = gpio_request(TOSA_GPIO_TC6393XB_L3V_ON, "l3v");
+       if (rc)
+               goto err_req_l3v;
+       rc = gpio_direction_output(TOSA_GPIO_TC6393XB_L3V_ON, 0);
+       if (rc)
+               goto err_dir_l3v;
+       rc = gpio_direction_output(TOSA_GPIO_TC6393XB_SUSPEND, 0);
+       if (rc)
+               goto err_dir_suspend;
+       rc = gpio_direction_output(TOSA_GPIO_TC6393XB_REST_IN, 0);
+       if (rc)
+               goto err_dir_pclr;
+
+       mdelay(1);
+
+       gpio_set_value(TOSA_GPIO_TC6393XB_SUSPEND, 1);
+
+       mdelay(10);
+
+       gpio_set_value(TOSA_GPIO_TC6393XB_REST_IN, 1);
+       gpio_set_value(TOSA_GPIO_TC6393XB_L3V_ON, 1);
+
+       return 0;
+err_dir_pclr:
+err_dir_suspend:
+err_dir_l3v:
+       gpio_free(TOSA_GPIO_TC6393XB_L3V_ON);
+err_req_l3v:
+       gpio_free(TOSA_GPIO_TC6393XB_SUSPEND);
+err_req_suspend:
+       gpio_free(TOSA_GPIO_TC6393XB_REST_IN);
+err_req_pclr:
+       return rc;
+}
+
+static int tosa_tc6393xb_disable(struct platform_device *dev)
+{
+       gpio_free(TOSA_GPIO_TC6393XB_L3V_ON);
+       gpio_free(TOSA_GPIO_TC6393XB_SUSPEND);
+       gpio_free(TOSA_GPIO_TC6393XB_REST_IN);
+
+       return 0;
+}
+
+static int tosa_tc6393xb_resume(struct platform_device *dev)
+{
+       gpio_set_value(TOSA_GPIO_TC6393XB_SUSPEND, 1);
+       mdelay(10);
+       gpio_set_value(TOSA_GPIO_TC6393XB_L3V_ON, 1);
+       mdelay(10);
+
+       return 0;
+}
+
+static int tosa_tc6393xb_suspend(struct platform_device *dev)
+{
+       gpio_set_value(TOSA_GPIO_TC6393XB_L3V_ON, 0);
+       gpio_set_value(TOSA_GPIO_TC6393XB_SUSPEND, 0);
+       return 0;
+}
+
+static struct mtd_partition tosa_nand_partition[] = {
+       {
+               .name   = "smf",
+               .offset = 0,
+               .size   = 7 * 1024 * 1024,
+       },
+       {
+               .name   = "root",
+               .offset = MTDPART_OFS_APPEND,
+               .size   = 28 * 1024 * 1024,
+       },
+       {
+               .name   = "home",
+               .offset = MTDPART_OFS_APPEND,
+               .size   = MTDPART_SIZ_FULL,
+       },
+};
+
+static uint8_t scan_ff_pattern[] = { 0xff, 0xff };
+
+static struct nand_bbt_descr tosa_tc6393xb_nand_bbt = {
+       .options        = 0,
+       .offs           = 4,
+       .len            = 2,
+       .pattern        = scan_ff_pattern
+};
+
+static struct tmio_nand_data tosa_tc6393xb_nand_config = {
+       .num_partitions = ARRAY_SIZE(tosa_nand_partition),
+       .partition      = tosa_nand_partition,
+       .badblock_pattern = &tosa_tc6393xb_nand_bbt,
+};
+
+static struct tc6393xb_platform_data tosa_tc6393xb_setup = {
+       .scr_pll2cr     = 0x0cc1,
+       .scr_gper       = 0x3300,
+       .scr_gpo_dsr    =
+               TOSA_TC6393XB_GPIO_BIT(TOSA_GPIO_CARD_VCC_ON),
+       .scr_gpo_doecr  =
+               TOSA_TC6393XB_GPIO_BIT(TOSA_GPIO_CARD_VCC_ON),
+
+       .irq_base       = IRQ_BOARD_START,
+       .gpio_base      = TOSA_TC6393XB_GPIO_BASE,
+
+       .enable         = tosa_tc6393xb_enable,
+       .disable        = tosa_tc6393xb_disable,
+       .suspend        = tosa_tc6393xb_suspend,
+       .resume         = tosa_tc6393xb_resume,
+
+       .nand_data      = &tosa_tc6393xb_nand_config,
+};
+
+
+static struct platform_device tc6393xb_device = {
+       .name   = "tc6393xb",
+       .id     = -1,
+       .dev    = {
+               .platform_data  = &tosa_tc6393xb_setup,
+       },
+       .num_resources  = ARRAY_SIZE(tc6393xb_resources),
+       .resource       = tc6393xb_resources,
+};
+
+static struct tosa_bt_data tosa_bt_data = {
+       .gpio_pwr       = TOSA_GPIO_BT_PWR_EN,
+       .gpio_reset     = TOSA_GPIO_BT_RESET,
+};
+
+static struct platform_device tosa_bt_device = {
+       .name   = "tosa-bt",
+       .id     = -1,
+       .dev.platform_data = &tosa_bt_data,
+};
+
+
 static struct platform_device *devices[] __initdata = {
        &tosascoop_device,
        &tosascoop_jc_device,
+       &tc6393xb_device,
+       &tosa_power_device,
        &tosakbd_device,
        &tosa_gpio_keys_device,
        &tosaled_device,
+       &tosa_bt_device,
 };
 
 static void tosa_poweroff(void)
 {
-       gpio_direction_output(TOSA_GPIO_ON_RESET, 0);
-       gpio_set_value(TOSA_GPIO_ON_RESET, 1);
-
-       mdelay(1000);
-       arm_machine_restart('h');
+       arm_machine_restart('g');
 }
 
 static void tosa_restart(char mode)
@@ -485,10 +765,14 @@ static void tosa_restart(char mode)
 
 static void __init tosa_init(void)
 {
+       int dummy;
+
        pxa2xx_mfp_config(ARRAY_AND_SIZE(tosa_pin_config));
        gpio_set_wake(MFP_PIN_GPIO1, 1);
        /* We can't pass to gpio-keys since it will drop the Reset altfunc */
 
+       init_gpio_reset(TOSA_GPIO_ON_RESET);
+
        pm_power_off = tosa_poweroff;
        arm_pm_restart = tosa_restart;
 
@@ -497,6 +781,10 @@ static void __init tosa_init(void)
        /* enable batt_fault */
        PMCR = 0x01;
 
+       dummy = gpiochip_reserve(TOSA_SCOOP_GPIO_BASE, 12);
+       dummy = gpiochip_reserve(TOSA_SCOOP_JC_GPIO_BASE, 12);
+       dummy = gpiochip_reserve(TOSA_TC6393XB_GPIO_BASE, 16);
+
        pxa_set_mci_info(&tosa_mci_platform_data);
        pxa_set_udc_info(&udc_info);
        pxa_set_ficp_info(&tosa_ficp_platform_data);
index 61e2440230896c2a056105629765af1eee47b52d..dee7bf36f013f76af3950eed48ecf299ec010fac 100644 (file)
@@ -254,6 +254,7 @@ static void board_irda_mode(struct device *dev, int mode)
                /* Fast mode */
                trizeps_conxs_ircr |= ConXS_IRCR_MODE;
        }
+       pxa2xx_transceiver_mode(dev, mode);
        if (mode & IR_OFF) {
                trizeps_conxs_ircr |= ConXS_IRCR_SD;
        } else {
index 66b446ca273dbbd06032207117153401ab046193..8fca6d890b7de5bd863b5c340bad375b31df10c5 100644 (file)
@@ -19,6 +19,7 @@
 #include <linux/init.h>
 #include <linux/platform_device.h>
 #include <linux/pwm_backlight.h>
+#include <linux/smc91x.h>
 
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
@@ -29,6 +30,7 @@
 #include <asm/arch/zylonite.h>
 #include <asm/arch/mmc.h>
 #include <asm/arch/pxa27x_keypad.h>
+#include <asm/arch/pxa3xx_nand.h>
 
 #include "devices.h"
 #include "generic.h"
@@ -37,6 +39,8 @@
 struct platform_mmc_slot zylonite_mmc_slot[MAX_SLOTS];
 
 int gpio_eth_irq;
+int gpio_debug_led1;
+int gpio_debug_led2;
 
 int wm9713_irq;
 
@@ -56,13 +60,57 @@ static struct resource smc91x_resources[] = {
        }
 };
 
+static struct smc91x_platdata zylonite_smc91x_info = {
+       .flags  = SMC91X_USE_8BIT | SMC91X_USE_16BIT |
+                 SMC91X_NOWAIT | SMC91X_USE_DMA,
+};
+
 static struct platform_device smc91x_device = {
        .name           = "smc91x",
        .id             = 0,
        .num_resources  = ARRAY_SIZE(smc91x_resources),
        .resource       = smc91x_resources,
+       .dev            = {
+               .platform_data = &zylonite_smc91x_info,
+       },
+};
+
+#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
+static struct gpio_led zylonite_debug_leds[] = {
+       [0] = {
+               .name                   = "zylonite:yellow:1",
+               .default_trigger        = "heartbeat",
+       },
+       [1] = {
+               .name                   = "zylonite:yellow:2",
+               .default_trigger        = "default-on",
+       },
 };
 
+static struct gpio_led_platform_data zylonite_debug_leds_info = {
+       .leds           = zylonite_debug_leds,
+       .num_leds       = ARRAY_SIZE(zylonite_debug_leds),
+};
+
+static struct platform_device zylonite_device_leds = {
+       .name           = "leds-gpio",
+       .id             = -1,
+       .dev            = {
+               .platform_data = &zylonite_debug_leds_info,
+       }
+};
+
+static void __init zylonite_init_leds(void)
+{
+       zylonite_debug_leds[0].gpio = gpio_debug_led1;
+       zylonite_debug_leds[1].gpio = gpio_debug_led2;
+
+       platform_device_register(&zylonite_device_leds);
+}
+#else
+static inline void zylonite_init_leds(void) {}
+#endif
+
 #if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
 static struct platform_pwm_backlight_data zylonite_backlight_data = {
        .pwm_id         = 3,
@@ -259,7 +307,7 @@ static void __init zylonite_init_mmc(void)
 static inline void zylonite_init_mmc(void) {}
 #endif
 
-#if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULES)
+#if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULE)
 static unsigned int zylonite_matrix_key_map[] = {
        /* KEY(row, col, key_code) */
        KEY(0, 0, KEY_A), KEY(0, 1, KEY_B), KEY(0, 2, KEY_C), KEY(0, 5, KEY_D),
@@ -324,6 +372,57 @@ static void __init zylonite_init_keypad(void)
 static inline void zylonite_init_keypad(void) {}
 #endif
 
+#if defined(CONFIG_MTD_NAND_PXA3xx) || defined(CONFIG_MTD_NAND_PXA3xx_MODULE)
+static struct mtd_partition zylonite_nand_partitions[] = {
+       [0] = {
+               .name        = "Bootloader",
+               .offset      = 0,
+               .size        = 0x060000,
+               .mask_flags  = MTD_WRITEABLE, /* force read-only */
+       },
+       [1] = {
+               .name        = "Kernel",
+               .offset      = 0x060000,
+               .size        = 0x200000,
+               .mask_flags  = MTD_WRITEABLE, /* force read-only */
+       },
+       [2] = {
+               .name        = "Filesystem",
+               .offset      = 0x0260000,
+               .size        = 0x3000000,     /* 48M - rootfs */
+       },
+       [3] = {
+               .name        = "MassStorage",
+               .offset      = 0x3260000,
+               .size        = 0x3d40000,
+       },
+       [4] = {
+               .name        = "BBT",
+               .offset      = 0x6FA0000,
+               .size        = 0x80000,
+               .mask_flags  = MTD_WRITEABLE,  /* force read-only */
+       },
+       /* NOTE: we reserve some blocks at the end of the NAND flash for
+        * bad block management, and the max number of relocation blocks
+        * differs on different platforms. Please take care with it when
+        * defining the partition table.
+        */
+};
+
+static struct pxa3xx_nand_platform_data zylonite_nand_info = {
+       .enable_arbiter = 1,
+       .parts          = zylonite_nand_partitions,
+       .nr_parts       = ARRAY_SIZE(zylonite_nand_partitions),
+};
+
+static void __init zylonite_init_nand(void)
+{
+       pxa3xx_set_nand_info(&zylonite_nand_info);
+}
+#else
+static inline void zylonite_init_nand(void) {}
+#endif /* CONFIG_MTD_NAND_PXA3xx || CONFIG_MTD_NAND_PXA3xx_MODULE */
+
 static void __init zylonite_init(void)
 {
        /* board-processor specific initialization */
@@ -342,6 +441,8 @@ static void __init zylonite_init(void)
        zylonite_init_lcd();
        zylonite_init_mmc();
        zylonite_init_keypad();
+       zylonite_init_nand();
+       zylonite_init_leds();
 }
 
 MACHINE_START(ZYLONITE, "PXA3xx Platform Development Kit (aka Zylonite)")
index 6f7ae972b8db658e137b705ae5cc2df9602fa92e..b28d46e081d34e0d1a326e18ed4e74c74aed1882 100644 (file)
 #include <linux/module.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
+#include <linux/i2c.h>
+#include <linux/i2c/pca953x.h>
 
 #include <asm/gpio.h>
 #include <asm/arch/mfp-pxa300.h>
+#include <asm/arch/i2c.h>
 #include <asm/arch/zylonite.h>
 
 #include "generic.h"
@@ -109,6 +112,10 @@ static mfp_cfg_t common_mfp_cfg[] __initdata = {
        GPIO12_MMC2_DAT3,
        GPIO13_MMC2_CLK,
        GPIO14_MMC2_CMD,
+
+       /* Standard I2C */
+       GPIO21_I2C_SCL,
+       GPIO22_I2C_SDA,
 };
 
 static mfp_cfg_t pxa300_mfp_cfg[] __initdata = {
@@ -192,6 +199,39 @@ static void __init zylonite_detect_lcd_panel(void)
                pxa3xx_mfp_write(lcd_detect_pins[i], mfpr_save[i]);
 }
 
+#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
+static struct pca953x_platform_data gpio_exp[] = {
+       [0] = {
+               .gpio_base      = 128,
+       },
+       [1] = {
+               .gpio_base      = 144,
+       },
+};
+
+struct i2c_board_info zylonite_i2c_board_info[] = {
+       {
+               .type           = "pca9539",
+               .addr           = 0x74,
+               .platform_data  = &gpio_exp[0],
+               .irq            = IRQ_GPIO(18),
+       }, {
+               .type           = "pca9539",
+               .addr           = 0x75,
+               .platform_data  = &gpio_exp[1],
+               .irq            = IRQ_GPIO(19),
+       },
+};
+
+static void __init zylonite_init_i2c(void)
+{
+       pxa_set_i2c_info(NULL);
+       i2c_register_board_info(0, ARRAY_AND_SIZE(zylonite_i2c_board_info));
+}
+#else
+static inline void zylonite_init_i2c(void) {}
+#endif
+
 void __init zylonite_pxa300_init(void)
 {
        if (cpu_is_pxa300() || cpu_is_pxa310()) {
@@ -207,6 +247,8 @@ void __init zylonite_pxa300_init(void)
 
                /* WM9713 IRQ */
                wm9713_irq = mfp_to_gpio(MFP_PIN_GPIO26);
+
+               zylonite_init_i2c();
        }
 
        if (cpu_is_pxa300()) {
@@ -222,4 +264,8 @@ void __init zylonite_pxa300_init(void)
                zylonite_mmc_slot[2].gpio_cd = EXT_GPIO(30);
                zylonite_mmc_slot[2].gpio_wp = EXT_GPIO(31);
        }
+
+       /* GPIOs for Debug LEDs */
+       gpio_debug_led1 = EXT_GPIO(25);
+       gpio_debug_led2 = EXT_GPIO(26);
 }
index 2b4fc34919ac3d59c54ef9b6be2fcb9d7f3c0f4d..2b7fba7a29211b0fcfa77af0db8ea26b1484ea4d 100644 (file)
@@ -116,6 +116,10 @@ static mfp_cfg_t mfp_cfg[] __initdata = {
        GPIO27_MMC2_DAT3,
        GPIO28_MMC2_CLK,
        GPIO29_MMC2_CMD,
+
+       /* Debug LEDs */
+       GPIO1_2_GPIO | MFP_LPM_DRIVE_HIGH,
+       GPIO4_2_GPIO | MFP_LPM_DRIVE_HIGH,
 };
 
 #define NUM_LCD_DETECT_PINS    7
@@ -189,6 +193,8 @@ void __init zylonite_pxa320_init(void)
 
                /* GPIO pin assignment */
                gpio_eth_irq    = mfp_to_gpio(MFP_PIN_GPIO9);
+               gpio_debug_led1 = mfp_to_gpio(MFP_PIN_GPIO1_2);
+               gpio_debug_led2 = mfp_to_gpio(MFP_PIN_GPIO4_2);
 
                /* MMC card detect & write protect for controller 0 */
                zylonite_mmc_slot[0].gpio_cd  = mfp_to_gpio(MFP_PIN_GPIO1);
index fc97fe57ee6feeb473ca4e178251db5c50b32617..b5809c51d13f60335965fdcfdd07ff7e11deb683 100644 (file)
@@ -103,7 +103,7 @@ static void clk_gpio27_disable(void)
 }
 
 static struct clk clk_gpio27 = {
-       .name           = "GPIO27_CLK",
+       .name           = "SA1111_CLK",
        .rate           = 3686400,
        .enable         = clk_gpio27_enable,
        .disable        = clk_gpio27_disable,
index f64b92557b11e82b8bebd08ff51b58d876182ab0..2e27a8c8372b0ffb3227cb8a3ceb9a5f67514693 100644 (file)
@@ -76,3 +76,5 @@ obj-$(CONFIG_CPU_V7)          += proc-v7.o
 
 obj-$(CONFIG_CACHE_FEROCEON_L2)        += cache-feroceon-l2.o
 obj-$(CONFIG_CACHE_L2X0)       += cache-l2x0.o
+obj-$(CONFIG_CACHE_XSC3L2)     += cache-xsc3l2.o
+
index 0be5630ff568fe77780a88b64fc0b5c87c3a0cec..8b8f564c3aa25a5c59dea10c2c96fec47e54b349 100644 (file)
@@ -12,7 +12,7 @@
 #
 #   http://www.arm.linux.org.uk/developer/machines/?action=new
 #
-# Last update: Mon Jul 7 16:25:39 2008
+# Last update: Sun Jul 13 12:04:05 2008
 #
 # machine_is_xxx       CONFIG_xxxx             MACH_TYPE_xxx           number
 #
@@ -1812,3 +1812,11 @@ jade                     MACH_JADE               JADE                    1821
 ks8695_softplc         MACH_KS8695_SOFTPLC     KS8695_SOFTPLC          1822
 gprisc4                        MACH_GPRISC4            GPRISC4                 1823
 stamp9260              MACH_STAMP9260          STAMP9260               1824
+smdk6430               MACH_SMDK6430           SMDK6430                1825
+smdkc100               MACH_SMDKC100           SMDKC100                1826
+tavorevb               MACH_TAVOREVB           TAVOREVB                1827
+saar                   MACH_SAAR               SAAR                    1828
+deister_eyecam         MACH_DEISTER_EYECAM     DEISTER_EYECAM          1829
+at91sam9m10ek          MACH_AT91SAM9M10EK      AT91SAM9M10EK           1830
+linkstation_produo     MACH_LINKSTATION_PRODUO LINKSTATION_PRODUO      1831
+hit_b0                 MACH_HIT_B0             HIT_B0                  1832
index 01af44245b57761c5f4f5004d3b438a93e7fcc07..963c99322095176767963c31cb6feee68573c3db 100644 (file)
@@ -30,7 +30,6 @@
 
 static struct smc91x_platdata smc91x_info = {
        .flags = SMC91X_USE_16BIT,
-       .irq_flags = IRQF_TRIGGER_HIGH,
 };
 
 static struct resource smc91x_eth_resources[] = {
@@ -42,7 +41,7 @@ static struct resource smc91x_eth_resources[] = {
        },
        [1] = {
                .start  = 32, /* IRQ0 */
-               .flags  = IORESOURCE_IRQ,
+               .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
        },
 };
 
index c2502eb9aa8355488a7057602bfdfa71134785a7..9220cf46aa10645a50ceb65e8ca24c69c9841958 100644 (file)
@@ -73,6 +73,7 @@ int acpi_processor_ffh_cstate_probe(unsigned int cpu,
        struct cpuinfo_x86 *c = &cpu_data(cpu);
 
        cpumask_t saved_mask;
+       cpumask_of_cpu_ptr(new_mask, cpu);
        int retval;
        unsigned int eax, ebx, ecx, edx;
        unsigned int edx_part;
@@ -91,7 +92,7 @@ int acpi_processor_ffh_cstate_probe(unsigned int cpu,
 
        /* Make sure we are running on right CPU */
        saved_mask = current->cpus_allowed;
-       retval = set_cpus_allowed_ptr(current, &cpumask_of_cpu(cpu));
+       retval = set_cpus_allowed_ptr(current, new_mask);
        if (retval)
                return -1;
 
index b0c8208df9fa17363b5a3ed5ce35bdec8c52ad25..ff2fff56f0a8f2f1340a98a3305da24cd1dd3da1 100644 (file)
@@ -200,10 +200,12 @@ static void drv_read(struct drv_cmd *cmd)
 static void drv_write(struct drv_cmd *cmd)
 {
        cpumask_t saved_mask = current->cpus_allowed;
+       cpumask_of_cpu_ptr_declare(cpu_mask);
        unsigned int i;
 
-       for_each_cpu_mask(i, cmd->mask) {
-               set_cpus_allowed_ptr(current, &cpumask_of_cpu(i));
+       for_each_cpu_mask_nr(i, cmd->mask) {
+               cpumask_of_cpu_ptr_next(cpu_mask, i);
+               set_cpus_allowed_ptr(current, cpu_mask);
                do_drv_write(cmd);
        }
 
@@ -267,11 +269,12 @@ static unsigned int get_measured_perf(unsigned int cpu)
        } aperf_cur, mperf_cur;
 
        cpumask_t saved_mask;
+       cpumask_of_cpu_ptr(cpu_mask, cpu);
        unsigned int perf_percent;
        unsigned int retval;
 
        saved_mask = current->cpus_allowed;
-       set_cpus_allowed_ptr(current, &cpumask_of_cpu(cpu));
+       set_cpus_allowed_ptr(current, cpu_mask);
        if (get_cpu() != cpu) {
                /* We were not able to run on requested processor */
                put_cpu();
@@ -337,6 +340,7 @@ static unsigned int get_measured_perf(unsigned int cpu)
 
 static unsigned int get_cur_freq_on_cpu(unsigned int cpu)
 {
+       cpumask_of_cpu_ptr(cpu_mask, cpu);
        struct acpi_cpufreq_data *data = per_cpu(drv_data, cpu);
        unsigned int freq;
        unsigned int cached_freq;
@@ -349,7 +353,7 @@ static unsigned int get_cur_freq_on_cpu(unsigned int cpu)
        }
 
        cached_freq = data->freq_table[data->acpi_data->state].frequency;
-       freq = extract_freq(get_cur_val(&cpumask_of_cpu(cpu)), data);
+       freq = extract_freq(get_cur_val(cpu_mask), data);
        if (freq != cached_freq) {
                /*
                 * The dreaded BIOS frequency change behind our back.
@@ -451,7 +455,7 @@ static int acpi_cpufreq_target(struct cpufreq_policy *policy,
 
        freqs.old = perf->states[perf->state].core_frequency * 1000;
        freqs.new = data->freq_table[next_state].frequency;
-       for_each_cpu_mask(i, cmd.mask) {
+       for_each_cpu_mask_nr(i, cmd.mask) {
                freqs.cpu = i;
                cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
        }
@@ -466,7 +470,7 @@ static int acpi_cpufreq_target(struct cpufreq_policy *policy,
                }
        }
 
-       for_each_cpu_mask(i, cmd.mask) {
+       for_each_cpu_mask_nr(i, cmd.mask) {
                freqs.cpu = i;
                cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
        }
index 199e4e05e5dc1c7cb82cbe417864377cb399d2d8..f1685fb91fbd313058b92af93ee055af160a2447 100644 (file)
@@ -122,7 +122,7 @@ static int cpufreq_p4_target(struct cpufreq_policy *policy,
                return 0;
 
        /* notifiers */
-       for_each_cpu_mask(i, policy->cpus) {
+       for_each_cpu_mask_nr(i, policy->cpus) {
                freqs.cpu = i;
                cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
        }
@@ -130,11 +130,11 @@ static int cpufreq_p4_target(struct cpufreq_policy *policy,
        /* run on each logical CPU, see section 13.15.3 of IA32 Intel Architecture Software
         * Developer's Manual, Volume 3
         */
-       for_each_cpu_mask(i, policy->cpus)
+       for_each_cpu_mask_nr(i, policy->cpus)
                cpufreq_p4_setdc(i, p4clockmod_table[newstate].index);
 
        /* notifiers */
-       for_each_cpu_mask(i, policy->cpus) {
+       for_each_cpu_mask_nr(i, policy->cpus) {
                freqs.cpu = i;
                cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
        }
index 206791eb46e3da04f61f70c2af2eb55d384bd606..53c7b6936973c6da85137145ed0eea8eec18746f 100644 (file)
@@ -479,11 +479,12 @@ static int core_voltage_post_transition(struct powernow_k8_data *data, u32 reqvi
 static int check_supported_cpu(unsigned int cpu)
 {
        cpumask_t oldmask;
+       cpumask_of_cpu_ptr(cpu_mask, cpu);
        u32 eax, ebx, ecx, edx;
        unsigned int rc = 0;
 
        oldmask = current->cpus_allowed;
-       set_cpus_allowed_ptr(current, &cpumask_of_cpu(cpu));
+       set_cpus_allowed_ptr(current, cpu_mask);
 
        if (smp_processor_id() != cpu) {
                printk(KERN_ERR PFX "limiting to cpu %u failed\n", cpu);
@@ -966,7 +967,7 @@ static int transition_frequency_fidvid(struct powernow_k8_data *data, unsigned i
        freqs.old = find_khz_freq_from_fid(data->currfid);
        freqs.new = find_khz_freq_from_fid(fid);
 
-       for_each_cpu_mask(i, *(data->available_cores)) {
+       for_each_cpu_mask_nr(i, *(data->available_cores)) {
                freqs.cpu = i;
                cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
        }
@@ -974,7 +975,7 @@ static int transition_frequency_fidvid(struct powernow_k8_data *data, unsigned i
        res = transition_fid_vid(data, fid, vid);
        freqs.new = find_khz_freq_from_fid(data->currfid);
 
-       for_each_cpu_mask(i, *(data->available_cores)) {
+       for_each_cpu_mask_nr(i, *(data->available_cores)) {
                freqs.cpu = i;
                cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
        }
@@ -997,7 +998,7 @@ static int transition_frequency_pstate(struct powernow_k8_data *data, unsigned i
        freqs.old = find_khz_freq_from_pstate(data->powernow_table, data->currpstate);
        freqs.new = find_khz_freq_from_pstate(data->powernow_table, pstate);
 
-       for_each_cpu_mask(i, *(data->available_cores)) {
+       for_each_cpu_mask_nr(i, *(data->available_cores)) {
                freqs.cpu = i;
                cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
        }
@@ -1005,7 +1006,7 @@ static int transition_frequency_pstate(struct powernow_k8_data *data, unsigned i
        res = transition_pstate(data, pstate);
        freqs.new = find_khz_freq_from_pstate(data->powernow_table, pstate);
 
-       for_each_cpu_mask(i, *(data->available_cores)) {
+       for_each_cpu_mask_nr(i, *(data->available_cores)) {
                freqs.cpu = i;
                cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
        }
@@ -1016,6 +1017,7 @@ static int transition_frequency_pstate(struct powernow_k8_data *data, unsigned i
 static int powernowk8_target(struct cpufreq_policy *pol, unsigned targfreq, unsigned relation)
 {
        cpumask_t oldmask;
+       cpumask_of_cpu_ptr(cpu_mask, pol->cpu);
        struct powernow_k8_data *data = per_cpu(powernow_data, pol->cpu);
        u32 checkfid;
        u32 checkvid;
@@ -1030,7 +1032,7 @@ static int powernowk8_target(struct cpufreq_policy *pol, unsigned targfreq, unsi
 
        /* only run on specific CPU from here on */
        oldmask = current->cpus_allowed;
-       set_cpus_allowed_ptr(current, &cpumask_of_cpu(pol->cpu));
+       set_cpus_allowed_ptr(current, cpu_mask);
 
        if (smp_processor_id() != pol->cpu) {
                printk(KERN_ERR PFX "limiting to cpu %u failed\n", pol->cpu);
@@ -1105,6 +1107,7 @@ static int __cpuinit powernowk8_cpu_init(struct cpufreq_policy *pol)
 {
        struct powernow_k8_data *data;
        cpumask_t oldmask;
+       cpumask_of_cpu_ptr_declare(newmask);
        int rc;
 
        if (!cpu_online(pol->cpu))
@@ -1156,7 +1159,8 @@ static int __cpuinit powernowk8_cpu_init(struct cpufreq_policy *pol)
 
        /* only run on specific CPU from here on */
        oldmask = current->cpus_allowed;
-       set_cpus_allowed_ptr(current, &cpumask_of_cpu(pol->cpu));
+       cpumask_of_cpu_ptr_next(newmask, pol->cpu);
+       set_cpus_allowed_ptr(current, newmask);
 
        if (smp_processor_id() != pol->cpu) {
                printk(KERN_ERR PFX "limiting to cpu %u failed\n", pol->cpu);
@@ -1178,7 +1182,7 @@ static int __cpuinit powernowk8_cpu_init(struct cpufreq_policy *pol)
        set_cpus_allowed_ptr(current, &oldmask);
 
        if (cpu_family == CPU_HW_PSTATE)
-               pol->cpus = cpumask_of_cpu(pol->cpu);
+               pol->cpus = *newmask;
        else
                pol->cpus = per_cpu(cpu_core_map, pol->cpu);
        data->available_cores = &(pol->cpus);
@@ -1244,6 +1248,7 @@ static unsigned int powernowk8_get (unsigned int cpu)
 {
        struct powernow_k8_data *data;
        cpumask_t oldmask = current->cpus_allowed;
+       cpumask_of_cpu_ptr(newmask, cpu);
        unsigned int khz = 0;
        unsigned int first;
 
@@ -1253,7 +1258,7 @@ static unsigned int powernowk8_get (unsigned int cpu)
        if (!data)
                return -EINVAL;
 
-       set_cpus_allowed_ptr(current, &cpumask_of_cpu(cpu));
+       set_cpus_allowed_ptr(current, newmask);
        if (smp_processor_id() != cpu) {
                printk(KERN_ERR PFX
                        "limiting to CPU %d failed in powernowk8_get\n", cpu);
index 908dd347c67ec3dc29aa5ab8b3dcbae9a12e5e37..ca2ac13b7af20b2221aaa1d883a7fb89821bf4d5 100644 (file)
@@ -28,7 +28,8 @@
 #define PFX            "speedstep-centrino: "
 #define MAINTAINER     "cpufreq@lists.linux.org.uk"
 
-#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, "speedstep-centrino", msg)
+#define dprintk(msg...) \
+       cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, "speedstep-centrino", msg)
 
 #define INTEL_MSR_RANGE        (0xffff)
 
@@ -66,11 +67,12 @@ struct cpu_model
 
        struct cpufreq_frequency_table *op_points; /* clock/voltage pairs */
 };
-static int centrino_verify_cpu_id(const struct cpuinfo_x86 *c, const struct cpu_id *x);
+static int centrino_verify_cpu_id(const struct cpuinfo_x86 *c,
+                                 const struct cpu_id *x);
 
 /* Operating points for current CPU */
-static struct cpu_model *centrino_model[NR_CPUS];
-static const struct cpu_id *centrino_cpu[NR_CPUS];
+static DEFINE_PER_CPU(struct cpu_model *, centrino_model);
+static DEFINE_PER_CPU(const struct cpu_id *, centrino_cpu);
 
 static struct cpufreq_driver centrino_driver;
 
@@ -255,7 +257,7 @@ static int centrino_cpu_init_table(struct cpufreq_policy *policy)
                return -ENOENT;
        }
 
-       centrino_model[policy->cpu] = model;
+       per_cpu(centrino_model, policy->cpu) = model;
 
        dprintk("found \"%s\": max frequency: %dkHz\n",
               model->model_name, model->max_freq);
@@ -264,10 +266,14 @@ static int centrino_cpu_init_table(struct cpufreq_policy *policy)
 }
 
 #else
-static inline int centrino_cpu_init_table(struct cpufreq_policy *policy) { return -ENODEV; }
+static inline int centrino_cpu_init_table(struct cpufreq_policy *policy)
+{
+       return -ENODEV;
+}
 #endif /* CONFIG_X86_SPEEDSTEP_CENTRINO_TABLE */
 
-static int centrino_verify_cpu_id(const struct cpuinfo_x86 *c, const struct cpu_id *x)
+static int centrino_verify_cpu_id(const struct cpuinfo_x86 *c,
+                                 const struct cpu_id *x)
 {
        if ((c->x86 == x->x86) &&
            (c->x86_model == x->x86_model) &&
@@ -286,23 +292,28 @@ static unsigned extract_clock(unsigned msr, unsigned int cpu, int failsafe)
         * for centrino, as some DSDTs are buggy.
         * Ideally, this can be done using the acpi_data structure.
         */
-       if ((centrino_cpu[cpu] == &cpu_ids[CPU_BANIAS]) ||
-           (centrino_cpu[cpu] == &cpu_ids[CPU_DOTHAN_A1]) ||
-           (centrino_cpu[cpu] == &cpu_ids[CPU_DOTHAN_B0])) {
+       if ((per_cpu(centrino_cpu, cpu) == &cpu_ids[CPU_BANIAS]) ||
+           (per_cpu(centrino_cpu, cpu) == &cpu_ids[CPU_DOTHAN_A1]) ||
+           (per_cpu(centrino_cpu, cpu) == &cpu_ids[CPU_DOTHAN_B0])) {
                msr = (msr >> 8) & 0xff;
                return msr * 100000;
        }
 
-       if ((!centrino_model[cpu]) || (!centrino_model[cpu]->op_points))
+       if ((!per_cpu(centrino_model, cpu)) ||
+           (!per_cpu(centrino_model, cpu)->op_points))
                return 0;
 
        msr &= 0xffff;
-       for (i=0;centrino_model[cpu]->op_points[i].frequency != CPUFREQ_TABLE_END; i++) {
-               if (msr == centrino_model[cpu]->op_points[i].index)
-                       return centrino_model[cpu]->op_points[i].frequency;
+       for (i = 0;
+               per_cpu(centrino_model, cpu)->op_points[i].frequency
+                                                       != CPUFREQ_TABLE_END;
+            i++) {
+               if (msr == per_cpu(centrino_model, cpu)->op_points[i].index)
+                       return per_cpu(centrino_model, cpu)->
+                                                       op_points[i].frequency;
        }
        if (failsafe)
-               return centrino_model[cpu]->op_points[i-1].frequency;
+               return per_cpu(centrino_model, cpu)->op_points[i-1].frequency;
        else
                return 0;
 }
@@ -313,9 +324,10 @@ static unsigned int get_cur_freq(unsigned int cpu)
        unsigned l, h;
        unsigned clock_freq;
        cpumask_t saved_mask;
+       cpumask_of_cpu_ptr(new_mask, cpu);
 
        saved_mask = current->cpus_allowed;
-       set_cpus_allowed_ptr(current, &cpumask_of_cpu(cpu));
+       set_cpus_allowed_ptr(current, new_mask);
        if (smp_processor_id() != cpu)
                return 0;
 
@@ -347,7 +359,8 @@ static int centrino_cpu_init(struct cpufreq_policy *policy)
        int i;
 
        /* Only Intel makes Enhanced Speedstep-capable CPUs */
-       if (cpu->x86_vendor != X86_VENDOR_INTEL || !cpu_has(cpu, X86_FEATURE_EST))
+       if (cpu->x86_vendor != X86_VENDOR_INTEL ||
+           !cpu_has(cpu, X86_FEATURE_EST))
                return -ENODEV;
 
        if (cpu_has(cpu, X86_FEATURE_CONSTANT_TSC))
@@ -361,9 +374,9 @@ static int centrino_cpu_init(struct cpufreq_policy *policy)
                        break;
 
        if (i != N_IDS)
-               centrino_cpu[policy->cpu] = &cpu_ids[i];
+               per_cpu(centrino_cpu, policy->cpu) = &cpu_ids[i];
 
-       if (!centrino_cpu[policy->cpu]) {
+       if (!per_cpu(centrino_cpu, policy->cpu)) {
                dprintk("found unsupported CPU with "
                "Enhanced SpeedStep: send /proc/cpuinfo to "
                MAINTAINER "\n");
@@ -386,23 +399,26 @@ static int centrino_cpu_init(struct cpufreq_policy *policy)
                /* check to see if it stuck */
                rdmsr(MSR_IA32_MISC_ENABLE, l, h);
                if (!(l & (1<<16))) {
-                       printk(KERN_INFO PFX "couldn't enable Enhanced SpeedStep\n");
+                       printk(KERN_INFO PFX
+                               "couldn't enable Enhanced SpeedStep\n");
                        return -ENODEV;
                }
        }
 
        freq = get_cur_freq(policy->cpu);
-
-       policy->cpuinfo.transition_latency = 10000; /* 10uS transition latency */
+       policy->cpuinfo.transition_latency = 10000;
+                                               /* 10uS transition latency */
        policy->cur = freq;
 
        dprintk("centrino_cpu_init: cur=%dkHz\n", policy->cur);
 
-       ret = cpufreq_frequency_table_cpuinfo(policy, centrino_model[policy->cpu]->op_points);
+       ret = cpufreq_frequency_table_cpuinfo(policy,
+               per_cpu(centrino_model, policy->cpu)->op_points);
        if (ret)
                return (ret);
 
-       cpufreq_frequency_table_get_attr(centrino_model[policy->cpu]->op_points, policy->cpu);
+       cpufreq_frequency_table_get_attr(
+               per_cpu(centrino_model, policy->cpu)->op_points, policy->cpu);
 
        return 0;
 }
@@ -411,12 +427,12 @@ static int centrino_cpu_exit(struct cpufreq_policy *policy)
 {
        unsigned int cpu = policy->cpu;
 
-       if (!centrino_model[cpu])
+       if (!per_cpu(centrino_model, cpu))
                return -ENODEV;
 
        cpufreq_frequency_table_put_attr(cpu);
 
-       centrino_model[cpu] = NULL;
+       per_cpu(centrino_model, cpu) = NULL;
 
        return 0;
 }
@@ -430,17 +446,26 @@ static int centrino_cpu_exit(struct cpufreq_policy *policy)
  */
 static int centrino_verify (struct cpufreq_policy *policy)
 {
-       return cpufreq_frequency_table_verify(policy, centrino_model[policy->cpu]->op_points);
+       return cpufreq_frequency_table_verify(policy,
+                       per_cpu(centrino_model, policy->cpu)->op_points);
 }
 
 /**
  * centrino_setpolicy - set a new CPUFreq policy
  * @policy: new policy
  * @target_freq: the target frequency
- * @relation: how that frequency relates to achieved frequency (CPUFREQ_RELATION_L or CPUFREQ_RELATION_H)
+ * @relation: how that frequency relates to achieved frequency
+ *     (CPUFREQ_RELATION_L or CPUFREQ_RELATION_H)
  *
  * Sets a new CPUFreq policy.
  */
+struct allmasks {
+       cpumask_t               online_policy_cpus;
+       cpumask_t               saved_mask;
+       cpumask_t               set_mask;
+       cpumask_t               covered_cpus;
+};
+
 static int centrino_target (struct cpufreq_policy *policy,
                            unsigned int target_freq,
                            unsigned int relation)
@@ -448,48 +473,55 @@ static int centrino_target (struct cpufreq_policy *policy,
        unsigned int    newstate = 0;
        unsigned int    msr, oldmsr = 0, h = 0, cpu = policy->cpu;
        struct cpufreq_freqs    freqs;
-       cpumask_t               online_policy_cpus;
-       cpumask_t               saved_mask;
-       cpumask_t               set_mask;
-       cpumask_t               covered_cpus;
        int                     retval = 0;
        unsigned int            j, k, first_cpu, tmp;
-
-       if (unlikely(centrino_model[cpu] == NULL))
-               return -ENODEV;
+       CPUMASK_ALLOC(allmasks);
+       CPUMASK_PTR(online_policy_cpus, allmasks);
+       CPUMASK_PTR(saved_mask, allmasks);
+       CPUMASK_PTR(set_mask, allmasks);
+       CPUMASK_PTR(covered_cpus, allmasks);
+
+       if (unlikely(allmasks == NULL))
+               return -ENOMEM;
+
+       if (unlikely(per_cpu(centrino_model, cpu) == NULL)) {
+               retval = -ENODEV;
+               goto out;
+       }
 
        if (unlikely(cpufreq_frequency_table_target(policy,
-                       centrino_model[cpu]->op_points,
+                       per_cpu(centrino_model, cpu)->op_points,
                        target_freq,
                        relation,
                        &newstate))) {
-               return -EINVAL;
+               retval = -EINVAL;
+               goto out;
        }
 
 #ifdef CONFIG_HOTPLUG_CPU
        /* cpufreq holds the hotplug lock, so we are safe from here on */
-       cpus_and(online_policy_cpus, cpu_online_map, policy->cpus);
+       cpus_and(*online_policy_cpus, cpu_online_map, policy->cpus);
 #else
-       online_policy_cpus = policy->cpus;
+       *online_policy_cpus = policy->cpus;
 #endif
 
-       saved_mask = current->cpus_allowed;
+       *saved_mask = current->cpus_allowed;
        first_cpu = 1;
-       cpus_clear(covered_cpus);
-       for_each_cpu_mask(j, online_policy_cpus) {
+       cpus_clear(*covered_cpus);
+       for_each_cpu_mask_nr(j, *online_policy_cpus) {
                /*
                 * Support for SMP systems.
                 * Make sure we are running on CPU that wants to change freq
                 */
-               cpus_clear(set_mask);
+               cpus_clear(*set_mask);
                if (policy->shared_type == CPUFREQ_SHARED_TYPE_ANY)
-                       cpus_or(set_mask, set_mask, online_policy_cpus);
+                       cpus_or(*set_mask, *set_mask, *online_policy_cpus);
                else
-                       cpu_set(j, set_mask);
+                       cpu_set(j, *set_mask);
 
-               set_cpus_allowed_ptr(current, &set_mask);
+               set_cpus_allowed_ptr(current, set_mask);
                preempt_disable();
-               if (unlikely(!cpu_isset(smp_processor_id(), set_mask))) {
+               if (unlikely(!cpu_isset(smp_processor_id(), *set_mask))) {
                        dprintk("couldn't limit to CPUs in this domain\n");
                        retval = -EAGAIN;
                        if (first_cpu) {
@@ -500,7 +532,7 @@ static int centrino_target (struct cpufreq_policy *policy,
                        break;
                }
 
-               msr = centrino_model[cpu]->op_points[newstate].index;
+               msr = per_cpu(centrino_model, cpu)->op_points[newstate].index;
 
                if (first_cpu) {
                        rdmsr(MSR_IA32_PERF_CTL, oldmsr, h);
@@ -517,7 +549,7 @@ static int centrino_target (struct cpufreq_policy *policy,
                        dprintk("target=%dkHz old=%d new=%d msr=%04x\n",
                                target_freq, freqs.old, freqs.new, msr);
 
-                       for_each_cpu_mask(k, online_policy_cpus) {
+                       for_each_cpu_mask_nr(k, *online_policy_cpus) {
                                freqs.cpu = k;
                                cpufreq_notify_transition(&freqs,
                                        CPUFREQ_PRECHANGE);
@@ -536,11 +568,11 @@ static int centrino_target (struct cpufreq_policy *policy,
                        break;
                }
 
-               cpu_set(j, covered_cpus);
+               cpu_set(j, *covered_cpus);
                preempt_enable();
        }
 
-       for_each_cpu_mask(k, online_policy_cpus) {
+       for_each_cpu_mask_nr(k, *online_policy_cpus) {
                freqs.cpu = k;
                cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
        }
@@ -553,10 +585,12 @@ static int centrino_target (struct cpufreq_policy *policy,
                 * Best effort undo..
                 */
 
-               if (!cpus_empty(covered_cpus)) {
-                       for_each_cpu_mask(j, covered_cpus) {
-                               set_cpus_allowed_ptr(current,
-                                                    &cpumask_of_cpu(j));
+               if (!cpus_empty(*covered_cpus)) {
+                       cpumask_of_cpu_ptr_declare(new_mask);
+
+                       for_each_cpu_mask_nr(j, *covered_cpus) {
+                               cpumask_of_cpu_ptr_next(new_mask, j);
+                               set_cpus_allowed_ptr(current, new_mask);
                                wrmsr(MSR_IA32_PERF_CTL, oldmsr, h);
                        }
                }
@@ -564,19 +598,22 @@ static int centrino_target (struct cpufreq_policy *policy,
                tmp = freqs.new;
                freqs.new = freqs.old;
                freqs.old = tmp;
-               for_each_cpu_mask(j, online_policy_cpus) {
+               for_each_cpu_mask_nr(j, *online_policy_cpus) {
                        freqs.cpu = j;
                        cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
                        cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
                }
        }
-       set_cpus_allowed_ptr(current, &saved_mask);
-       return 0;
+       set_cpus_allowed_ptr(current, saved_mask);
+       retval = 0;
+       goto out;
 
 migrate_end:
        preempt_enable();
-       set_cpus_allowed_ptr(current, &saved_mask);
-       return 0;
+       set_cpus_allowed_ptr(current, saved_mask);
+out:
+       CPUMASK_FREE(allmasks);
+       return retval;
 }
 
 static struct freq_attr* centrino_attr[] = {
index 1b50244b1fdfd892e016d015e922fc12130992e2..2f3728dc24f60cc41db81e0066927a4ff15f409f 100644 (file)
@@ -244,7 +244,8 @@ static unsigned int _speedstep_get(const cpumask_t *cpus)
 
 static unsigned int speedstep_get(unsigned int cpu)
 {
-       return _speedstep_get(&cpumask_of_cpu(cpu));
+       cpumask_of_cpu_ptr(newmask, cpu);
+       return _speedstep_get(newmask);
 }
 
 /**
@@ -279,7 +280,7 @@ static int speedstep_target (struct cpufreq_policy *policy,
 
        cpus_allowed = current->cpus_allowed;
 
-       for_each_cpu_mask(i, policy->cpus) {
+       for_each_cpu_mask_nr(i, policy->cpus) {
                freqs.cpu = i;
                cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
        }
@@ -292,7 +293,7 @@ static int speedstep_target (struct cpufreq_policy *policy,
        /* allow to be run on all CPUs */
        set_cpus_allowed_ptr(current, &cpus_allowed);
 
-       for_each_cpu_mask(i, policy->cpus) {
+       for_each_cpu_mask_nr(i, policy->cpus) {
                freqs.cpu = i;
                cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
        }
index ff517f0b8cc4c1ec8ade88ca534ec929736268a7..650d40f7912bea81023dc7f9698b8b10ced4d6fa 100644 (file)
@@ -489,7 +489,7 @@ static void __cpuinit cache_remove_shared_cpu_map(unsigned int cpu, int index)
        int sibling;
 
        this_leaf = CPUID4_INFO_IDX(cpu, index);
-       for_each_cpu_mask(sibling, this_leaf->shared_cpu_map) {
+       for_each_cpu_mask_nr(sibling, this_leaf->shared_cpu_map) {
                sibling_leaf = CPUID4_INFO_IDX(sibling, index); 
                cpu_clear(cpu, sibling_leaf->shared_cpu_map);
        }
@@ -516,6 +516,7 @@ static int __cpuinit detect_cache_attributes(unsigned int cpu)
        unsigned long           j;
        int                     retval;
        cpumask_t               oldmask;
+       cpumask_of_cpu_ptr(newmask, cpu);
 
        if (num_cache_leaves == 0)
                return -ENOENT;
@@ -526,7 +527,7 @@ static int __cpuinit detect_cache_attributes(unsigned int cpu)
                return -ENOMEM;
 
        oldmask = current->cpus_allowed;
-       retval = set_cpus_allowed_ptr(current, &cpumask_of_cpu(cpu));
+       retval = set_cpus_allowed_ptr(current, newmask);
        if (retval)
                goto out;
 
index 9ab65be82427461529b4e4814f151d408cd8d1a4..65a339678ece817b3b27fa56afb5ee97aae8d027 100644 (file)
@@ -580,7 +580,7 @@ static ssize_t mce_read(struct file *filp, char __user *ubuf, size_t usize,
        char __user *buf = ubuf;
        int i, err;
 
-       cpu_tsc = kmalloc(NR_CPUS * sizeof(long), GFP_KERNEL);
+       cpu_tsc = kmalloc(nr_cpu_ids * sizeof(long), GFP_KERNEL);
        if (!cpu_tsc)
                return -ENOMEM;
 
index 7c9a813e11939b7e7fa583549d4c9affdde26476..88736cadbaa62d02e5e36671b06cfa512df7e683 100644 (file)
@@ -527,7 +527,7 @@ static __cpuinit int threshold_create_bank(unsigned int cpu, unsigned int bank)
        if (err)
                goto out_free;
 
-       for_each_cpu_mask(i, b->cpus) {
+       for_each_cpu_mask_nr(i, b->cpus) {
                if (i == cpu)
                        continue;
 
@@ -617,7 +617,7 @@ static void threshold_remove_bank(unsigned int cpu, int bank)
 #endif
 
        /* remove all sibling symlinks before unregistering */
-       for_each_cpu_mask(i, b->cpus) {
+       for_each_cpu_mask_nr(i, b->cpus) {
                if (i == cpu)
                        continue;
 
index 0d0d9057e7c0b63b36591385d89397ff7322bd99..a26c480b94915a2b460c0963bf38f9693c911641 100644 (file)
@@ -160,7 +160,7 @@ static void *c_start(struct seq_file *m, loff_t *pos)
 {
        if (*pos == 0)  /* just in case, cpu 0 is not the first */
                *pos = first_cpu(cpu_online_map);
-       if ((*pos) < NR_CPUS && cpu_online(*pos))
+       if ((*pos) < nr_cpu_ids && cpu_online(*pos))
                return &cpu_data(*pos);
        return NULL;
 }
index 1a9c68845ee8c8538e6b6e6f1c04d5d4a19fb9be..786548a62d381b1b65af8651c912d491d2178f2c 100644 (file)
@@ -168,7 +168,7 @@ static unsigned int physflat_cpu_mask_to_apicid(cpumask_t cpumask)
         * May as well be the first.
         */
        cpu = first_cpu(cpumask);
-       if ((unsigned)cpu < NR_CPUS)
+       if ((unsigned)cpu < nr_cpu_ids)
                return per_cpu(x86_cpu_to_apicid, cpu);
        else
                return BAD_APICID;
index 3c3929340692fd0d254593bbc712c365929a8902..2cfcbded888a0b91eece817e0eb3f49e865154fd 100644 (file)
@@ -98,7 +98,7 @@ static void uv_send_IPI_mask(cpumask_t mask, int vector)
 {
        unsigned int cpu;
 
-       for (cpu = 0; cpu < NR_CPUS; ++cpu)
+       for_each_possible_cpu(cpu)
                if (cpu_isset(cpu, mask))
                        uv_send_IPI_one(cpu, vector);
 }
@@ -132,7 +132,7 @@ static unsigned int uv_cpu_mask_to_apicid(cpumask_t cpumask)
         * May as well be the first.
         */
        cpu = first_cpu(cpumask);
-       if ((unsigned)cpu < NR_CPUS)
+       if ((unsigned)cpu < nr_cpu_ids)
                return per_cpu(x86_cpu_to_apicid, cpu);
        else
                return BAD_APICID;
index 64a46affd85813c95bcc0f0a8b1dc71a142af7d1..8269434d170765a6466eb7039e2b849d8b0b5b18 100644 (file)
@@ -732,7 +732,7 @@ static int __assign_irq_vector(int irq, cpumask_t mask)
                        return 0;
        }
 
-       for_each_cpu_mask(cpu, mask) {
+       for_each_cpu_mask_nr(cpu, mask) {
                cpumask_t domain, new_mask;
                int new_cpu;
                int vector, offset;
@@ -753,7 +753,7 @@ next:
                        continue;
                if (vector == IA32_SYSCALL_VECTOR)
                        goto next;
-               for_each_cpu_mask(new_cpu, new_mask)
+               for_each_cpu_mask_nr(new_cpu, new_mask)
                        if (per_cpu(vector_irq, new_cpu)[vector] != -1)
                                goto next;
                /* Found one! */
@@ -763,7 +763,7 @@ next:
                        cfg->move_in_progress = 1;
                        cfg->old_domain = cfg->domain;
                }
-               for_each_cpu_mask(new_cpu, new_mask)
+               for_each_cpu_mask_nr(new_cpu, new_mask)
                        per_cpu(vector_irq, new_cpu)[vector] = irq;
                cfg->vector = vector;
                cfg->domain = domain;
@@ -795,7 +795,7 @@ static void __clear_irq_vector(int irq)
 
        vector = cfg->vector;
        cpus_and(mask, cfg->domain, cpu_online_map);
-       for_each_cpu_mask(cpu, mask)
+       for_each_cpu_mask_nr(cpu, mask)
                per_cpu(vector_irq, cpu)[vector] = -1;
 
        cfg->vector = 0;
@@ -1373,12 +1373,10 @@ static unsigned int startup_ioapic_irq(unsigned int irq)
 static int ioapic_retrigger_irq(unsigned int irq)
 {
        struct irq_cfg *cfg = &irq_cfg[irq];
-       cpumask_t mask;
        unsigned long flags;
 
        spin_lock_irqsave(&vector_lock, flags);
-       mask = cpumask_of_cpu(first_cpu(cfg->domain));
-       send_IPI_mask(mask, cfg->vector);
+       send_IPI_mask(cpumask_of_cpu(first_cpu(cfg->domain)), cfg->vector);
        spin_unlock_irqrestore(&vector_lock, flags);
 
        return 1;
index a8449571858ae9dae444076d7c6b28daff795ee9..3fee2aa50f3f63d594304611090338d36f3fcc01 100644 (file)
@@ -62,12 +62,12 @@ static int alloc_ldt(mm_context_t *pc, int mincount, int reload)
 
        if (reload) {
 #ifdef CONFIG_SMP
-               cpumask_t mask;
+               cpumask_of_cpu_ptr_declare(mask);
 
                preempt_disable();
                load_LDT(pc);
-               mask = cpumask_of_cpu(smp_processor_id());
-               if (!cpus_equal(current->mm->cpu_vm_mask, mask))
+               cpumask_of_cpu_ptr_next(mask, smp_processor_id());
+               if (!cpus_equal(current->mm->cpu_vm_mask, *mask))
                        smp_call_function(flush_ldt, current->mm, 1);
                preempt_enable();
 #else
index fc4790638b69317bffce8a0992dc92b207f7edf8..6994c751590ec14ea31b7418bfd4659722466b2e 100644 (file)
@@ -388,6 +388,7 @@ static int do_microcode_update (void)
        void *new_mc = NULL;
        int cpu;
        cpumask_t old;
+       cpumask_of_cpu_ptr_declare(newmask);
 
        old = current->cpus_allowed;
 
@@ -404,7 +405,8 @@ static int do_microcode_update (void)
 
                        if (!uci->valid)
                                continue;
-                       set_cpus_allowed_ptr(current, &cpumask_of_cpu(cpu));
+                       cpumask_of_cpu_ptr_next(newmask, cpu);
+                       set_cpus_allowed_ptr(current, newmask);
                        error = get_maching_microcode(new_mc, cpu);
                        if (error < 0)
                                goto out;
@@ -574,6 +576,7 @@ static int apply_microcode_check_cpu(int cpu)
        struct cpuinfo_x86 *c = &cpu_data(cpu);
        struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
        cpumask_t old;
+       cpumask_of_cpu_ptr(newmask, cpu);
        unsigned int val[2];
        int err = 0;
 
@@ -582,7 +585,7 @@ static int apply_microcode_check_cpu(int cpu)
                return 0;
 
        old = current->cpus_allowed;
-       set_cpus_allowed_ptr(current, &cpumask_of_cpu(cpu));
+       set_cpus_allowed_ptr(current, newmask);
 
        /* Check if the microcode we have in memory matches the CPU */
        if (c->x86_vendor != X86_VENDOR_INTEL || c->x86 < 6 ||
@@ -620,11 +623,12 @@ static int apply_microcode_check_cpu(int cpu)
 static void microcode_init_cpu(int cpu, int resume)
 {
        cpumask_t old;
+       cpumask_of_cpu_ptr(newmask, cpu);
        struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
 
        old = current->cpus_allowed;
 
-       set_cpus_allowed_ptr(current, &cpumask_of_cpu(cpu));
+       set_cpus_allowed_ptr(current, newmask);
        mutex_lock(&microcode_mutex);
        collect_cpu_info(cpu);
        if (uci->valid && system_state == SYSTEM_RUNNING && !resume)
@@ -658,11 +662,12 @@ static ssize_t reload_store(struct sys_device *dev,
                return -EINVAL;
        if (val == 1) {
                cpumask_t old;
+               cpumask_of_cpu_ptr(newmask, cpu);
 
                old = current->cpus_allowed;
 
                get_online_cpus();
-               set_cpus_allowed_ptr(current, &cpumask_of_cpu(cpu));
+               set_cpus_allowed_ptr(current, newmask);
 
                mutex_lock(&microcode_mutex);
                if (uci->valid)
index 9dcf39c0297260f63f691b67ffbaed4ead8a4390..06a9f643817ee0310d1dce58da6a86f30b5c23cd 100644 (file)
@@ -411,24 +411,28 @@ void native_machine_shutdown(void)
 {
        /* Stop the cpus and apics */
 #ifdef CONFIG_SMP
-       int reboot_cpu_id;
 
        /* The boot cpu is always logical cpu 0 */
-       reboot_cpu_id = 0;
+       int reboot_cpu_id = 0;
+       cpumask_of_cpu_ptr(newmask, reboot_cpu_id);
 
 #ifdef CONFIG_X86_32
        /* See if there has been given a command line override */
        if ((reboot_cpu != -1) && (reboot_cpu < NR_CPUS) &&
-               cpu_online(reboot_cpu))
+               cpu_online(reboot_cpu)) {
                reboot_cpu_id = reboot_cpu;
+               cpumask_of_cpu_ptr_next(newmask, reboot_cpu_id);
+       }
 #endif
 
        /* Make certain the cpu I'm about to reboot on is online */
-       if (!cpu_online(reboot_cpu_id))
+       if (!cpu_online(reboot_cpu_id)) {
                reboot_cpu_id = smp_processor_id();
+               cpumask_of_cpu_ptr_next(newmask, reboot_cpu_id);
+       }
 
        /* Make certain I only run on the appropriate processor */
-       set_cpus_allowed_ptr(current, &cpumask_of_cpu(reboot_cpu_id));
+       set_cpus_allowed_ptr(current, newmask);
 
        /* O.K Now that I'm on the appropriate processor,
         * stop all of the others.
index 07faaa5109cb78003c4b2e5bbbad15da7136ca34..6fb5bcdd893366c66ccae845f2b1a20c076fa2f3 100644 (file)
@@ -661,8 +661,5 @@ do_notify_resume(struct pt_regs *regs, void *unused, __u32 thread_info_flags)
        if (thread_info_flags & _TIF_SIGPENDING)
                do_signal(regs);
 
-       if (thread_info_flags & _TIF_HRTICK_RESCHED)
-               hrtick_resched();
-
        clear_thread_flag(TIF_IRET);
 }
index bf87684474f18497e2326d497217ae45b4888df5..47c3d249e638efdf72395cb2f269f8bcf63a5576 100644 (file)
@@ -496,9 +496,6 @@ void do_notify_resume(struct pt_regs *regs, void *unused,
        /* deal with pending signal delivery */
        if (thread_info_flags & _TIF_SIGPENDING)
                do_signal(regs);
-
-       if (thread_info_flags & _TIF_HRTICK_RESCHED)
-               hrtick_resched();
 }
 
 void signal_fault(struct pt_regs *regs, void __user *frame, char *where)
index 4b53a647bc0affd6bbfc3a47d7a57419b8449f24..332512767f4f0600d15ed473391528b20c4a5a72 100644 (file)
@@ -438,7 +438,7 @@ void __cpuinit set_cpu_sibling_map(int cpu)
        cpu_set(cpu, cpu_sibling_setup_map);
 
        if (smp_num_siblings > 1) {
-               for_each_cpu_mask(i, cpu_sibling_setup_map) {
+               for_each_cpu_mask_nr(i, cpu_sibling_setup_map) {
                        if (c->phys_proc_id == cpu_data(i).phys_proc_id &&
                            c->cpu_core_id == cpu_data(i).cpu_core_id) {
                                cpu_set(i, per_cpu(cpu_sibling_map, cpu));
@@ -461,7 +461,7 @@ void __cpuinit set_cpu_sibling_map(int cpu)
                return;
        }
 
-       for_each_cpu_mask(i, cpu_sibling_setup_map) {
+       for_each_cpu_mask_nr(i, cpu_sibling_setup_map) {
                if (per_cpu(cpu_llc_id, cpu) != BAD_APICID &&
                    per_cpu(cpu_llc_id, cpu) == per_cpu(cpu_llc_id, i)) {
                        cpu_set(i, c->llc_shared_map);
@@ -1219,7 +1219,7 @@ static void remove_siblinginfo(int cpu)
        int sibling;
        struct cpuinfo_x86 *c = &cpu_data(cpu);
 
-       for_each_cpu_mask(sibling, per_cpu(cpu_core_map, cpu)) {
+       for_each_cpu_mask_nr(sibling, per_cpu(cpu_core_map, cpu)) {
                cpu_clear(cpu, per_cpu(cpu_core_map, sibling));
                /*/
                 * last thread sibling in this cpu core going down
@@ -1228,7 +1228,7 @@ static void remove_siblinginfo(int cpu)
                        cpu_data(sibling).booted_cores--;
        }
 
-       for_each_cpu_mask(sibling, per_cpu(cpu_sibling_map, cpu))
+