Merge master.kernel.org:/pub/scm/linux/kernel/git/davej/agpgart
authorLinus Torvalds <torvalds@g5.osdl.org>
Sat, 25 Mar 2006 17:17:32 +0000 (09:17 -0800)
committerLinus Torvalds <torvalds@g5.osdl.org>
Sat, 25 Mar 2006 17:17:32 +0000 (09:17 -0800)
* master.kernel.org:/pub/scm/linux/kernel/git/davej/agpgart:
  [AGPGART] x86_64: Enable VIA AGP driver on x86-64 for VIA P4 chipsets
  [AGPGART] x86_64: Fix wrong PCI ID for ALI M1695 AGP bridge
  [AGPGART] ATI RS350 support.
  [AGPGART] Lots of CodingStyle/whitespace cleanups.

19 files changed:
drivers/char/agp/Kconfig
drivers/char/agp/agp.h
drivers/char/agp/ali-agp.c
drivers/char/agp/alpha-agp.c
drivers/char/agp/amd64-agp.c
drivers/char/agp/ati-agp.c
drivers/char/agp/backend.c
drivers/char/agp/efficeon-agp.c
drivers/char/agp/frontend.c
drivers/char/agp/generic.c
drivers/char/agp/hp-agp.c
drivers/char/agp/i460-agp.c
drivers/char/agp/intel-agp.c
drivers/char/agp/isoch.c
drivers/char/agp/nvidia-agp.c
drivers/char/agp/sgi-agp.c
drivers/char/agp/sis-agp.c
drivers/char/agp/sworks-agp.c
drivers/char/agp/uninorth-agp.c

index a4d425d2dce2ded7ed6123ed50fbcd116b11efb6..0b9cf9c59a213af2aa42f3f9eec0332ee823520f 100644 (file)
@@ -98,12 +98,12 @@ config AGP_SWORKS
        tristate "Serverworks LE/HE chipset support"
        depends on AGP && X86_32
        help
-         Say Y here to support the Serverworks AGP card.  See 
+         Say Y here to support the Serverworks AGP card.  See
          <http://www.serverworks.com/> for product descriptions and images.
 
 config AGP_VIA
        tristate "VIA chipset support"
-       depends on AGP && X86_32
+       depends on AGP
        help
          This option gives you AGP support for the GLX component of
          X on VIA MVP3/Apollo Pro chipsets.
index b4af87c6f9c80fbf30e6adf574c8a34af11f4588..3c623b67ea1cd87de906a65c6ccb6655cc9f46ab 100644 (file)
@@ -19,9 +19,9 @@
  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * JEFF HARTMANN, OR ANY OTHER CONTRIBUTORS BE LIABLE FOR ANY CLAIM, 
- * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 
- * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE 
+ * JEFF HARTMANN, OR ANY OTHER CONTRIBUTORS BE LIABLE FOR ANY CLAIM,
+ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
+ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE
  * OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
  */
@@ -53,7 +53,7 @@ enum aper_size_type {
 struct gatt_mask {
        unsigned long mask;
        u32 type;
-       /* totally device specific, for integrated chipsets that 
+       /* totally device specific, for integrated chipsets that
         * might have different types of memory masks.  For other
         * devices this will probably be ignored */
 };
@@ -104,8 +104,7 @@ struct agp_bridge_driver {
        void (*agp_enable)(struct agp_bridge_data *, u32);
        void (*cleanup)(void);
        void (*tlb_flush)(struct agp_memory *);
-       unsigned long (*mask_memory)(struct agp_bridge_data *,
-               unsigned long, int);
+       unsigned long (*mask_memory)(struct agp_bridge_data *, unsigned long, int);
        void (*cache_flush)(void);
        int (*create_gatt_table)(struct agp_bridge_data *);
        int (*free_gatt_table)(struct agp_bridge_data *);
index b02fc2267159675c32e8e6a58c27ab8173a9161f..5a31ec7c62fc40bd8fc213fd5fb69961971d82db 100644 (file)
@@ -147,7 +147,7 @@ static void *m1541_alloc_page(struct agp_bridge_data *bridge)
 
        if (!addr)
                return NULL;
-       
+
        pci_read_config_dword(agp_bridge->dev, ALI_CACHE_FLUSH_CTRL, &temp);
        pci_write_config_dword(agp_bridge->dev, ALI_CACHE_FLUSH_CTRL,
                        (((temp & ALI_CACHE_FLUSH_ADDR_MASK) |
index a072d32005a466431c5bfed2c421e3ee27837cf1..2b5838e64751a3bc3cb0ba005deba67b88cbfdc9 100644 (file)
@@ -23,8 +23,9 @@ static struct page *alpha_core_agp_vm_nopage(struct vm_area_struct *vma,
        dma_addr = address - vma->vm_start + agp->aperture.bus_base;
        pa = agp->ops->translate(agp, dma_addr);
 
-       if (pa == (unsigned long)-EINVAL) return NULL;  /* no translation */
-       
+       if (pa == (unsigned long)-EINVAL)
+               return NULL;    /* no translation */
+
        /*
         * Get the page, inc the use count, and return it
         */
@@ -89,7 +90,7 @@ static void alpha_core_agp_enable(struct agp_bridge_data *bridge, u32 mode)
        agp_device_command(agp->mode.lw, 0);
 }
 
-static int alpha_core_agp_insert_memory(struct agp_memory *mem, off_t pg_start, 
+static int alpha_core_agp_insert_memory(struct agp_memory *mem, off_t pg_start,
                                        int type)
 {
        alpha_agp_info *agp = agp_bridge->dev_private_data;
@@ -98,7 +99,8 @@ static int alpha_core_agp_insert_memory(struct agp_memory *mem, off_t pg_start,
 
        temp = agp_bridge->current_size;
        num_entries = A_SIZE_FIX(temp)->num_entries;
-       if ((pg_start + mem->page_count) > num_entries) return -EINVAL;
+       if ((pg_start + mem->page_count) > num_entries)
+               return -EINVAL;
 
        status = agp->ops->bind(agp, pg_start, mem);
        mb();
@@ -107,7 +109,7 @@ static int alpha_core_agp_insert_memory(struct agp_memory *mem, off_t pg_start,
        return status;
 }
 
-static int alpha_core_agp_remove_memory(struct agp_memory *mem, off_t pg_start, 
+static int alpha_core_agp_remove_memory(struct agp_memory *mem, off_t pg_start,
                                        int type)
 {
        alpha_agp_info *agp = agp_bridge->dev_private_data;
@@ -125,7 +127,7 @@ struct agp_bridge_driver alpha_core_agp_driver = {
        .size_type              = FIXED_APER_SIZE,
        .cant_use_aperture      = 1,
        .masks                  = NULL,
-       
+
        .fetch_size             = alpha_core_agp_fetch_size,
        .configure              = alpha_core_agp_configure,
        .agp_enable             = alpha_core_agp_enable,
index 7c6c7268e236afb231b084a9c6c06aa1e35d7941..36517d4d1ad9da6fdd80dd2f1180a7269abd7437 100644 (file)
@@ -216,7 +216,7 @@ static struct aper_size_info_32 amd_8151_sizes[7] =
        {256,  65536,  6, 0x00000700 }, /* 1 1 1 0 0 0 */
        {128,  32768,  5, 0x00000720 }, /* 1 1 1 1 0 0 */
        {64,   16384,  4, 0x00000730 }, /* 1 1 1 1 1 0 */
-       {32,   8192,   3, 0x00000738 }  /* 1 1 1 1 1 1 */
+       {32,   8192,   3, 0x00000738 }  /* 1 1 1 1 1 1 */
 };
 
 static int amd_8151_configure(void)
index 5b74c36c116c7e112c0265ddf147e249586d8981..06fd10ba0c5ebc7f738d9a8a70ddd45c7f63ec59 100644 (file)
@@ -74,7 +74,7 @@ static int ati_create_page_map(ati_page_map *page_map)
        /*CACHE_FLUSH();*/
        global_cache_flush();
 
-       for(i = 0; i < PAGE_SIZE / sizeof(unsigned long); i++) {
+       for (i = 0; i < PAGE_SIZE / sizeof(unsigned long); i++) {
                writel(agp_bridge->scratch_page, page_map->remapped+i);
                readl(page_map->remapped+i);    /* PCI Posting. */
        }
@@ -99,7 +99,7 @@ static void ati_free_gatt_pages(void)
        ati_page_map *entry;
 
        tables = ati_generic_private.gatt_pages;
-       for(i = 0; i < ati_generic_private.num_tables; i++) {
+       for (i = 0; i < ati_generic_private.num_tables; i++) {
                entry = tables[i];
                if (entry != NULL) {
                        if (entry->real != NULL)
@@ -387,7 +387,7 @@ static int ati_create_gatt_table(struct agp_bridge_data *bridge)
        agp_bridge->gart_bus_addr = addr;
 
        /* Calculate the agp offset */
-       for(i = 0; i < value->num_entries / 1024; i++, addr += 0x00400000) {
+       for (i = 0; i < value->num_entries / 1024; i++, addr += 0x00400000) {
                writel(virt_to_gart(ati_generic_private.gatt_pages[i]->real) | 1,
                        page_dir.remapped+GET_PAGE_DIR_OFF(addr));
                readl(page_dir.remapped+GET_PAGE_DIR_OFF(addr));        /* PCI Posting. */
@@ -466,6 +466,10 @@ static struct agp_device_ids ati_agp_device_ids[] __devinitdata =
                .device_id      = PCI_DEVICE_ID_ATI_RS300_200,
                .chipset_name   = "IGP9100/M",
        },
+       {
+               .device_id      = PCI_DEVICE_ID_ATI_RS350_200,
+               .chipset_name   = "IGP9100/M",
+       },
        { }, /* dummy final entry, always present */
 };
 
index 80ee17a8fc2322ed7e673a611a26201dc8329778..509adc403250a8126f72dac666493a680d06f8ad 100644 (file)
@@ -228,7 +228,7 @@ static void agp_backend_cleanup(struct agp_bridge_data *bridge)
 struct agp_bridge_data *agp_alloc_bridge(void)
 {
        struct agp_bridge_data *bridge;
-       
+
        bridge = kzalloc(sizeof(*bridge), GFP_KERNEL);
        if (!bridge)
                return NULL;
index e7aea77a60f93c1d05dada059a9c2a358718ed17..fed0a87448d881301ca82d0dfb3cc7282a9e0665 100644 (file)
@@ -1,6 +1,6 @@
 /*
  * Transmeta's Efficeon AGPGART driver.
- * 
+ *
  * Based upon a diff by Linus around November '02.
  *
  * Ported to the 2.6 kernel by Carlos Puchol <cpglinux@puchol.com>
@@ -9,7 +9,7 @@
 
 /*
  * NOTE-cpg-040217:
- * 
+ *
  *   - when compiled as a module, after loading the module,
  *     it will refuse to unload, indicating it is in use,
  *     when it is not.
@@ -45,7 +45,7 @@
  *      8: Present
  *    7:6: reserved, write as zero
  *    5:0: GATT directory index: which 1st-level entry
- * 
+ *
  * The Efficeon AGP spec requires pages to be WB-cacheable
  * but to be explicitly CLFLUSH'd after any changes.
  */
@@ -125,7 +125,7 @@ static int efficeon_configure(void)
        struct aper_size_info_lvl2 *current_size;
 
        printk(KERN_DEBUG PFX "efficeon_configure()\n");
-       
+
        current_size = A_SIZE_LVL2(agp_bridge->current_size);
 
        /* aperture size */
@@ -190,7 +190,7 @@ static int efficeon_create_gatt_table(struct agp_bridge_data *bridge)
        const int present = EFFICEON_PRESENT;
        const int clflush_chunk = ((cpuid_ebx(1) >> 8) & 0xff) << 3;
        int num_entries, l1_pages;
-       
+
        num_entries = A_SIZE_LVL2(agp_bridge->current_size)->num_entries;
 
        printk(KERN_DEBUG PFX "efficeon_create_gatt_table(%d)\n", num_entries);
@@ -257,12 +257,12 @@ static int efficeon_insert_memory(struct agp_memory * mem, off_t pg_start, int t
 
                if (!page)
                        continue;
-               
+
                page += (index & 0x3ff);
                *page = insert;
 
                /* clflush is slow, so don't clflush until we have to */
-               if ( last_page && 
+               if ( last_page &&
                     ((unsigned long)page^(unsigned long)last_page) & clflush_mask )
                    asm volatile("clflush %0" : : "m" (*last_page));
 
@@ -373,7 +373,7 @@ static int __devinit agp_efficeon_probe(struct pci_dev *pdev,
        */
        r = &pdev->resource[0];
        if (!r->start && r->end) {
-               if(pci_assign_resource(pdev, 0)) {
+               if (pci_assign_resource(pdev, 0)) {
                        printk(KERN_ERR PFX "could not assign resource 0\n");
                        return -ENODEV;
                }
index 97eeb2345b18ad897c429196530ce7d49dec3980..ffcf15c30e90b023fb5ee960ddefd412856f6bae 100644 (file)
@@ -781,7 +781,7 @@ static int agpioc_acquire_wrap(struct agp_file_private *priv)
        if (agp_fe.current_controller != NULL)
                return -EBUSY;
 
-       if(!agp_bridge)
+       if (!agp_bridge)
                return -ENODEV;
 
         if (atomic_read(&agp_bridge->agp_in_use))
index 5567ce8d72b06edfc726bbdf9c3416938430a5ab..4e1891e2c035c97336534bdd9a8ec6b1214d6a37 100644 (file)
@@ -299,7 +299,7 @@ EXPORT_SYMBOL_GPL(agp_num_entries);
 /**
  *     agp_copy_info  -  copy bridge state information
  *
- *     @info:          agp_kern_info pointer.  The caller should insure that this pointer is valid. 
+ *     @info:          agp_kern_info pointer.  The caller should insure that this pointer is valid.
  *
  *     This function copies information about the agp bridge device and the state of
  *     the agp backend into an agp_kern_info pointer.
index de5d6d212674808ad1a437ec510a86f894b00e2a..8c4c6ef748ecea4358ea4ed5efac137003c1f714 100644 (file)
@@ -85,8 +85,8 @@ static int __init hp_zx1_ioc_shared(void)
        /*
         * IOC already configured by sba_iommu module; just use
         * its setup.  We assume:
-        *      - IOVA space is 1Gb in size
-        *      - first 512Mb is IOMMU, second 512Mb is GART
+        *      - IOVA space is 1Gb in size
+        *      - first 512Mb is IOMMU, second 512Mb is GART
         */
        hp->io_tlb_ps = readq(hp->ioc_regs+HP_ZX1_TCNFG);
        switch (hp->io_tlb_ps) {
@@ -115,7 +115,7 @@ static int __init hp_zx1_ioc_shared(void)
 
        if (hp->gatt[0] != HP_ZX1_SBA_IOMMU_COOKIE) {
                /* Normal case when no AGP device in system */
-               hp->gatt = NULL;
+               hp->gatt = NULL;
                hp->gatt_entries = 0;
                printk(KERN_ERR PFX "No reserved IO PDIR entry found; "
                       "GART disabled\n");
index 8ee19a4a6bce4741b75ecb9e1adb21bfe4d1c017..91769443d8fe2d30cf010ef55318a51b43d82e81 100644 (file)
@@ -400,10 +400,10 @@ static int i460_insert_memory_large_io_page (struct agp_memory *mem,
        num_entries = A_SIZE_8(temp)->num_entries;
 
        /* Figure out what pg_start means in terms of our large GART pages */
-       start           = &i460.lp_desc[pg_start / I460_KPAGES_PER_IOPAGE];
-       end             = &i460.lp_desc[(pg_start + mem->page_count - 1) / I460_KPAGES_PER_IOPAGE];
-       start_offset    = pg_start % I460_KPAGES_PER_IOPAGE;
-       end_offset      = (pg_start + mem->page_count - 1) % I460_KPAGES_PER_IOPAGE;
+       start = &i460.lp_desc[pg_start / I460_KPAGES_PER_IOPAGE];
+       end = &i460.lp_desc[(pg_start + mem->page_count - 1) / I460_KPAGES_PER_IOPAGE];
+       start_offset = pg_start % I460_KPAGES_PER_IOPAGE;
+       end_offset = (pg_start + mem->page_count - 1) % I460_KPAGES_PER_IOPAGE;
 
        if (end > i460.lp_desc + num_entries) {
                printk(KERN_ERR PFX "Looks like we're out of AGP memory\n");
@@ -458,10 +458,10 @@ static int i460_remove_memory_large_io_page (struct agp_memory *mem,
        num_entries = A_SIZE_8(temp)->num_entries;
 
        /* Figure out what pg_start means in terms of our large GART pages */
-       start           = &i460.lp_desc[pg_start / I460_KPAGES_PER_IOPAGE];
-       end             = &i460.lp_desc[(pg_start + mem->page_count - 1) / I460_KPAGES_PER_IOPAGE];
-       start_offset    = pg_start % I460_KPAGES_PER_IOPAGE;
-       end_offset      = (pg_start + mem->page_count - 1) % I460_KPAGES_PER_IOPAGE;
+       start = &i460.lp_desc[pg_start / I460_KPAGES_PER_IOPAGE];
+       end = &i460.lp_desc[(pg_start + mem->page_count - 1) / I460_KPAGES_PER_IOPAGE];
+       start_offset = pg_start % I460_KPAGES_PER_IOPAGE;
+       end_offset = (pg_start + mem->page_count - 1) % I460_KPAGES_PER_IOPAGE;
 
        for (i = 0, lp = start; lp <= end; ++lp) {
                for (idx = ((lp == start) ? start_offset : 0);
index 631531fd97a58dab4b619aa0c0ecb9728ddb3f41..bddcae54b16d08d4cfff5ab427c347c9b4f07476 100644 (file)
@@ -201,9 +201,9 @@ static int intel_i810_insert_entries(struct agp_memory *mem, off_t pg_start,
        temp = agp_bridge->current_size;
        num_entries = A_SIZE_FIX(temp)->num_entries;
 
-       if ((pg_start + mem->page_count) > num_entries) {
+       if ((pg_start + mem->page_count) > num_entries)
                return -EINVAL;
-       }
+
        for (j = pg_start; j < (pg_start + mem->page_count); j++) {
                if (!PGE_EMPTY(agp_bridge, readl(agp_bridge->gatt_table+j)))
                        return -EBUSY;
@@ -221,7 +221,7 @@ static int intel_i810_insert_entries(struct agp_memory *mem, off_t pg_start,
                        agp_bridge->driver->tlb_flush(mem);
                        return 0;
                }
-               if((type == AGP_PHYS_MEMORY) && (mem->type == AGP_PHYS_MEMORY))
+               if ((type == AGP_PHYS_MEMORY) && (mem->type == AGP_PHYS_MEMORY))
                        goto insert;
                return -EINVAL;
        }
@@ -328,7 +328,7 @@ static struct agp_memory *intel_i810_alloc_by_type(size_t pg_count, int type)
 static void intel_i810_free_by_type(struct agp_memory *curr)
 {
        agp_free_key(curr->key);
-       if(curr->type == AGP_PHYS_MEMORY) {
+       if (curr->type == AGP_PHYS_MEMORY) {
                if (curr->page_count == 4)
                        i8xx_destroy_pages(gart_to_virt(curr->memory[0]));
                else {
@@ -1603,11 +1603,10 @@ static int __devinit agp_intel_probe(struct pci_dev *pdev,
                name = "i820";
                break;
        case PCI_DEVICE_ID_INTEL_82830_HB:
-               if (find_i830(PCI_DEVICE_ID_INTEL_82830_CGC)) {
+               if (find_i830(PCI_DEVICE_ID_INTEL_82830_CGC))
                        bridge->driver = &intel_830_driver;
-               } else {
+               else
                        bridge->driver = &intel_830mp_driver;
-               }
                name = "830M";
                break;
        case PCI_DEVICE_ID_INTEL_82840_HB:
@@ -1619,11 +1618,10 @@ static int __devinit agp_intel_probe(struct pci_dev *pdev,
                name = "i845";
                break;
        case PCI_DEVICE_ID_INTEL_82845G_HB:
-               if (find_i830(PCI_DEVICE_ID_INTEL_82845G_IG)) {
+               if (find_i830(PCI_DEVICE_ID_INTEL_82845G_IG))
                        bridge->driver = &intel_830_driver;
-               } else {
+               else
                        bridge->driver = &intel_845_driver;
-               }
                name = "845G";
                break;
        case PCI_DEVICE_ID_INTEL_82850_HB:
@@ -1648,11 +1646,10 @@ static int __devinit agp_intel_probe(struct pci_dev *pdev,
                name = "i860";
                break;
        case PCI_DEVICE_ID_INTEL_82865_HB:
-               if (find_i830(PCI_DEVICE_ID_INTEL_82865_IG)) {
+               if (find_i830(PCI_DEVICE_ID_INTEL_82865_IG))
                        bridge->driver = &intel_830_driver;
-               } else {
+               else
                        bridge->driver = &intel_845_driver;
-               }
                name = "865";
                break;
        case PCI_DEVICE_ID_INTEL_82875_HB:
@@ -1660,35 +1657,31 @@ static int __devinit agp_intel_probe(struct pci_dev *pdev,
                name = "i875";
                break;
        case PCI_DEVICE_ID_INTEL_82915G_HB:
-               if (find_i830(PCI_DEVICE_ID_INTEL_82915G_IG)) {
+               if (find_i830(PCI_DEVICE_ID_INTEL_82915G_IG))
                        bridge->driver = &intel_915_driver;
-               } else {
+               else
                        bridge->driver = &intel_845_driver;
-               }
                name = "915G";
                break;
        case PCI_DEVICE_ID_INTEL_82915GM_HB:
-               if (find_i830(PCI_DEVICE_ID_INTEL_82915GM_IG)) {
+               if (find_i830(PCI_DEVICE_ID_INTEL_82915GM_IG))
                        bridge->driver = &intel_915_driver;
-               } else {
+               else
                        bridge->driver = &intel_845_driver;
-               }
                name = "915GM";
                break;
        case PCI_DEVICE_ID_INTEL_82945G_HB:
-               if (find_i830(PCI_DEVICE_ID_INTEL_82945G_IG)) {
+               if (find_i830(PCI_DEVICE_ID_INTEL_82945G_IG))
                        bridge->driver = &intel_915_driver;
-               } else {
+               else
                        bridge->driver = &intel_845_driver;
-               }
                name = "945G";
                break;
        case PCI_DEVICE_ID_INTEL_82945GM_HB:
-               if (find_i830(PCI_DEVICE_ID_INTEL_82945GM_IG)) {
+               if (find_i830(PCI_DEVICE_ID_INTEL_82945GM_IG))
                        bridge->driver = &intel_915_driver;
-               } else {
+               else
                        bridge->driver = &intel_845_driver;
-               }
                name = "945GM";
                break;
        case PCI_DEVICE_ID_INTEL_7505_0:
@@ -1724,7 +1717,7 @@ static int __devinit agp_intel_probe(struct pci_dev *pdev,
        */
        r = &pdev->resource[0];
        if (!r->start && r->end) {
-               if(pci_assign_resource(pdev, 0)) {
+               if (pci_assign_resource(pdev, 0)) {
                        printk(KERN_ERR PFX "could not assign resource 0\n");
                        agp_put_bridge(bridge);
                        return -ENODEV;
index 7c14a096b85eea4a3fc793ef329324989a27a77f..3f9ccde62377d1c47d9d2858caadaac3c1c06f9d 100644 (file)
@@ -26,7 +26,7 @@ static void agp_3_5_dev_list_insert(struct list_head *head, struct list_head *ne
 
        list_for_each(pos, head) {
                cur = list_entry(pos, struct agp_3_5_dev, list);
-               if(cur->maxbw > n->maxbw)
+               if (cur->maxbw > n->maxbw)
                        break;
        }
        list_add_tail(new, pos);
@@ -54,9 +54,9 @@ static void agp_3_5_dev_list_sort(struct agp_3_5_dev *list, unsigned int ndevs)
        }
 }
 
-/* 
- * Initialize all isochronous transfer parameters for an AGP 3.0 
- * node (i.e. a host bridge in combination with the adapters 
+/*
+ * Initialize all isochronous transfer parameters for an AGP 3.0
+ * node (i.e. a host bridge in combination with the adapters
  * lying behind it...)
  */
 
@@ -200,7 +200,7 @@ static int agp_3_5_isochronous_node_enable(struct agp_bridge_data *bridge,
         * this to the hungriest device (as per the spec) */
        rem  = target.n - tot_n;
 
-       /* 
+       /*
         * Calculate the minimum isochronous RQ depth needed by each master.
         * Along the way, distribute the extra ISOCH_N capability calculated
         * above.
@@ -214,7 +214,7 @@ static int agp_3_5_isochronous_node_enable(struct agp_bridge_data *bridge,
                 * many writes on the AGP bus).
                 */
                master[cdev].rq = master[cdev].n;
-               if(master[cdev].y > 0x1)
+               if (master[cdev].y > 0x1)
                        master[cdev].rq *= (1 << (master[cdev].y - 1));
 
                tot_rq += master[cdev].rq;
@@ -334,9 +334,9 @@ int agp_3_5_enable(struct agp_bridge_data *bridge)
 
        arqsz     = (tstatus >> 13) & 0x7;
 
-       /* 
+       /*
         * Allocate a head for our AGP 3.5 device list
-        * (multiple AGP v3 devices are allowed behind a single bridge). 
+        * (multiple AGP v3 devices are allowed behind a single bridge).
         */
        if ((dev_list = kmalloc(sizeof(*dev_list), GFP_KERNEL)) == NULL) {
                ret = -ENOMEM;
@@ -366,7 +366,7 @@ int agp_3_5_enable(struct agp_bridge_data *bridge)
 
                        case 0x0300:    /* Display controller */
                        case 0x0400:    /* Multimedia controller */
-                               if((cur = kmalloc(sizeof(*cur), GFP_KERNEL)) == NULL) {
+                               if ((cur = kmalloc(sizeof(*cur), GFP_KERNEL)) == NULL) {
                                        ret = -ENOMEM;
                                        goto free_and_exit;
                                }
@@ -391,7 +391,7 @@ int agp_3_5_enable(struct agp_bridge_data *bridge)
        list_for_each(pos, head) {
                cur = list_entry(pos, struct agp_3_5_dev, list);
                dev = cur->dev;
-               
+
                pci_read_config_word(dev, PCI_STATUS, &mpstat);
                if ((mpstat & PCI_STATUS_CAP_LIST) == 0)
                        continue;
index 80dafa3030bd5433a9e128dc62820ea6cc95f180..70b8ed9cd1722c5cc2526b6976dcefcbf563a87d 100644 (file)
@@ -72,7 +72,7 @@ static int nvidia_init_iorr(u32 base, u32 size)
        /* Find the iorr that is already used for the base */
        /* If not found, determine the uppermost available iorr */
        free_iorr_addr = AMD_K7_NUM_IORR;
-       for(iorr_addr = 0; iorr_addr < AMD_K7_NUM_IORR; iorr_addr++) {
+       for (iorr_addr = 0; iorr_addr < AMD_K7_NUM_IORR; iorr_addr++) {
                rdmsr(IORR_BASE0 + 2 * iorr_addr, base_lo, base_hi);
                rdmsr(IORR_MASK0 + 2 * iorr_addr, mask_lo, mask_hi);
 
@@ -82,7 +82,7 @@ static int nvidia_init_iorr(u32 base, u32 size)
                if ((mask_lo & 0x00000800) == 0)
                        free_iorr_addr = iorr_addr;
        }
-       
+
        if (iorr_addr >= AMD_K7_NUM_IORR) {
                iorr_addr = free_iorr_addr;
                if (iorr_addr >= AMD_K7_NUM_IORR)
@@ -139,7 +139,7 @@ static int nvidia_configure(void)
        }
 
        /* attbase */
-       for(i = 0; i < 8; i++) {
+       for (i = 0; i < 8; i++) {
                pci_write_config_dword(nvidia_private.dev_2, NVIDIA_2_ATTBASE(i),
                        (agp_bridge->gatt_bus_addr + (i % num_dirs) * 64 * 1024) | 1);
        }
@@ -197,15 +197,15 @@ extern int agp_memory_reserved;
 static int nvidia_insert_memory(struct agp_memory *mem, off_t pg_start, int type)
 {
        int i, j;
-       
+
        if ((type != 0) || (mem->type != 0))
                return -EINVAL;
-       
+
        if ((pg_start + mem->page_count) >
                (nvidia_private.num_active_entries - agp_memory_reserved/PAGE_SIZE))
                return -EINVAL;
-       
-       for(j = pg_start; j < (pg_start + mem->page_count); j++) {
+
+       for (j = pg_start; j < (pg_start + mem->page_count); j++) {
                if (!PGE_EMPTY(agp_bridge, readl(agp_bridge->gatt_table+nvidia_private.pg_offset+j)))
                        return -EBUSY;
        }
@@ -264,9 +264,9 @@ static void nvidia_tlbflush(struct agp_memory *mem)
        }
 
        /* flush TLB entries */
-       for(i = 0; i < 32 + 1; i++)
+       for (i = 0; i < 32 + 1; i++)
                temp = readl(nvidia_private.aperture+(i * PAGE_SIZE / sizeof(u32)));
-       for(i = 0; i < 32 + 1; i++)
+       for (i = 0; i < 32 + 1; i++)
                temp = readl(nvidia_private.aperture+(i * PAGE_SIZE / sizeof(u32)));
 }
 
@@ -323,7 +323,7 @@ static int __devinit agp_nvidia_probe(struct pci_dev *pdev,
                pci_find_slot((unsigned int)pdev->bus->number, PCI_DEVFN(0, 2));
        nvidia_private.dev_3 =
                pci_find_slot((unsigned int)pdev->bus->number, PCI_DEVFN(30, 0));
-       
+
        if (!nvidia_private.dev_1 || !nvidia_private.dev_2 || !nvidia_private.dev_3) {
                printk(KERN_INFO PFX "Detected an NVIDIA nForce/nForce2 "
                        "chipset, but could not find the secondary devices.\n");
index 4df7734b51c2b37824715038e5e0f9eb1c38fa00..cfa7922cb431f500788b6d0ba6360312137eee03 100644 (file)
@@ -329,7 +329,7 @@ static int __devinit agp_sgi_init(void)
 
 static void __devexit agp_sgi_cleanup(void)
 {
-       if(sgi_tioca_agp_bridges)
+       if (sgi_tioca_agp_bridges)
                kfree(sgi_tioca_agp_bridges);
        sgi_tioca_agp_bridges=NULL;
 }
index ebc05554045c73b16f099d81aad774ad3b478fb6..a00fd48a6f05cc55fdd66451d425e1f7ae1aaddc 100644 (file)
@@ -121,7 +121,7 @@ static struct aper_size_info_8 sis_generic_sizes[7] =
 
 static struct agp_bridge_driver sis_driver = {
        .owner                  = THIS_MODULE,
-       .aperture_sizes         = sis_generic_sizes,
+       .aperture_sizes         = sis_generic_sizes,
        .size_type              = U8_APER_SIZE,
        .num_aperture_sizes     = 7,
        .configure              = sis_configure,
@@ -243,11 +243,11 @@ static void __devinit sis_get_driver(struct agp_bridge_data *bridge)
 {
        int i;
 
-       for(i=0; sis_broken_chipsets[i]!=0; ++i)
-               if(bridge->dev->device==sis_broken_chipsets[i])
+       for (i=0; sis_broken_chipsets[i]!=0; ++i)
+               if (bridge->dev->device==sis_broken_chipsets[i])
                        break;
 
-       if(sis_broken_chipsets[i] || agp_sis_force_delay)
+       if (sis_broken_chipsets[i] || agp_sis_force_delay)
                sis_driver.agp_enable=sis_delayed_enable;
 
        // sis chipsets that indicate less than agp3.5
index efef9999f1cfaf95f3e96913e6721b19e211e465..4f2d7d99902f1cfc21ad988846d1176609b3ccf2 100644 (file)
@@ -64,7 +64,7 @@ static int serverworks_create_page_map(struct serverworks_page_map *page_map)
        }
        global_cache_flush();
 
-       for(i = 0; i < PAGE_SIZE / sizeof(unsigned long); i++)
+       for (i = 0; i < PAGE_SIZE / sizeof(unsigned long); i++)
                writel(agp_bridge->scratch_page, page_map->remapped+i);
 
        return 0;
@@ -84,7 +84,7 @@ static void serverworks_free_gatt_pages(void)
        struct serverworks_page_map *entry;
 
        tables = serverworks_private.gatt_pages;
-       for(i = 0; i < serverworks_private.num_tables; i++) {
+       for (i = 0; i < serverworks_private.num_tables; i++) {
                entry = tables[i];
                if (entry != NULL) {
                        if (entry->real != NULL) {
@@ -103,7 +103,7 @@ static int serverworks_create_gatt_pages(int nr_tables)
        int retval = 0;
        int i;
 
-       tables = kzalloc((nr_tables + 1) * sizeof(struct serverworks_page_map *), 
+       tables = kzalloc((nr_tables + 1) * sizeof(struct serverworks_page_map *),
                         GFP_KERNEL);
        if (tables == NULL)
                return -ENOMEM;
@@ -161,7 +161,7 @@ static int serverworks_create_gatt_table(struct agp_bridge_data *bridge)
                return retval;
        }
        /* Create a fake scratch directory */
-       for(i = 0; i < 1024; i++) {
+       for (i = 0; i < 1024; i++) {
                writel(agp_bridge->scratch_page, serverworks_private.scratch_dir.remapped+i);
                writel(virt_to_gart(serverworks_private.scratch_dir.real) | 1, page_dir.remapped+i);
        }
@@ -185,9 +185,8 @@ static int serverworks_create_gatt_table(struct agp_bridge_data *bridge)
        pci_read_config_dword(agp_bridge->dev,serverworks_private.gart_addr_ofs,&temp);
        agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
 
-       /* Calculate the agp offset */  
-
-       for(i = 0; i < value->num_entries / 1024; i++)
+       /* Calculate the agp offset */
+       for (i = 0; i < value->num_entries / 1024; i++)
                writel(virt_to_gart(serverworks_private.gatt_pages[i]->real)|1, page_dir.remapped+i);
 
        return 0;
@@ -196,7 +195,7 @@ static int serverworks_create_gatt_table(struct agp_bridge_data *bridge)
 static int serverworks_free_gatt_table(struct agp_bridge_data *bridge)
 {
        struct serverworks_page_map page_dir;
-   
+
        page_dir.real = (unsigned long *)agp_bridge->gatt_table_real;
        page_dir.remapped = (unsigned long __iomem *)agp_bridge->gatt_table;
 
index 50947e38501a1903bf98b6376f4f3efc05ba2895..9846defbddb4def2f2ba71a750d48036e5b6ceef 100644 (file)
@@ -95,12 +95,12 @@ static void uninorth_cleanup(void)
 static int uninorth_configure(void)
 {
        struct aper_size_info_32 *current_size;
-       
+
        current_size = A_SIZE_32(agp_bridge->current_size);
 
        printk(KERN_INFO PFX "configuring for size idx: %d\n",
               current_size->size_value);
-       
+
        /* aperture size and gatt addr */
        pci_write_config_dword(agp_bridge->dev,
                UNI_N_CFG_GART_BASE,
@@ -127,7 +127,7 @@ static int uninorth_configure(void)
                                       UNI_N_CFG_GART_DUMMY_PAGE,
                                       agp_bridge->scratch_page_real >> 12);
        }
-       
+
        return 0;
 }
 
@@ -162,7 +162,7 @@ static int uninorth_insert_memory(struct agp_memory *mem, off_t pg_start,
        }
        (void)in_le32((volatile u32*)&agp_bridge->gatt_table[pg_start]);
        mb();
-       flush_dcache_range((unsigned long)&agp_bridge->gatt_table[pg_start], 
+       flush_dcache_range((unsigned long)&agp_bridge->gatt_table[pg_start],
                (unsigned long)&agp_bridge->gatt_table[pg_start + mem->page_count]);
 
        uninorth_tlbflush(mem);
@@ -235,7 +235,7 @@ static void uninorth_agp_enable(struct agp_bridge_data *bridge, u32 mode)
 
        command = agp_collect_device_status(bridge, mode, status);
        command |= PCI_AGP_COMMAND_AGP;
-       
+
        if (uninorth_rev == 0x21) {
                /*
                 * Darwin disable AGP 4x on this revision, thus we
@@ -456,7 +456,7 @@ static struct aper_size_info_32 uninorth_sizes[7] =
        {256, 65536, 6, 64},
        {128, 32768, 5, 32},
        {64, 16384, 4, 16},
-#endif 
+#endif
        {32, 8192, 3, 8},
        {16, 4096, 2, 4},
        {8, 2048, 1, 2},