dt-bindings: pwm: Add i.MX TPM PWM binding
authorAnson Huang <anson.huang@nxp.com>
Thu, 9 May 2019 13:29:19 +0000 (13:29 +0000)
committerThierry Reding <thierry.reding@gmail.com>
Thu, 9 May 2019 15:00:24 +0000 (17:00 +0200)
Add i.MX TPM(Low Power Timer/Pulse Width Modulation Module) PWM binding.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Documentation/devicetree/bindings/pwm/imx-tpm-pwm.txt [new file with mode: 0644]

diff --git a/Documentation/devicetree/bindings/pwm/imx-tpm-pwm.txt b/Documentation/devicetree/bindings/pwm/imx-tpm-pwm.txt
new file mode 100644 (file)
index 0000000..3ba958d
--- /dev/null
@@ -0,0 +1,22 @@
+Freescale i.MX TPM PWM controller
+
+Required properties:
+- compatible : Should be "fsl,imx7ulp-pwm".
+- reg: Physical base address and length of the controller's registers.
+- #pwm-cells: Should be 3. See pwm.txt in this directory for a description of the cells format.
+- clocks : The clock provided by the SoC to drive the PWM.
+- interrupts: The interrupt for the PWM controller.
+
+Note: The TPM counter and period counter are shared between multiple channels, so all channels
+should use same period setting.
+
+Example:
+
+tpm4: pwm@40250000 {
+       compatible = "fsl,imx7ulp-pwm";
+       reg = <0x40250000 0x1000>;
+       assigned-clocks = <&pcc2 IMX7ULP_CLK_LPTPM4>;
+       assigned-clock-parents = <&scg1 IMX7ULP_CLK_SOSC_BUS_CLK>;
+       clocks = <&pcc2 IMX7ULP_CLK_LPTPM4>;
+       #pwm-cells = <3>;
+};