ARM: dts: qcom: Add SoC-specific string for sdhci-msm-v4 nodes

As per upstream discussion [1], we should have an SoC-specific
compatible string for Qualcomm's SDHCI nodes.  Let's add it.

[1] https://lkml.kernel.org/r/20181105203657.GA32282@bogus

Signed-off-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>

diff --git a/arch/arm/boot/dts/qcom-apq8084.dtsi b/arch/arm/boot/dts/qcom-apq8084.dtsi
index 0e1e98707e3f25602bbe35b12a5e93891fc1ee17..899f28533ed7f4afd405a446db4eea98dbc4009f 100644 (file)
--- a/arch/arm/boot/dts/qcom-apq8084.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8084.dtsi
@@ -412,7 +412,7 @@
                };
 
                sdhci@f9824900 {
-                       compatible = "qcom,sdhci-msm-v4";
+                       compatible = "qcom,apq8084-sdhci", "qcom,sdhci-msm-v4";
                        reg = <0xf9824900 0x11c>, <0xf9824000 0x800>;
                        reg-names = "hc_mem", "core_mem";
                        interrupts = <0 123 0>, <0 138 0>;
@@ -425,7 +425,7 @@
                };
 
                sdhci@f98a4900 {
-                       compatible = "qcom,sdhci-msm-v4";
+                       compatible = "qcom,apq8084-sdhci", "qcom,sdhci-msm-v4";
                        reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>;
                        reg-names = "hc_mem", "core_mem";
                        interrupts = <0 125 0>, <0 221 0>;

diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi
index c3470f9ec74769db5a50256e8a8c8ede9d5dedf2..ca266a5f021d55dc99ec78a9a9e32304b73bd806 100644 (file)
--- a/arch/arm/boot/dts/qcom-msm8974.dtsi
+++ b/arch/arm/boot/dts/qcom-msm8974.dtsi
@@ -604,7 +604,7 @@
                };
 
                sdhci@f9824900 {
-                       compatible = "qcom,sdhci-msm-v4";
+                       compatible = "qcom,msm8974-sdhci", "qcom,sdhci-msm-v4";
                        reg = <0xf9824900 0x11c>, <0xf9824000 0x800>;
                        reg-names = "hc_mem", "core_mem";
                        interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
@@ -618,7 +618,7 @@
                };
 
                sdhci@f9864900 {
-                       compatible = "qcom,sdhci-msm-v4";
+                       compatible = "qcom,msm8974-sdhci", "qcom,sdhci-msm-v4";
                        reg = <0xf9864900 0x11c>, <0xf9864000 0x800>;
                        reg-names = "hc_mem", "core_mem";
                        interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>,
@@ -632,7 +632,7 @@
                };
 
                sdhci@f98a4900 {
-                       compatible = "qcom,sdhci-msm-v4";
+                       compatible = "qcom,msm8974-sdhci", "qcom,sdhci-msm-v4";
                        reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>;
                        reg-names = "hc_mem", "core_mem";
                        interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,