drm/i915/icl: Fix CRC mismatch error for DP link layer compliance

Setting the pixel rounding bit to 1 in PIPE_CHICKEN register allows
to passthrough FB pixels unmodified across pipe. This fixes the failures
for DP link layer compliance tests 4.4.1.1, 4.4.1.2 & 4.4.1.3.
(Lineage #1605353570)

v2: This is also needed to fix failing IGT test case kms_cursor_crc on
ICL.(Mika Kahola)
Make macros consistent with i915_reg.h comments.(Jani Nikula)

Cc: Clint Taylor <clinton.a.taylor@intel.com>
Cc: Mika Kahola <mika.kahola@intel.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Signed-off-by: Aditya Swarup <aditya.swarup@intel.com>
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190307021412.18626-1-aditya.swarup@intel.com
References: https://bugs.freedesktop.org/show_bug.cgi?id=103232

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 2665ffe1e2a8f6a4529dc9104e55d91bbf24343c..58e68baaad9e5f2b895bcc4b772c2d56d42faa6c 100644 (file)
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -7659,12 +7659,13 @@ enum {
 #define  GEN9_LBS_SLA_RETRY_TIMER_DECREMENT_ENABLE     (1 << 2)
 
 /*GEN11 chicken */
-#define _PIPEA_CHICKEN                 0x70038
-#define _PIPEB_CHICKEN                 0x71038
-#define _PIPEC_CHICKEN                 0x72038
-#define  PER_PIXEL_ALPHA_BYPASS_EN     (1 << 7)
-#define PIPE_CHICKEN(pipe)             _MMIO_PIPE(pipe, _PIPEA_CHICKEN,\
-                                                  _PIPEB_CHICKEN)
+#define _PIPEA_CHICKEN                         0x70038
+#define _PIPEB_CHICKEN                         0x71038
+#define _PIPEC_CHICKEN                         0x72038
+#define PIPE_CHICKEN(pipe)                     _MMIO_PIPE(pipe, _PIPEA_CHICKEN,\
+                                                          _PIPEB_CHICKEN)
+#define   PIXEL_ROUNDING_TRUNC_FB_PASSTHRU     (1 << 15)
+#define   PER_PIXEL_ALPHA_BYPASS_EN            (1 << 7)
 
 /* PCH */
 

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 046ac1a6f6013d4fe958efb947f14ac3b9097b76..3182c13a1c11a6ce4bb6fdf66cd2470d13ad6e2f 100644 (file)
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -3933,7 +3933,13 @@ static void icl_set_pipe_chicken(struct intel_crtc *crtc)
         * and rounding for per-pixel values 00 and 0xff
         */
        tmp |= PER_PIXEL_ALPHA_BYPASS_EN;
-
+       /*
+        * Display WA # 1605353570: icl
+        * Set the pixel rounding bit to 1 for allowing
+        * passthrough of Frame buffer pixels unmodified
+        * across pipe
+        */
+       tmp |= PIXEL_ROUNDING_TRUNC_FB_PASSTHRU;
        I915_WRITE(PIPE_CHICKEN(pipe), tmp);
 }