Revert "ARM: dts: dra7: Add properties to enable PCIe x2 lane mode"

This reverts commit 4ece93c020e3ee19767b1c111be39fe7e32f8bf2.

The device tree binding for these is still being discussed.

Signed-off-by: Tony Lindgren <tony@atomide.com>

diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index c4d1fffea8ba7c16426d74033b92522e6d95a6e5..c13848e07cb45b2c1989ac2687c47005961a681c 100644 (file)
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -320,8 +320,6 @@
                                ti,hwmods = "pcie1";
                                phys = <&pcie1_phy>;
                                phy-names = "pcie-phy0";
-                               ti,syscon-lane-conf = <&scm_conf 0x558>;
-                               ti,syscon-lane-sel = <&scm_conf_pcie 0x18>;
                                interrupt-map-mask = <0 0 0 7>;
                                interrupt-map = <0 0 0 1 &pcie1_intc 1>,
                                                <0 0 0 2 &pcie1_intc 2>,
@@ -346,8 +344,6 @@
                                phys = <&pcie1_phy>;
                                phy-names = "pcie-phy0";
                                ti,syscon-unaligned-access = <&scm_conf1 0x14 2>;
-                               ti,syscon-lane-conf = <&scm_conf 0x558>;
-                               ti,syscon-lane-sel = <&scm_conf_pcie 0x18>;
                                status = "disabled";
                        };
                };