Merge branch 'core/softlockup' of git://git.kernel.org/pub/scm/linux/kernel/git/tip...
authorLinus Torvalds <torvalds@linux-foundation.org>
Tue, 7 Apr 2009 21:11:07 +0000 (14:11 -0700)
committerLinus Torvalds <torvalds@linux-foundation.org>
Tue, 7 Apr 2009 21:11:07 +0000 (14:11 -0700)
* 'core/softlockup' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
  softlockup: make DETECT_HUNG_TASK default depend on DETECT_SOFTLOCKUP
  softlockup: move 'one' to the softlockup section in sysctl.c
  softlockup: ensure the task has been switched out once
  softlockup: remove timestamp checking from hung_task
  softlockup: convert read_lock in hung_task to rcu_read_lock
  softlockup: check all tasks in hung_task
  softlockup: remove unused definition for spawn_softlockup_task
  softlockup: fix potential race in hung_task when resetting timeout
  softlockup: fix to allow compiling with !DETECT_HUNG_TASK
  softlockup: decouple hung tasks check from softlockup detection

674 files changed:
Documentation/DMA-mapping.txt
Documentation/DocBook/writing-an-alsa-driver.tmpl
Documentation/blockdev/00-INDEX
Documentation/blockdev/mflash.txt [new file with mode: 0644]
Documentation/devices.txt
Documentation/fb/uvesafb.txt
Documentation/filesystems/00-INDEX
Documentation/filesystems/nilfs2.txt [new file with mode: 0644]
Documentation/hwmon/g760a [new file with mode: 0644]
Documentation/isdn/README.gigaset
Documentation/kprobes.txt
Documentation/sound/alsa/soc/jack.txt [new file with mode: 0644]
Documentation/sysctl/vm.txt
Documentation/video4linux/pxa_camera.txt [new file with mode: 0644]
Documentation/video4linux/v4l2-framework.txt
MAINTAINERS
arch/arm/mach-davinci/board-evm.c
arch/arm/mach-davinci/usb.c
arch/arm/mach-iop13xx/setup.c
arch/arm/mach-iop13xx/tpmi.c
arch/arm/mach-kirkwood/common.c
arch/arm/mach-mx1/Makefile
arch/arm/mach-mx1/devices.c
arch/arm/mach-mx1/ksym_mx1.c [new file with mode: 0644]
arch/arm/mach-mx1/mx1_camera_fiq.S [new file with mode: 0644]
arch/arm/mach-mx3/clock.c
arch/arm/mach-orion5x/common.c
arch/arm/mach-pxa/include/mach/pxa2xx_spi.h
arch/arm/mach-s3c2410/mach-bast.c
arch/arm/mach-s3c2410/mach-n30.c
arch/arm/mach-s3c2412/mach-jive.c
arch/arm/plat-iop/adma.c
arch/arm/plat-mxc/include/mach/i2c.h [new file with mode: 0644]
arch/arm/plat-mxc/include/mach/memory.h
arch/arm/plat-mxc/include/mach/mx1_camera.h [new file with mode: 0644]
arch/arm/plat-s3c/dev-i2c0.c
arch/arm/plat-s3c/dev-i2c1.c
arch/arm/plat-s3c/include/plat/iic.h
arch/avr32/boards/hammerhead/flash.c
arch/avr32/mach-at32ap/at32ap700x.c
arch/blackfin/include/asm/bfin5xx_spi.h
arch/blackfin/mach-bf518/include/mach/bfin_serial_5xx.h
arch/blackfin/mach-bf527/include/mach/bfin_serial_5xx.h
arch/blackfin/mach-bf533/include/mach/bfin_serial_5xx.h
arch/blackfin/mach-bf537/include/mach/bfin_serial_5xx.h
arch/blackfin/mach-bf538/include/mach/bfin_serial_5xx.h
arch/blackfin/mach-bf548/include/mach/bfin_serial_5xx.h
arch/blackfin/mach-bf561/include/mach/bfin_serial_5xx.h
arch/cris/include/asm/ioctls.h
arch/cris/include/asm/rs485.h
arch/cris/include/asm/termios.h
arch/ia64/kernel/pci-dma.c
arch/ia64/sn/pci/pci_dma.c
arch/mips/alchemy/common/platform.c
arch/mips/alchemy/devboards/pb1200/platform.c
arch/mips/nxp/pnx833x/common/platform.c
arch/mips/nxp/pnx8550/common/platform.c
arch/mips/pmc-sierra/msp71xx/msp_usb.c
arch/powerpc/Kconfig
arch/powerpc/boot/dts/ksi8560.dts
arch/powerpc/boot/dts/pq2fads.dts
arch/powerpc/boot/dts/sbc8548.dts
arch/powerpc/boot/dts/sbc8560.dts
arch/powerpc/boot/dts/socrates.dts
arch/powerpc/boot/dts/stx_gp3_8560.dts
arch/powerpc/boot/dts/tqm8540.dts
arch/powerpc/boot/dts/tqm8541.dts
arch/powerpc/boot/dts/tqm8555.dts
arch/powerpc/boot/dts/tqm8560.dts
arch/powerpc/configs/pseries_defconfig
arch/powerpc/include/asm/lppaca.h
arch/powerpc/include/asm/mpic.h
arch/powerpc/include/asm/ps3fb.h
arch/powerpc/include/asm/pte-common.h
arch/powerpc/include/asm/reg.h
arch/powerpc/include/asm/reg_booke.h
arch/powerpc/include/asm/rtas.h
arch/powerpc/include/asm/sfp-machine.h
arch/powerpc/include/asm/systbl.h
arch/powerpc/include/asm/unistd.h
arch/powerpc/kernel/dma.c
arch/powerpc/kernel/fpu.S
arch/powerpc/kernel/ftrace.c
arch/powerpc/kernel/irq.c
arch/powerpc/kernel/lparcfg.c
arch/powerpc/kernel/misc_64.S
arch/powerpc/kernel/of_platform.c
arch/powerpc/kernel/prom_init.c
arch/powerpc/kernel/ptrace32.c
arch/powerpc/kernel/setup-common.c
arch/powerpc/platforms/cell/iommu.c
arch/powerpc/platforms/iseries/iommu.c
arch/powerpc/platforms/ps3/system-bus.c
arch/powerpc/sysdev/mpic.c
arch/x86/include/asm/dma-mapping.h
arch/x86/kernel/ftrace.c
arch/x86/kernel/pci-dma.c
arch/x86/kernel/pci-nommu.c
block/blk-core.c
block/blk-merge.c
block/blk-settings.c
block/blk-sysfs.c
block/blk.h
block/cfq-iosched.c
block/elevator.c
drivers/acpi/acpica/nsxfeval.c
drivers/acpi/pci_slot.c
drivers/ata/ahci.c
drivers/ata/ata_piix.c
drivers/ata/pata_cs5520.c
drivers/ata/pata_ixp4xx_cf.c
drivers/ata/pata_octeon_cf.c
drivers/ata/pdc_adma.c
drivers/ata/sata_inic162x.c
drivers/ata/sata_mv.c
drivers/ata/sata_qstor.c
drivers/ata/sata_sil24.c
drivers/ata/sata_vsc.c
drivers/atm/he.c
drivers/atm/lanai.c
drivers/base/isa.c
drivers/block/DAC960.c
drivers/block/Kconfig
drivers/block/Makefile
drivers/block/cciss.c
drivers/block/cciss.h
drivers/block/cciss_cmd.h
drivers/block/loop.c
drivers/block/mg_disk.c [new file with mode: 0644]
drivers/block/sx8.c
drivers/block/umem.c
drivers/char/esp.c
drivers/crypto/hifn_795x.c
drivers/crypto/ixp4xx_crypto.c
drivers/dma/ioat.c
drivers/firmware/dcdbas.c
drivers/hwmon/Kconfig
drivers/hwmon/Makefile
drivers/hwmon/asus_atk0110.c [new file with mode: 0644]
drivers/hwmon/g760a.c [new file with mode: 0644]
drivers/hwmon/lm95241.c
drivers/i2c/busses/Kconfig
drivers/i2c/busses/Makefile
drivers/i2c/busses/i2c-imx.c [new file with mode: 0644]
drivers/i2c/busses/i2c-mpc.c
drivers/i2c/busses/i2c-s3c2410.c
drivers/i2c/busses/i2c-s6000.c [new file with mode: 0644]
drivers/i2c/busses/i2c-s6000.h [new file with mode: 0644]
drivers/ide/cs5520.c
drivers/ide/setup-pci.c
drivers/idle/i7300_idle.c
drivers/ieee1394/pcilynx.c
drivers/infiniband/hw/amso1100/c2.c
drivers/infiniband/hw/ipath/ipath_driver.c
drivers/infiniband/hw/mthca/mthca_main.c
drivers/infiniband/hw/nes/nes.c
drivers/isdn/gigaset/bas-gigaset.c
drivers/isdn/gigaset/interface.c
drivers/media/dvb/dm1105/dm1105.c
drivers/media/dvb/dvb-usb/Kconfig
drivers/media/dvb/dvb-usb/af9015.c
drivers/media/dvb/dvb-usb/af9015.h
drivers/media/dvb/dvb-usb/ce6230.c
drivers/media/dvb/dvb-usb/dvb-usb-ids.h
drivers/media/dvb/firewire/firedtv-avc.c
drivers/media/dvb/frontends/Kconfig
drivers/media/dvb/frontends/Makefile
drivers/media/dvb/frontends/au8522_decoder.c
drivers/media/dvb/frontends/lgs8gxx.c [new file with mode: 0644]
drivers/media/dvb/frontends/lgs8gxx.h [new file with mode: 0644]
drivers/media/dvb/frontends/lgs8gxx_priv.h [new file with mode: 0644]
drivers/media/dvb/pluto2/pluto2.c
drivers/media/radio/dsbr100.c
drivers/media/radio/radio-aimslab.c
drivers/media/radio/radio-aztech.c
drivers/media/radio/radio-gemtek-pci.c
drivers/media/radio/radio-gemtek.c
drivers/media/radio/radio-maestro.c
drivers/media/radio/radio-maxiradio.c
drivers/media/radio/radio-mr800.c
drivers/media/radio/radio-rtrack2.c
drivers/media/radio/radio-sf16fmi.c
drivers/media/radio/radio-sf16fmr2.c
drivers/media/radio/radio-si470x.c
drivers/media/radio/radio-terratec.c
drivers/media/radio/radio-trust.c
drivers/media/radio/radio-typhoon.c
drivers/media/radio/radio-zoltrix.c
drivers/media/video/Kconfig
drivers/media/video/Makefile
drivers/media/video/adv7170.c
drivers/media/video/adv7175.c
drivers/media/video/au0828/Kconfig
drivers/media/video/au0828/au0828-cards.c
drivers/media/video/au0828/au0828-core.c
drivers/media/video/au0828/au0828-i2c.c
drivers/media/video/au0828/au0828-reg.h
drivers/media/video/au0828/au0828-video.c
drivers/media/video/au0828/au0828.h
drivers/media/video/bt819.c
drivers/media/video/bt856.c
drivers/media/video/bt866.c
drivers/media/video/bt8xx/bttv-cards.c
drivers/media/video/bt8xx/bttv-driver.c
drivers/media/video/bt8xx/bttvp.h
drivers/media/video/cafe_ccic.c
drivers/media/video/cs5345.c
drivers/media/video/cs53l32a.c
drivers/media/video/cx18/cx18-audio.c
drivers/media/video/cx18/cx18-av-core.c
drivers/media/video/cx18/cx18-av-core.h
drivers/media/video/cx18/cx18-driver.c
drivers/media/video/cx18/cx18-fileops.c
drivers/media/video/cx18/cx18-gpio.c
drivers/media/video/cx18/cx18-i2c.c
drivers/media/video/cx18/cx18-ioctl.c
drivers/media/video/cx18/cx18-video.c
drivers/media/video/cx231xx/Kconfig [new file with mode: 0644]
drivers/media/video/cx231xx/Makefile [new file with mode: 0644]
drivers/media/video/cx231xx/cx231xx-audio.c [new file with mode: 0644]
drivers/media/video/cx231xx/cx231xx-avcore.c [new file with mode: 0644]
drivers/media/video/cx231xx/cx231xx-cards.c [new file with mode: 0644]
drivers/media/video/cx231xx/cx231xx-conf-reg.h [new file with mode: 0644]
drivers/media/video/cx231xx/cx231xx-core.c [new file with mode: 0644]
drivers/media/video/cx231xx/cx231xx-dvb.c [new file with mode: 0644]
drivers/media/video/cx231xx/cx231xx-i2c.c [new file with mode: 0644]
drivers/media/video/cx231xx/cx231xx-input.c [new file with mode: 0644]
drivers/media/video/cx231xx/cx231xx-pcb-cfg.c [new file with mode: 0644]
drivers/media/video/cx231xx/cx231xx-pcb-cfg.h [new file with mode: 0644]
drivers/media/video/cx231xx/cx231xx-reg.h [new file with mode: 0644]
drivers/media/video/cx231xx/cx231xx-vbi.c [new file with mode: 0644]
drivers/media/video/cx231xx/cx231xx-vbi.h [new file with mode: 0644]
drivers/media/video/cx231xx/cx231xx-video.c [new file with mode: 0644]
drivers/media/video/cx231xx/cx231xx.h [new file with mode: 0644]
drivers/media/video/cx23885/cx23885-cards.c
drivers/media/video/cx23885/cx23885-core.c
drivers/media/video/cx23885/cx23885-dvb.c
drivers/media/video/cx23885/cx23885-video.c
drivers/media/video/cx23885/cx23885.h
drivers/media/video/cx25840/cx25840-audio.c
drivers/media/video/cx25840/cx25840-core.c
drivers/media/video/cx25840/cx25840-core.h
drivers/media/video/cx25840/cx25840-firmware.c
drivers/media/video/cx88/cx88-alsa.c
drivers/media/video/cx88/cx88-cards.c
drivers/media/video/cx88/cx88-core.c
drivers/media/video/cx88/cx88-dvb.c
drivers/media/video/cx88/cx88-mpeg.c
drivers/media/video/cx88/cx88-video.c
drivers/media/video/cx88/cx88.h
drivers/media/video/em28xx/em28xx-cards.c
drivers/media/video/em28xx/em28xx-core.c
drivers/media/video/em28xx/em28xx-i2c.c
drivers/media/video/em28xx/em28xx-video.c
drivers/media/video/em28xx/em28xx.h
drivers/media/video/gspca/gspca.c
drivers/media/video/gspca/gspca.h
drivers/media/video/gspca/m5602/Makefile
drivers/media/video/gspca/m5602/m5602_bridge.h
drivers/media/video/gspca/m5602/m5602_core.c
drivers/media/video/gspca/m5602/m5602_mt9m111.c
drivers/media/video/gspca/m5602/m5602_mt9m111.h
drivers/media/video/gspca/m5602/m5602_ov9650.c
drivers/media/video/gspca/m5602/m5602_ov9650.h
drivers/media/video/gspca/m5602/m5602_po1030.c
drivers/media/video/gspca/m5602/m5602_po1030.h
drivers/media/video/gspca/m5602/m5602_s5k4aa.c
drivers/media/video/gspca/m5602/m5602_s5k4aa.h
drivers/media/video/gspca/m5602/m5602_s5k83a.c
drivers/media/video/gspca/m5602/m5602_s5k83a.h
drivers/media/video/gspca/m5602/m5602_sensor.h
drivers/media/video/gspca/sq905.c
drivers/media/video/gspca/vc032x.c
drivers/media/video/ivtv/ivtv-driver.c
drivers/media/video/ivtv/ivtv-fileops.c
drivers/media/video/ivtv/ivtv-gpio.c
drivers/media/video/ivtv/ivtv-i2c.c
drivers/media/video/ivtv/ivtv-ioctl.c
drivers/media/video/ivtv/ivtv-routing.c
drivers/media/video/ks0127.c
drivers/media/video/m52790.c
drivers/media/video/meye.c
drivers/media/video/msp3400-driver.c
drivers/media/video/msp3400-driver.h
drivers/media/video/msp3400-kthreads.c
drivers/media/video/mt9m001.c
drivers/media/video/mt9t031.c
drivers/media/video/mx1_camera.c [new file with mode: 0644]
drivers/media/video/mx3_camera.c
drivers/media/video/mxb.c
drivers/media/video/ov772x.c
drivers/media/video/pvrusb2/pvrusb2-audio.c
drivers/media/video/pvrusb2/pvrusb2-cs53l32a.c
drivers/media/video/pvrusb2/pvrusb2-ctrl.c
drivers/media/video/pvrusb2/pvrusb2-cx2584x-v4l.c
drivers/media/video/pvrusb2/pvrusb2-hdw.c
drivers/media/video/pvrusb2/pvrusb2-i2c-core.c
drivers/media/video/pvrusb2/pvrusb2-sysfs.c
drivers/media/video/pvrusb2/pvrusb2-video-v4l.c
drivers/media/video/pvrusb2/pvrusb2-wm8775.c
drivers/media/video/pwc/Kconfig
drivers/media/video/pxa_camera.c
drivers/media/video/s2255drv.c
drivers/media/video/saa7110.c
drivers/media/video/saa7115.c
drivers/media/video/saa7127.c
drivers/media/video/saa7134/saa6752hs.c
drivers/media/video/saa7134/saa7134-cards.c
drivers/media/video/saa7134/saa7134-core.c
drivers/media/video/saa7134/saa7134-video.c
drivers/media/video/saa7134/saa7134.h
drivers/media/video/saa717x.c
drivers/media/video/saa7185.c
drivers/media/video/saa7191.c
drivers/media/video/soc_camera.c
drivers/media/video/tda9840.c
drivers/media/video/tea6415c.c
drivers/media/video/tea6420.c
drivers/media/video/tuner-core.c
drivers/media/video/tvaudio.c
drivers/media/video/tvp5150.c
drivers/media/video/upd64031a.c
drivers/media/video/upd64083.c
drivers/media/video/usbvision/usbvision-core.c
drivers/media/video/usbvision/usbvision-i2c.c
drivers/media/video/usbvision/usbvision-video.c
drivers/media/video/uvc/Kconfig
drivers/media/video/v4l1-compat.c
drivers/media/video/v4l2-common.c
drivers/media/video/v4l2-dev.c
drivers/media/video/v4l2-ioctl.c
drivers/media/video/v4l2-subdev.c [deleted file]
drivers/media/video/vino.c
drivers/media/video/vp27smpx.c
drivers/media/video/vpx3220.c
drivers/media/video/w9968cf.c
drivers/media/video/w9968cf.h
drivers/media/video/wm8775.c
drivers/media/video/zoran/zoran.h
drivers/media/video/zoran/zoran_card.c
drivers/media/video/zoran/zoran_device.c
drivers/media/video/zoran/zoran_driver.c
drivers/media/video/zr364xx.c
drivers/memstick/host/jmb38x_ms.c
drivers/message/fusion/mptbase.c
drivers/message/i2o/memory.c
drivers/message/i2o/pci.c
drivers/misc/tifm_7xx1.c
drivers/mmc/host/sdhci-pci.c
drivers/net/8139cp.c
drivers/net/Kconfig
drivers/net/acenic.c
drivers/net/amd8111e.c
drivers/net/atl1e/atl1e_main.c
drivers/net/atlx/atl1.c
drivers/net/atlx/atl2.c
drivers/net/b44.c
drivers/net/bnx2.c
drivers/net/bnx2.h
drivers/net/bnx2_fw.h
drivers/net/bnx2_fw2.h [deleted file]
drivers/net/bnx2x_main.c
drivers/net/cassini.c
drivers/net/chelsio/cxgb2.c
drivers/net/cxgb3/cxgb3_main.c
drivers/net/dl2k.c
drivers/net/e100.c
drivers/net/e1000/e1000_main.c
drivers/net/e1000e/netdev.c
drivers/net/enic/enic_main.c
drivers/net/forcedeth.c
drivers/net/hp100.c
drivers/net/ibm_newemac/core.c
drivers/net/igb/igb_main.c
drivers/net/ioc3-eth.c
drivers/net/ipg.c
drivers/net/ixgb/ixgb_main.c
drivers/net/ixgbe/ixgbe_main.c
drivers/net/jme.c
drivers/net/mlx4/main.c
drivers/net/myri10ge/myri10ge.c
drivers/net/myri_code.h [deleted file]
drivers/net/myri_sbus.c
drivers/net/netxen/netxen_nic_main.c
drivers/net/niu.c
drivers/net/ns83820.c
drivers/net/pcmcia/axnet_cs.c
drivers/net/qla3xxx.c
drivers/net/qlge/qlge_main.c
drivers/net/r6040.c
drivers/net/r8169.c
drivers/net/s2io.c
drivers/net/sc92031.c
drivers/net/sis190.c
drivers/net/sis900.c
drivers/net/skge.c
drivers/net/sky2.c
drivers/net/smsc911x.c
drivers/net/smsc9420.c
drivers/net/sungem.c
drivers/net/tehuti.c
drivers/net/tehuti.h
drivers/net/tg3.c
drivers/net/tlan.c
drivers/net/tokenring/lanstreamer.c
drivers/net/tulip/dmfe.c
drivers/net/tulip/uli526x.c
drivers/net/tulip/winbond-840.c
drivers/net/typhoon.c
drivers/net/usb/usbnet.c
drivers/net/via-rhine.c
drivers/net/virtio_net.c
drivers/net/vxge/vxge-main.c
drivers/net/wan/wanxl.c
drivers/net/wireless/adm8211.c
drivers/net/wireless/ath5k/base.c
drivers/net/wireless/b43/dma.c
drivers/net/wireless/b43legacy/dma.c
drivers/net/wireless/ipw2x00/ipw2100.c
drivers/net/wireless/ipw2x00/ipw2200.c
drivers/net/wireless/iwlwifi/iwl3945-base.c
drivers/net/wireless/prism54/islpci_hotplug.c
drivers/net/wireless/rt2x00/rt2x00pci.c
drivers/parport/parport_cs.c
drivers/parport/parport_pc.c
drivers/parport/parport_serial.c
drivers/pci/access.c
drivers/pci/bus.c
drivers/pci/hotplug/acpiphp_glue.c
drivers/pci/intel-iommu.c
drivers/pci/iov.c
drivers/pci/pci-sysfs.c
drivers/pci/pci.c
drivers/pci/probe.c
drivers/pci/quirks.c
drivers/pci/setup-bus.c
drivers/pnp/card.c
drivers/pnp/core.c
drivers/rapidio/rio-scan.c
drivers/scsi/3w-9xxx.c
drivers/scsi/3w-xxxx.h
drivers/scsi/BusLogic.c
drivers/scsi/a100u2w.c
drivers/scsi/aacraid/aachba.c
drivers/scsi/aacraid/commsup.c
drivers/scsi/aacraid/linit.c
drivers/scsi/aic7xxx/aic79xx_osm_pci.c
drivers/scsi/aic7xxx/aic7xxx_osm_pci.c
drivers/scsi/aic94xx/aic94xx_init.c
drivers/scsi/arcmsr/arcmsr_hba.c
drivers/scsi/atp870u.c
drivers/scsi/dpt_i2o.c
drivers/scsi/eata.c
drivers/scsi/gdth.c
drivers/scsi/hptiop.c
drivers/scsi/initio.c
drivers/scsi/ipr.c
drivers/scsi/ips.c
drivers/scsi/lasi700.c
drivers/scsi/lpfc/lpfc_init.c
drivers/scsi/megaraid.c
drivers/scsi/megaraid/megaraid_mbox.c
drivers/scsi/megaraid/megaraid_sas.c
drivers/scsi/mvsas.c
drivers/scsi/nsp32.c
drivers/scsi/qla1280.c
drivers/scsi/qla2xxx/qla_os.c
drivers/scsi/qla4xxx/ql4_os.c
drivers/scsi/sni_53c710.c
drivers/scsi/stex.c
drivers/scsi/sym53c8xx_2/sym_glue.c
drivers/scsi/sym53c8xx_2/sym_hipd.h
drivers/serial/Kconfig
drivers/serial/Makefile
drivers/serial/bfin_5xx.c
drivers/serial/cpm_uart/cpm_uart_core.c
drivers/serial/crisv10.c
drivers/serial/crisv10.h
drivers/serial/jsm/jsm_neo.c
drivers/serial/jsm/jsm_tty.c
drivers/serial/pmac_zilog.c
drivers/sn/ioc3.c
drivers/spi/pxa2xx_spi.c
drivers/spi/spi_bfin5xx.c
drivers/spi/spi_imx.c
drivers/staging/agnx/pci.c
drivers/staging/altpciechdma/altpciechdma.c
drivers/staging/serqt_usb/serqt_usb.c
drivers/staging/slicoss/slicoss.c
drivers/staging/sxg/sxg.c
drivers/usb/host/ehci-hcd.c
drivers/usb/host/ehci-pci.c
drivers/usb/host/ehci-ps3.c
drivers/usb/host/ohci-ps3.c
drivers/uwb/whci.c
drivers/video/Kconfig
drivers/video/fsl-diu-fb.c
drivers/video/mx3fb.c
drivers/video/tdfxfb.c
drivers/watchdog/wdrtas.c
firmware/Makefile
firmware/WHENCE
firmware/bnx2/bnx2-mips-06-4.6.16.fw.ihex [new file with mode: 0644]
firmware/bnx2/bnx2-mips-09-4.6.17.fw.ihex [new file with mode: 0644]
firmware/bnx2/bnx2-rv2p-06-4.6.16.fw.ihex [new file with mode: 0644]
firmware/bnx2/bnx2-rv2p-09-4.6.15.fw.ihex [new file with mode: 0644]
firmware/myricom/lanai.bin.ihex [new file with mode: 0644]
fs/Kconfig
fs/Makefile
fs/nfs/file.c
fs/nilfs2/Makefile [new file with mode: 0644]
fs/nilfs2/alloc.c [new file with mode: 0644]
fs/nilfs2/alloc.h [new file with mode: 0644]
fs/nilfs2/bmap.c [new file with mode: 0644]
fs/nilfs2/bmap.h [new file with mode: 0644]
fs/nilfs2/bmap_union.h [new file with mode: 0644]
fs/nilfs2/btnode.c [new file with mode: 0644]
fs/nilfs2/btnode.h [new file with mode: 0644]
fs/nilfs2/btree.c [new file with mode: 0644]
fs/nilfs2/btree.h [new file with mode: 0644]
fs/nilfs2/cpfile.c [new file with mode: 0644]
fs/nilfs2/cpfile.h [new file with mode: 0644]
fs/nilfs2/dat.c [new file with mode: 0644]
fs/nilfs2/dat.h [new file with mode: 0644]
fs/nilfs2/dir.c [new file with mode: 0644]
fs/nilfs2/direct.c [new file with mode: 0644]
fs/nilfs2/direct.h [new file with mode: 0644]
fs/nilfs2/file.c [new file with mode: 0644]
fs/nilfs2/gcdat.c [new file with mode: 0644]
fs/nilfs2/gcinode.c [new file with mode: 0644]
fs/nilfs2/ifile.c [new file with mode: 0644]
fs/nilfs2/ifile.h [new file with mode: 0644]
fs/nilfs2/inode.c [new file with mode: 0644]
fs/nilfs2/ioctl.c [new file with mode: 0644]
fs/nilfs2/mdt.c [new file with mode: 0644]
fs/nilfs2/mdt.h [new file with mode: 0644]
fs/nilfs2/namei.c [new file with mode: 0644]
fs/nilfs2/nilfs.h [new file with mode: 0644]
fs/nilfs2/page.c [new file with mode: 0644]
fs/nilfs2/page.h [new file with mode: 0644]
fs/nilfs2/recovery.c [new file with mode: 0644]
fs/nilfs2/sb.h [new file with mode: 0644]
fs/nilfs2/segbuf.c [new file with mode: 0644]
fs/nilfs2/segbuf.h [new file with mode: 0644]
fs/nilfs2/seglist.h [new file with mode: 0644]
fs/nilfs2/segment.c [new file with mode: 0644]
fs/nilfs2/segment.h [new file with mode: 0644]
fs/nilfs2/sufile.c [new file with mode: 0644]
fs/nilfs2/sufile.h [new file with mode: 0644]
fs/nilfs2/super.c [new file with mode: 0644]
fs/nilfs2/the_nilfs.c [new file with mode: 0644]
fs/nilfs2/the_nilfs.h [new file with mode: 0644]
fs/ocfs2/file.c
fs/proc/task_mmu.c
fs/proc/task_nommu.c
fs/ramfs/inode.c
fs/romfs/super.c
fs/splice.c
fs/super.c
include/acpi/acpixf.h
include/linux/ata.h
include/linux/blkdev.h
include/linux/compiler.h
include/linux/dma-mapping.h
include/linux/elevator.h
include/linux/fs.h
include/linux/fsl_devices.h
include/linux/ftrace.h
include/linux/hardirq.h
include/linux/i2c-id.h
include/linux/i2c/s6000.h [new file with mode: 0644]
include/linux/init_task.h
include/linux/interrupt.h
include/linux/ipc_namespace.h
include/linux/irq.h
include/linux/irqreturn.h
include/linux/kprobes.h
include/linux/mg_disk.h [new file with mode: 0644]
include/linux/nilfs2_fs.h [new file with mode: 0644]
include/linux/parport_pc.h
include/linux/pci.h
include/linux/sched.h
include/linux/serial_core.h
include/linux/spi/spi.h
include/linux/tty_driver.h
include/linux/videodev2.h
include/linux/writeback.h
include/media/msp3400.h
include/media/ov772x.h
include/media/saa7146.h
include/media/tvaudio.h
include/media/v4l2-common.h
include/media/v4l2-i2c-drv-legacy.h [deleted file]
include/media/v4l2-i2c-drv.h
include/media/v4l2-subdev.h
include/video/tdfx.h
init/Kconfig
ipc/Makefile
ipc/mq_sysctl.c [new file with mode: 0644]
ipc/mqueue.c
ipc/msgutil.c
ipc/namespace.c
ipc/util.c
ipc/util.h
kernel/exit.c
kernel/irq/devres.c
kernel/irq/handle.c
kernel/irq/manage.c
kernel/kprobes.c
kernel/module.c
kernel/sysctl.c
kernel/trace/blktrace.c
kernel/trace/trace.c
kernel/trace/trace.h
kernel/trace/trace_export.c
kernel/trace/trace_output.c
kernel/trace/trace_sched_switch.c
kernel/trace/trace_sched_wakeup.c
lib/swiotlb.c
mm/pdflush.c
net/802/fddi.c
net/ipv6/xfrm6_output.c
net/socket.c
scripts/tracing/power.pl [moved from scripts/trace/power.pl with 100% similarity]
security/tomoyo/common.c
security/tomoyo/common.h
security/tomoyo/domain.c
sound/arm/pxa2xx-ac97-lib.c
sound/atmel/abdac.c
sound/atmel/ac97c.c
sound/atmel/ac97c.h
sound/core/oss/mixer_oss.c
sound/isa/opl3sa2.c
sound/pci/ad1889.c
sound/pci/ali5451/ali5451.c
sound/pci/als300.c
sound/pci/als4000.c
sound/pci/au88x0/au88x0.c
sound/pci/aw2/aw2-alsa.c
sound/pci/azt3328.c
sound/pci/ca0106/ca0106_main.c
sound/pci/cs5535audio/cs5535audio.c
sound/pci/emu10k1/emu10k1x.c
sound/pci/es1938.c
sound/pci/es1968.c
sound/pci/hda/patch_analog.c
sound/pci/hda/patch_realtek.c
sound/pci/hda/patch_sigmatel.c
sound/pci/ice1712/ice1712.c
sound/pci/maestro3.c
sound/pci/mixart/mixart.c
sound/pci/pcxhr/pcxhr.c
sound/pci/sis7019.c
sound/pci/sonicvibes.c
sound/pci/trident/trident_main.c
sound/ppc/powermac.c
sound/soc/blackfin/bf5xx-ac97-pcm.c
sound/soc/blackfin/bf5xx-i2s-pcm.c
sound/soc/codecs/ak4535.c
sound/soc/codecs/twl4030.c
sound/soc/codecs/twl4030.h
sound/soc/codecs/wm9705.c
sound/soc/fsl/fsl_dma.c
sound/soc/fsl/fsl_ssi.c
sound/soc/omap/omap-mcbsp.c
sound/soc/omap/omap-pcm.c
sound/soc/pxa/Kconfig
sound/soc/pxa/Makefile
sound/soc/pxa/magician.c [new file with mode: 0644]
sound/soc/pxa/pxa-ssp.c
sound/soc/pxa/pxa2xx-pcm.c
sound/soc/s3c24xx/s3c24xx-pcm.c
sound/soc/soc-core.c
sound/usb/usbaudio.c

index b2a4d6d244d932cf7cd72d3034fba0ba2c853dff..01f24e94bdb630ddecb6511ffa0f02119ff54c55 100644 (file)
@@ -136,7 +136,7 @@ exactly why.
 The standard 32-bit addressing PCI device would do something like
 this:
 
-       if (pci_set_dma_mask(pdev, DMA_32BIT_MASK)) {
+       if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
                printk(KERN_WARNING
                       "mydev: No suitable DMA available.\n");
                goto ignore_this_device;
@@ -155,9 +155,9 @@ all 64-bits when accessing streaming DMA:
 
        int using_dac;
 
-       if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK)) {
+       if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) {
                using_dac = 1;
-       } else if (!pci_set_dma_mask(pdev, DMA_32BIT_MASK)) {
+       } else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
                using_dac = 0;
        } else {
                printk(KERN_WARNING
@@ -170,14 +170,14 @@ the case would look like this:
 
        int using_dac, consistent_using_dac;
 
-       if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK)) {
+       if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) {
                using_dac = 1;
                consistent_using_dac = 1;
-               pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
-       } else if (!pci_set_dma_mask(pdev, DMA_32BIT_MASK)) {
+               pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
+       } else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
                using_dac = 0;
                consistent_using_dac = 0;
-               pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
+               pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
        } else {
                printk(KERN_WARNING
                       "mydev: No suitable DMA available.\n");
@@ -192,7 +192,7 @@ check the return value from pci_set_consistent_dma_mask().
 Finally, if your device can only drive the low 24-bits of
 address during PCI bus mastering you might do something like:
 
-       if (pci_set_dma_mask(pdev, DMA_24BIT_MASK)) {
+       if (pci_set_dma_mask(pdev, DMA_BIT_MASK(24))) {
                printk(KERN_WARNING
                       "mydev: 24-bit DMA addressing not available.\n");
                goto ignore_this_device;
@@ -213,7 +213,7 @@ most specific mask.
 
 Here is pseudo-code showing how this might be done:
 
-       #define PLAYBACK_ADDRESS_BITS   DMA_32BIT_MASK
+       #define PLAYBACK_ADDRESS_BITS   DMA_BIT_MASK(32)
        #define RECORD_ADDRESS_BITS     0x00ffffff
 
        struct my_sound_card *card;
index 46b08fef37445b4d0455f570e1fe65871a053dda..7a2e0e98986a744230a032970d9a072b6a9b8422 100644 (file)
           if (err < 0)
                   return err;
           /* check PCI availability (28bit DMA) */
-          if (pci_set_dma_mask(pci, DMA_28BIT_MASK) < 0 ||
-              pci_set_consistent_dma_mask(pci, DMA_28BIT_MASK) < 0) {
+          if (pci_set_dma_mask(pci, DMA_BIT_MASK(28)) < 0 ||
+              pci_set_consistent_dma_mask(pci, DMA_BIT_MASK(28)) < 0) {
                   printk(KERN_ERR "error to set 28bit mask DMA\n");
                   pci_disable_device(pci);
                   return -ENXIO;
   err = pci_enable_device(pci);
   if (err < 0)
           return err;
-  if (pci_set_dma_mask(pci, DMA_28BIT_MASK) < 0 ||
-      pci_set_consistent_dma_mask(pci, DMA_28BIT_MASK) < 0) {
+  if (pci_set_dma_mask(pci, DMA_BIT_MASK(28)) < 0 ||
+      pci_set_consistent_dma_mask(pci, DMA_BIT_MASK(28)) < 0) {
           printk(KERN_ERR "error to set 28bit mask DMA\n");
           pci_disable_device(pci);
           return -ENXIO;
index 86f054c47013c8c90a7dac34872efd27480cde3c..c08df56dd91bdd1f8acf65cc9839850fd64a3c2f 100644 (file)
@@ -8,6 +8,8 @@ cpqarray.txt
        - info on using Compaq's SMART2 Intelligent Disk Array Controllers.
 floppy.txt
        - notes and driver options for the floppy disk driver.
+mflash.txt
+       - info on mGine m(g)flash driver for linux.
 nbd.txt
        - info on a TCP implementation of a network block device.
 paride.txt
diff --git a/Documentation/blockdev/mflash.txt b/Documentation/blockdev/mflash.txt
new file mode 100644 (file)
index 0000000..1f610ec
--- /dev/null
@@ -0,0 +1,84 @@
+This document describes m[g]flash support in linux.
+
+Contents
+  1. Overview
+  2. Reserved area configuration
+  3. Example of mflash platform driver registration
+
+1. Overview
+
+Mflash and gflash are embedded flash drive. The only difference is mflash is
+MCP(Multi Chip Package) device. These two device operate exactly same way.
+So the rest mflash repersents mflash and gflash altogether.
+
+Internally, mflash has nand flash and other hardware logics and supports
+2 different operation (ATA, IO) modes. ATA mode doesn't need any new
+driver and currently works well under standard IDE subsystem. Actually it's
+one chip SSD. IO mode is ATA-like custom mode for the host that doesn't have
+IDE interface.
+
+Followings are brief descriptions about IO mode.
+A. IO mode based on ATA protocol and uses some custom command. (read confirm,
+write confirm)
+B. IO mode uses SRAM bus interface.
+C. IO mode supports 4kB boot area, so host can boot from mflash.
+
+2. Reserved area configuration
+If host boot from mflash, usually needs raw area for boot loader image. All of
+the mflash's block device operation will be taken this value as start offset.
+Note that boot loader's size of reserved area and kernel configuration value
+must be same.
+
+3. Example of mflash platform driver registration
+Working mflash is very straight forward. Adding platform device stuff to board
+configuration file is all. Here is some pseudo example.
+
+static struct mg_drv_data mflash_drv_data = {
+       /* If you want to polling driver set to 1 */
+       .use_polling = 0,
+       /* device attribution */
+       .dev_attr = MG_BOOT_DEV
+};
+
+static struct resource mg_mflash_rsc[] = {
+       /* Base address of mflash */
+       [0] = {
+               .start = 0x08000000,
+               .end = 0x08000000 + SZ_64K - 1,
+               .flags = IORESOURCE_MEM
+       },
+       /* mflash interrupt pin */
+       [1] = {
+               .start = IRQ_GPIO(84),
+               .end = IRQ_GPIO(84),
+               .flags = IORESOURCE_IRQ
+       },
+       /* mflash reset pin */
+       [2] = {
+               .start = 43,
+               .end = 43,
+               .name = MG_RST_PIN,
+               .flags = IORESOURCE_IO
+       },
+       /* mflash reset-out pin
+        * If you use mflash as storage device (i.e. other than MG_BOOT_DEV),
+        * should assign this */
+       [3] = {
+               .start = 51,
+               .end = 51,
+               .name = MG_RSTOUT_PIN,
+               .flags = IORESOURCE_IO
+       }
+};
+
+static struct platform_device mflash_dev = {
+       .name = MG_DEV_NAME,
+       .id = -1,
+       .dev = {
+               .platform_data = &mflash_drv_data,
+       },
+       .num_resources = ARRAY_SIZE(mg_mflash_rsc),
+       .resource = mg_mflash_rsc
+};
+
+platform_device_register(&mflash_dev);
index 4d70df63d1d3ae1d053a7571f71e4fce57ad8604..53d64d382343f13ff429906f9740e8d15de18739 100644 (file)
@@ -2797,6 +2797,10 @@ Your cooperation is appreciated.
                 206 = /dev/ttySC1              SC26xx serial port 1
                 207 = /dev/ttySC2              SC26xx serial port 2
                 208 = /dev/ttySC3              SC26xx serial port 3
+                209 = /dev/ttyMAX0             MAX3100 serial port 0
+                210 = /dev/ttyMAX1             MAX3100 serial port 1
+                211 = /dev/ttyMAX2             MAX3100 serial port 2
+                212 = /dev/ttyMAX3             MAX3100 serial port 3
 
 205 char       Low-density serial ports (alternate device)
                  0 = /dev/culu0                Callout device for ttyLU0
index 7ac3c4078ff956985254535c4cc9177519bec05e..eefdd91d298a9c9ea45e1ab9d84cdbf8ea1f1908 100644 (file)
@@ -59,7 +59,8 @@ Accepted options:
 ypan    Enable display panning using the VESA protected mode
         interface.  The visible screen is just a window of the
         video memory, console scrolling is done by changing the
-        start of the window.  Available on x86 only.
+        start of the window.  This option is available on x86
+        only and is the default option on that architecture.
 
 ywrap   Same as ypan, but assumes your gfx board can wrap-around
         the video memory (i.e. starts reading from top if it
@@ -67,7 +68,7 @@ ywrap   Same as ypan, but assumes your gfx board can wrap-around
         Available on x86 only.
 
 redraw  Scroll by redrawing the affected part of the screen, this
-        is the safe (and slow) default.
+        is the default on non-x86.
 
 (If you're using uvesafb as a module, the above three options are
  used a parameter of the scroll option, e.g. scroll=ypan.)
@@ -182,7 +183,7 @@ from the Video BIOS if you set pixclock to 0 in fb_var_screeninfo.
 
 --
  Michal Januszewski <spock@gentoo.org>
- Last updated: 2007-06-16
+ Last updated: 2009-03-30
 
  Documentation of the uvesafb options is loosely based on vesafb.txt.
 
index 52cd611277a3998a322b8fbf2a8604fb1e5764a1..8dd6db76171deb5c24fca888676162e5d9c10676 100644 (file)
@@ -68,6 +68,8 @@ ncpfs.txt
        - info on Novell Netware(tm) filesystem using NCP protocol.
 nfsroot.txt
        - short guide on setting up a diskless box with NFS root filesystem.
+nilfs2.txt
+       - info and mount options for the NILFS2 filesystem.
 ntfs.txt
        - info and mount options for the NTFS filesystem (Windows NT).
 ocfs2.txt
diff --git a/Documentation/filesystems/nilfs2.txt b/Documentation/filesystems/nilfs2.txt
new file mode 100644 (file)
index 0000000..55c4300
--- /dev/null
@@ -0,0 +1,200 @@
+NILFS2
+------
+
+NILFS2 is a log-structured file system (LFS) supporting continuous
+snapshotting.  In addition to versioning capability of the entire file
+system, users can even restore files mistakenly overwritten or
+destroyed just a few seconds ago.  Since NILFS2 can keep consistency
+like conventional LFS, it achieves quick recovery after system
+crashes.
+
+NILFS2 creates a number of checkpoints every few seconds or per
+synchronous write basis (unless there is no change).  Users can select
+significant versions among continuously created checkpoints, and can
+change them into snapshots which will be preserved until they are
+changed back to checkpoints.
+
+There is no limit on the number of snapshots until the volume gets
+full.  Each snapshot is mountable as a read-only file system
+concurrently with its writable mount, and this feature is convenient
+for online backup.
+
+The userland tools are included in nilfs-utils package, which is
+available from the following download page.  At least "mkfs.nilfs2",
+"mount.nilfs2", "umount.nilfs2", and "nilfs_cleanerd" (so called
+cleaner or garbage collector) are required.  Details on the tools are
+described in the man pages included in the package.
+
+Project web page:    http://www.nilfs.org/en/
+Download page:       http://www.nilfs.org/en/download.html
+Git tree web page:   http://www.nilfs.org/git/
+NILFS mailing lists: http://www.nilfs.org/mailman/listinfo/users
+
+Caveats
+=======
+
+Features which NILFS2 does not support yet:
+
+       - atime
+       - extended attributes
+       - POSIX ACLs
+       - quotas
+       - writable snapshots
+       - remote backup (CDP)
+       - data integrity
+       - defragmentation
+
+Mount options
+=============
+
+NILFS2 supports the following mount options:
+(*) == default
+
+barrier=on(*)          This enables/disables barriers. barrier=off disables
+                       it, barrier=on enables it.
+errors=continue(*)     Keep going on a filesystem error.
+errors=remount-ro      Remount the filesystem read-only on an error.
+errors=panic           Panic and halt the machine if an error occurs.
+cp=n                   Specify the checkpoint-number of the snapshot to be
+                       mounted.  Checkpoints and snapshots are listed by lscp
+                       user command.  Only the checkpoints marked as snapshot
+                       are mountable with this option.  Snapshot is read-only,
+                       so a read-only mount option must be specified together.
+order=relaxed(*)       Apply relaxed order semantics that allows modified data
+                       blocks to be written to disk without making a
+                       checkpoint if no metadata update is going.  This mode
+                       is equivalent to the ordered data mode of the ext3
+                       filesystem except for the updates on data blocks still
+                       conserve atomicity.  This will improve synchronous
+                       write performance for overwriting.
+order=strict           Apply strict in-order semantics that preserves sequence
+                       of all file operations including overwriting of data
+                       blocks.  That means, it is guaranteed that no
+                       overtaking of events occurs in the recovered file
+                       system after a crash.
+
+NILFS2 usage
+============
+
+To use nilfs2 as a local file system, simply:
+
+ # mkfs -t nilfs2 /dev/block_device
+ # mount -t nilfs2 /dev/block_device /dir
+
+This will also invoke the cleaner through the mount helper program
+(mount.nilfs2).
+
+Checkpoints and snapshots are managed by the following commands.
+Their manpages are included in the nilfs-utils package above.
+
+  lscp     list checkpoints or snapshots.
+  mkcp     make a checkpoint or a snapshot.
+  chcp     change an existing checkpoint to a snapshot or vice versa.
+  rmcp     invalidate specified checkpoint(s).
+
+To mount a snapshot,
+
+ # mount -t nilfs2 -r -o cp=<cno> /dev/block_device /snap_dir
+
+where <cno> is the checkpoint number of the snapshot.
+
+To unmount the NILFS2 mount point or snapshot, simply:
+
+ # umount /dir
+
+Then, the cleaner daemon is automatically shut down by the umount
+helper program (umount.nilfs2).
+
+Disk format
+===========
+
+A nilfs2 volume is equally divided into a number of segments except
+for the super block (SB) and segment #0.  A segment is the container
+of logs.  Each log is composed of summary information blocks, payload
+blocks, and an optional super root block (SR):
+
+   ______________________________________________________
+  | |SB| | Segment | Segment | Segment | ... | Segment | |
+  |_|__|_|____0____|____1____|____2____|_____|____N____|_|
+  0 +1K +4K       +8M       +16M      +24M  +(8MB x N)
+       .             .            (Typical offsets for 4KB-block)
+    .                  .
+  .______________________.
+  | log | log |... | log |
+  |__1__|__2__|____|__m__|
+        .       .
+      .               .
+    .                       .
+  .______________________________.
+  | Summary | Payload blocks  |SR|
+  |_blocks__|_________________|__|
+
+The payload blocks are organized per file, and each file consists of
+data blocks and B-tree node blocks:
+
+    |<---       File-A        --->|<---       File-B        --->|
+   _______________________________________________________________
+    | Data blocks | B-tree blocks | Data blocks | B-tree blocks | ...
+   _|_____________|_______________|_____________|_______________|_
+
+
+Since only the modified blocks are written in the log, it may have
+files without data blocks or B-tree node blocks.
+
+The organization of the blocks is recorded in the summary information
+blocks, which contains a header structure (nilfs_segment_summary), per
+file structures (nilfs_finfo), and per block structures (nilfs_binfo):
+
+  _________________________________________________________________________
+ | Summary | finfo | binfo | ... | binfo | finfo | binfo | ... | binfo |...
+ |_blocks__|___A___|_(A,1)_|_____|(A,Na)_|___B___|_(B,1)_|_____|(B,Nb)_|___
+
+
+The logs include regular files, directory files, symbolic link files
+and several meta data files.  The mata data files are the files used
+to maintain file system meta data.  The current version of NILFS2 uses
+the following meta data files:
+
+ 1) Inode file (ifile)             -- Stores on-disk inodes
+ 2) Checkpoint file (cpfile)       -- Stores checkpoints
+ 3) Segment usage file (sufile)    -- Stores allocation state of segments
+ 4) Data address translation file  -- Maps virtual block numbers to usual
+    (DAT)                             block numbers.  This file serves to
+                                      make on-disk blocks relocatable.
+
+The following figure shows a typical organization of the logs:
+
+  _________________________________________________________________________
+ | Summary | regular file | file  | ... | ifile | cpfile | sufile | DAT |SR|
+ |_blocks__|_or_directory_|_______|_____|_______|________|________|_____|__|
+
+
+To stride over segment boundaries, this sequence of files may be split
+into multiple logs.  The sequence of logs that should be treated as
+logically one log, is delimited with flags marked in the segment
+summary.  The recovery code of nilfs2 looks this boundary information
+to ensure atomicity of updates.
+
+The super root block is inserted for every checkpoints.  It includes
+three special inodes, inodes for the DAT, cpfile, and sufile.  Inodes
+of regular files, directories, symlinks and other special files, are
+included in the ifile.  The inode of ifile itself is included in the
+corresponding checkpoint entry in the cpfile.  Thus, the hierarchy
+among NILFS2 files can be depicted as follows:
+
+  Super block (SB)
+       |
+       v
+  Super root block (the latest cno=xx)
+       |-- DAT
+       |-- sufile
+       `-- cpfile
+              |-- ifile (cno=c1)
+              |-- ifile (cno=c2) ---- file (ino=i1)
+              :        :          |-- file (ino=i2)
+              `-- ifile (cno=xx)  |-- file (ino=i3)
+                                  :        :
+                                  `-- file (ino=yy)
+                                    ( regular file, directory, or symlink )
+
+For detail on the format of each file, please see include/linux/nilfs2_fs.h.
diff --git a/Documentation/hwmon/g760a b/Documentation/hwmon/g760a
new file mode 100644 (file)
index 0000000..e032eeb
--- /dev/null
@@ -0,0 +1,36 @@
+Kernel driver g760a
+===================
+
+Supported chips:
+  * Global Mixed-mode Technology Inc. G760A
+    Prefix: 'g760a'
+    Datasheet: Publicly available at the GMT website
+      http://www.gmt.com.tw/datasheet/g760a.pdf
+
+Author: Herbert Valerio Riedel <hvr@gnu.org>
+
+Description
+-----------
+
+The GMT G760A Fan Speed PWM Controller is connected directly to a fan
+and performs closed-loop control of the fan speed.
+
+The fan speed is programmed by setting the period via 'pwm1' of two
+consecutive speed pulses. The period is defined in terms of clock
+cycle counts of an assumed 32kHz clock source.
+
+Setting a period of 0 stops the fan; setting the period to 255 sets
+fan to maximum speed.
+
+The measured fan rotation speed returned via 'fan1_input' is derived
+from the measured speed pulse period by assuming again a 32kHz clock
+source and a 2 pulse-per-revolution fan.
+
+The 'alarms' file provides access to the two alarm bits provided by
+the G760A chip's status register: Bit 0 is set when the actual fan
+speed differs more than 20% with respect to the programmed fan speed;
+bit 1 is set when fan speed is below 1920 RPM.
+
+The g760a driver will not update its values more frequently than every
+other second; reading them more often will do no harm, but will return
+'old' values.
index 55b2852904a40f7a042c69fd3888423d02eb4d38..02c0e9341dd846975b1c18187deb51c55d379b10 100644 (file)
@@ -61,24 +61,28 @@ GigaSet 307x Device Driver
      ---------------------
 2.1. Modules
      -------
-     To get the device working, you have to load the proper kernel module. You
-     can do this using
-         modprobe modulename
-     where modulename is ser_gigaset (M101), usb_gigaset (M105), or
-     bas_gigaset (direct USB connection to the base).
+     For the devices to work, the proper kernel modules have to be loaded.
+     This normally happens automatically when the system detects the USB
+     device (base, M105) or when the line discipline is attached (M101). It
+     can also be triggered manually using the modprobe(8) command, for example
+     for troubleshooting or to pass module parameters.
 
      The module ser_gigaset provides a serial line discipline N_GIGASET_M101
-     which drives the device through the regular serial line driver. To use it,
-     run the Gigaset M101 daemon "gigasetm101d" (also available from
-     http://sourceforge.net/projects/gigaset307x/) with the device file of the
-     RS232 port to the M101 as an argument, for example:
-        gigasetm101d /dev/ttyS1
-     This will open the device file, set its line discipline to N_GIGASET_M101,
-     and then sleep in the background, keeping the device open so that the
-     line discipline remains active. To deactivate it, kill the daemon, for
-     example with
-        killall gigasetm101d
-     before disconnecting the device.
+     which drives the device through the regular serial line driver. It must
+     be attached to the serial line to which the M101 is connected with the
+     ldattach(8) command (requires util-linux-ng release 2.14 or later), for
+     example:
+        ldattach GIGASET_M101 /dev/ttyS1
+     This will open the device file, attach the line discipline to it, and
+     then sleep in the background, keeping the device open so that the line
+     discipline remains active. To deactivate it, kill the daemon, for example
+     with
+        killall ldattach
+     before disconnecting the device. To have this happen automatically at
+     system startup/shutdown on an LSB compatible system, create and activate
+     an appropriate LSB startup script /etc/init.d/gigaset. (The init name
+     'gigaset' is officially assigned to this project by LANANA.)
+     Alternatively, just add the 'ldattach' command line to /etc/rc.local.
 
 2.2. Device nodes for user space programs
      ------------------------------------
@@ -194,10 +198,11 @@ GigaSet 307x Device Driver
      operation (for wireless access to the base), but are needed for access
      to the M105's own configuration mode (registration to the base, baudrate
      and line format settings, device status queries) via the gigacontr
-     utility. Their use is disabled in the driver by default for safety
-     reasons but can be enabled by setting the kernel configuration option
-     "Support for undocumented USB requests" (GIGASET_UNDOCREQ) to "Y" and
-     recompiling.
+     utility. Their use is controlled by the kernel configuration option
+     "Support for undocumented USB requests" (CONFIG_GIGASET_UNDOCREQ). If you
+     encounter error code -ENOTTY when trying to use some features of the
+     M105, try setting that option to "y" via 'make {x,menu}config' and
+     recompiling the driver.
 
 
 3.   Troubleshooting
@@ -228,6 +233,13 @@ GigaSet 307x Device Driver
      Solution:
         Select Unimodem mode for all DECT data adapters. (see section 2.4.)
 
+     Problem:
+        You want to configure your USB DECT data adapter (M105) but gigacontr
+        reports an error: "/dev/ttyGU0: Inappropriate ioctl for device".
+     Solution:
+        Recompile the usb_gigaset driver with the kernel configuration option
+        CONFIG_GIGASET_UNDOCREQ set to 'y'. (see section 2.6.)
+
 3.2. Telling the driver to provide more information
      ----------------------------------------------
      Building the driver with the "Gigaset debugging" kernel configuration
index 48b3de90eb1eb03ceb1929e4228ae3a57debc526..1e7a769a10f97354a0b3aa15229e5606723a4cd8 100644 (file)
@@ -212,7 +212,9 @@ hit, Kprobes calls kp->pre_handler.  After the probed instruction
 is single-stepped, Kprobe calls kp->post_handler.  If a fault
 occurs during execution of kp->pre_handler or kp->post_handler,
 or during single-stepping of the probed instruction, Kprobes calls
-kp->fault_handler.  Any or all handlers can be NULL.
+kp->fault_handler.  Any or all handlers can be NULL. If kp->flags
+is set KPROBE_FLAG_DISABLED, that kp will be registered but disabled,
+so, it's handlers aren't hit until calling enable_kprobe(kp).
 
 NOTE:
 1. With the introduction of the "symbol_name" field to struct kprobe,
@@ -363,6 +365,26 @@ probes) in the specified array, they clear the addr field of those
 incorrect probes. However, other probes in the array are
 unregistered correctly.
 
+4.7 disable_*probe
+
+#include <linux/kprobes.h>
+int disable_kprobe(struct kprobe *kp);
+int disable_kretprobe(struct kretprobe *rp);
+int disable_jprobe(struct jprobe *jp);
+
+Temporarily disables the specified *probe. You can enable it again by using
+enable_*probe(). You must specify the probe which has been registered.
+
+4.8 enable_*probe
+
+#include <linux/kprobes.h>
+int enable_kprobe(struct kprobe *kp);
+int enable_kretprobe(struct kretprobe *rp);
+int enable_jprobe(struct jprobe *jp);
+
+Enables *probe which has been disabled by disable_*probe(). You must specify
+the probe which has been registered.
+
 5. Kprobes Features and Limitations
 
 Kprobes allows multiple probes at the same address.  Currently,
@@ -500,10 +522,14 @@ the probe. If the probed function belongs to a module, the module name
 is also specified. Following columns show probe status. If the probe is on
 a virtual address that is no longer valid (module init sections, module
 virtual addresses that correspond to modules that've been unloaded),
-such probes are marked with [GONE].
+such probes are marked with [GONE]. If the probe is temporarily disabled,
+such probes are marked with [DISABLED].
 
-/debug/kprobes/enabled: Turn kprobes ON/OFF
+/debug/kprobes/enabled: Turn kprobes ON/OFF forcibly.
 
-Provides a knob to globally turn registered kprobes ON or OFF. By default,
-all kprobes are enabled. By echoing "0" to this file, all registered probes
-will be disarmed, till such time a "1" is echoed to this file.
+Provides a knob to globally and forcibly turn registered kprobes ON or OFF.
+By default, all kprobes are enabled. By echoing "0" to this file, all
+registered probes will be disarmed, till such time a "1" is echoed to this
+file. Note that this knob just disarms and arms all kprobes and doesn't
+change each probe's disabling state. This means that disabled kprobes (marked
+[DISABLED]) will be not enabled if you turn ON all kprobes by this knob.
diff --git a/Documentation/sound/alsa/soc/jack.txt b/Documentation/sound/alsa/soc/jack.txt
new file mode 100644 (file)
index 0000000..fcf82a4
--- /dev/null
@@ -0,0 +1,71 @@
+ASoC jack detection
+===================
+
+ALSA has a standard API for representing physical jacks to user space,
+the kernel side of which can be seen in include/sound/jack.h.  ASoC
+provides a version of this API adding two additional features:
+
+ - It allows more than one jack detection method to work together on one
+   user visible jack.  In embedded systems it is common for multiple
+   to be present on a single jack but handled by separate bits of
+   hardware.
+
+ - Integration with DAPM, allowing DAPM endpoints to be updated
+   automatically based on the detected jack status (eg, turning off the
+   headphone outputs if no headphones are present).
+
+This is done by splitting the jacks up into three things working
+together: the jack itself represented by a struct snd_soc_jack, sets of
+snd_soc_jack_pins representing DAPM endpoints to update and blocks of
+code providing jack reporting mechanisms.
+
+For example, a system may have a stereo headset jack with two reporting
+mechanisms, one for the headphone and one for the microphone.  Some
+systems won't be able to use their speaker output while a headphone is
+connected and so will want to make sure to update both speaker and
+headphone when the headphone jack status changes.
+
+The jack - struct snd_soc_jack
+==============================
+
+This represents a physical jack on the system and is what is visible to
+user space.  The jack itself is completely passive, it is set up by the
+machine driver and updated by jack detection methods.
+
+Jacks are created by the machine driver calling snd_soc_jack_new().
+
+snd_soc_jack_pin
+================
+
+These represent a DAPM pin to update depending on some of the status
+bits supported by the jack.  Each snd_soc_jack has zero or more of these
+which are updated automatically.  They are created by the machine driver
+and associated with the jack using snd_soc_jack_add_pins().  The status
+of the endpoint may configured to be the opposite of the jack status if
+required (eg, enabling a built in microphone if a microphone is not
+connected via a jack).
+
+Jack detection methods
+======================
+
+Actual jack detection is done by code which is able to monitor some
+input to the system and update a jack by calling snd_soc_jack_report(),
+specifying a subset of bits to update.  The jack detection code should
+be set up by the machine driver, taking configuration for the jack to
+update and the set of things to report when the jack is connected.
+
+Often this is done based on the status of a GPIO - a handler for this is
+provided by the snd_soc_jack_add_gpio() function.  Other methods are
+also available, for example integrated into CODECs.  One example of
+CODEC integrated jack detection can be see in the WM8350 driver.
+
+Each jack may have multiple reporting mechanisms, though it will need at
+least one to be useful.
+
+Machine drivers
+===============
+
+These are all hooked together by the machine driver depending on the
+system hardware.  The machine driver will set up the snd_soc_jack and
+the list of pins to update then set up one or more jack detection
+mechanisms to update that jack based on their current status.
index 3197fc83bc51c0b42559be7c14c3d11471a1448b..97c4b3284329bebc051ba43840571784652306f4 100644 (file)
@@ -39,6 +39,8 @@ Currently, these files are in /proc/sys/vm:
 - nr_hugepages
 - nr_overcommit_hugepages
 - nr_pdflush_threads
+- nr_pdflush_threads_min
+- nr_pdflush_threads_max
 - nr_trim_pages         (only if CONFIG_MMU=n)
 - numa_zonelist_order
 - oom_dump_tasks
@@ -463,6 +465,32 @@ The default value is 0.
 
 ==============================================================
 
+nr_pdflush_threads_min
+
+This value controls the minimum number of pdflush threads.
+
+At boot time, the kernel will create and maintain 'nr_pdflush_threads_min'
+threads for the kernel's lifetime.
+
+The default value is 2.  The minimum value you can specify is 1, and
+the maximum value is the current setting of 'nr_pdflush_threads_max'.
+
+See 'nr_pdflush_threads_max' below for more information.
+
+==============================================================
+
+nr_pdflush_threads_max
+
+This value controls the maximum number of pdflush threads that can be
+created.  The pdflush algorithm will create a new pdflush thread (up to
+this maximum) if no pdflush threads have been available for >= 1 second.
+
+The default value is 8.  The minimum value you can specify is the
+current value of 'nr_pdflush_threads_min' and the
+maximum is 1000.
+
+==============================================================
+
 overcommit_memory:
 
 This value contains a flag that enables memory overcommitment.
diff --git a/Documentation/video4linux/pxa_camera.txt b/Documentation/video4linux/pxa_camera.txt
new file mode 100644 (file)
index 0000000..b1137f9
--- /dev/null
@@ -0,0 +1,125 @@
+                              PXA-Camera Host Driver
+                              ======================
+
+Constraints
+-----------
+  a) Image size for YUV422P format
+     All YUV422P images are enforced to have width x height % 16 = 0.
+     This is due to DMA constraints, which transfers only planes of 8 byte
+     multiples.
+
+
+Global video workflow
+---------------------
+  a) QCI stopped
+     Initialy, the QCI interface is stopped.
+     When a buffer is queued (pxa_videobuf_ops->buf_queue), the QCI starts.
+
+  b) QCI started
+     More buffers can be queued while the QCI is started without halting the
+     capture.  The new buffers are "appended" at the tail of the DMA chain, and
+     smoothly captured one frame after the other.
+
+     Once a buffer is filled in the QCI interface, it is marked as "DONE" and
+     removed from the active buffers list. It can be then requeud or dequeued by
+     userland application.
+
+     Once the last buffer is filled in, the QCI interface stops.
+
+
+DMA usage
+---------
+  a) DMA flow
+     - first buffer queued for capture
+       Once a first buffer is queued for capture, the QCI is started, but data
+       transfer is not started. On "End Of Frame" interrupt, the irq handler
+       starts the DMA chain.
+     - capture of one videobuffer
+       The DMA chain starts transfering data into videobuffer RAM pages.
+       When all pages are transfered, the DMA irq is raised on "ENDINTR" status
+     - finishing one videobuffer
+       The DMA irq handler marks the videobuffer as "done", and removes it from
+       the active running queue
+       Meanwhile, the next videobuffer (if there is one), is transfered by DMA
+     - finishing the last videobuffer
+       On the DMA irq of the last videobuffer, the QCI is stopped.
+
+  b) DMA prepared buffer will have this structure
+
+     +------------+-----+---------------+-----------------+
+     | desc-sg[0] | ... | desc-sg[last] | finisher/linker |
+     +------------+-----+---------------+-----------------+
+
+     This structure is pointed by dma->sg_cpu.
+     The descriptors are used as follows :
+      - desc-sg[i]: i-th descriptor, transfering the i-th sg
+        element to the video buffer scatter gather
+      - finisher: has ddadr=DADDR_STOP, dcmd=ENDIRQEN
+      - linker: has ddadr= desc-sg[0] of next video buffer, dcmd=0
+
+     For the next schema, let's assume d0=desc-sg[0] .. dN=desc-sg[N],
+     "f" stands for finisher and "l" for linker.
+     A typical running chain is :
+
+         Videobuffer 1         Videobuffer 2
+     +---------+----+---+  +----+----+----+---+
+     | d0 | .. | dN | l |  | d0 | .. | dN | f |
+     +---------+----+-|-+  ^----+----+----+---+
+                      |    |
+                      +----+
+
+     After the chaining is finished, the chain looks like :
+
+         Videobuffer 1         Videobuffer 2         Videobuffer 3
+     +---------+----+---+  +----+----+----+---+  +----+----+----+---+
+     | d0 | .. | dN | l |  | d0 | .. | dN | l |  | d0 | .. | dN | f |
+     +---------+----+-|-+  ^----+----+----+-|-+  ^----+----+----+---+
+                      |    |                |    |
+                      +----+                +----+
+                                           new_link
+
+  c) DMA hot chaining timeslice issue
+
+     As DMA chaining is done while DMA _is_ running, the linking may be done
+     while the DMA jumps from one Videobuffer to another. On the schema, that
+     would be a problem if the following sequence is encountered :
+
+      - DMA chain is Videobuffer1 + Videobuffer2
+      - pxa_videobuf_queue() is called to queue Videobuffer3
+      - DMA controller finishes Videobuffer2, and DMA stops
+      =>
+         Videobuffer 1         Videobuffer 2
+     +---------+----+---+  +----+----+----+---+
+     | d0 | .. | dN | l |  | d0 | .. | dN | f |
+     +---------+----+-|-+  ^----+----+----+-^-+
+                      |    |                |
+                      +----+                +-- DMA DDADR loads DDADR_STOP
+
+      - pxa_dma_add_tail_buf() is called, the Videobuffer2 "finisher" is
+        replaced by a "linker" to Videobuffer3 (creation of new_link)
+      - pxa_videobuf_queue() finishes
+      - the DMA irq handler is called, which terminates Videobuffer2
+      - Videobuffer3 capture is not scheduled on DMA chain (as it stopped !!!)
+
+         Videobuffer 1         Videobuffer 2         Videobuffer 3
+     +---------+----+---+  +----+----+----+---+  +----+----+----+---+
+     | d0 | .. | dN | l |  | d0 | .. | dN | l |  | d0 | .. | dN | f |
+     +---------+----+-|-+  ^----+----+----+-|-+  ^----+----+----+---+
+                      |    |                |    |
+                      +----+                +----+
+                                           new_link
+                                          DMA DDADR still is DDADR_STOP
+
+      - pxa_camera_check_link_miss() is called
+        This checks if the DMA is finished and a buffer is still on the
+        pcdev->capture list. If that's the case, the capture will be restarted,
+        and Videobuffer3 is scheduled on DMA chain.
+      - the DMA irq handler finishes
+
+     Note: if DMA stops just after pxa_camera_check_link_miss() reads DDADR()
+     value, we have the guarantee that the DMA irq handler will be called back
+     when the DMA will finish the buffer, and pxa_camera_check_link_miss() will
+     be called again, to reschedule Videobuffer3.
+
+--
+Author: Robert Jarzmik <robert.jarzmik@free.fr>
index a31177390e551a5873a28121901dc904bebacee0..854808b67faed03f209291ae2947be5f051e8af6 100644 (file)
@@ -90,7 +90,7 @@ up before calling v4l2_device_register then it will be untouched. If dev is
 NULL, then you *must* setup v4l2_dev->name before calling v4l2_device_register.
 
 The first 'dev' argument is normally the struct device pointer of a pci_dev,
-usb_device or platform_device. It is rare for dev to be NULL, but it happens
+usb_interface or platform_device. It is rare for dev to be NULL, but it happens
 with ISA devices or when one device creates multiple PCI devices, thus making
 it impossible to associate v4l2_dev with a particular parent.
 
@@ -351,17 +351,6 @@ And this to go from an i2c_client to a v4l2_subdev struct:
 
        struct v4l2_subdev *sd = i2c_get_clientdata(client);
 
-Finally you need to make a command function to make driver->command()
-call the right subdev_ops functions:
-
-static int subdev_command(struct i2c_client *client, unsigned cmd, void *arg)
-{
-       return v4l2_subdev_command(i2c_get_clientdata(client), cmd, arg);
-}
-
-If driver->command is never used then you can leave this out. Eventually the
-driver->command usage should be removed from v4l.
-
 Make sure to call v4l2_device_unregister_subdev(sd) when the remove() callback
 is called. This will unregister the sub-device from the bridge driver. It is
 safe to call this even if the sub-device was never registered.
@@ -375,14 +364,12 @@ from the remove() callback ensures that this is always done correctly.
 
 The bridge driver also has some helper functions it can use:
 
-struct v4l2_subdev *sd = v4l2_i2c_new_subdev(adapter, "module_foo", "chipid", 0x36);
+struct v4l2_subdev *sd = v4l2_i2c_new_subdev(v4l2_dev, adapter,
+              "module_foo", "chipid", 0x36);
 
 This loads the given module (can be NULL if no module needs to be loaded) and
 calls i2c_new_device() with the given i2c_adapter and chip/address arguments.
-If all goes well, then it registers the subdev with the v4l2_device. It gets
-the v4l2_device by calling i2c_get_adapdata(adapter), so you should make sure
-to call i2c_set_adapdata(adapter, v4l2_device) when you setup the i2c_adapter
-in your driver.
+If all goes well, then it registers the subdev with the v4l2_device.
 
 You can also use v4l2_i2c_new_probed_subdev() which is very similar to
 v4l2_i2c_new_subdev(), except that it has an array of possible I2C addresses
index 9673cd28a69b3049f1c9f7b5b3eda9aa279404d1..c3b215970f7b439fd83cf1dc2009979c3ce0a84f 100644 (file)
@@ -1544,7 +1544,6 @@ S:        Maintained
 DVB SUBSYSTEM AND DRIVERS
 P:     LinuxTV.org Project
 M:     linux-media@vger.kernel.org
-L:     linux-dvb@linuxtv.org (subscription required)
 W:     http://linuxtv.org/
 T:     git kernel.org:/pub/scm/linux/kernel/git/mchehab/linux-2.6.git
 S:     Maintained
@@ -3245,6 +3244,13 @@ M:       andi@lisas.de
 L:     netdev@vger.kernel.org
 S:     Maintained
 
+NILFS2 FILESYSTEM
+P:     KONISHI Ryusuke
+M:     konishi.ryusuke@lab.ntt.co.jp
+L:     users@nilfs.org
+W:     http://www.nilfs.org/en/
+S:     Supported
+
 NINJA SCSI-3 / NINJA SCSI-32Bi (16bit/CardBus) PCMCIA SCSI HOST ADAPTER DRIVER
 P:     YOKOTA Hiroshi
 M:     yokota@netlab.is.tsukuba.ac.jp
index 38b6a9ce2a93cc8caecaa2d471e30c3198ce4421..0b97a528902b34d81ac93968e60fcf4ea10acd30 100644 (file)
@@ -118,7 +118,7 @@ static struct resource ide_resources[] = {
        },
 };
 
-static u64 ide_dma_mask = DMA_32BIT_MASK;
+static u64 ide_dma_mask = DMA_BIT_MASK(32);
 
 static struct platform_device ide_dev = {
        .name           = "palm_bk3710",
@@ -127,7 +127,7 @@ static struct platform_device ide_dev = {
        .num_resources  = ARRAY_SIZE(ide_resources),
        .dev = {
                .dma_mask               = &ide_dma_mask,
-               .coherent_dma_mask      = DMA_32BIT_MASK,
+               .coherent_dma_mask      = DMA_BIT_MASK(32),
        },
 };
 
index 69680784448a20a259f96ef059e2c4c375b0ea17..2429b79f6da2edf38926dd360dd6d72211f1ee1f 100644 (file)
@@ -64,7 +64,7 @@ static struct resource usb_resources[] = {
        },
 };
 
-static u64 usb_dmamask = DMA_32BIT_MASK;
+static u64 usb_dmamask = DMA_BIT_MASK(32);
 
 static struct platform_device usb_dev = {
        .name           = "musb_hdrc",
@@ -72,7 +72,7 @@ static struct platform_device usb_dev = {
        .dev = {
                .platform_data          = &usb_data,
                .dma_mask               = &usb_dmamask,
-               .coherent_dma_mask      = DMA_32BIT_MASK,
+               .coherent_dma_mask      = DMA_BIT_MASK(32),
        },
        .resource       = usb_resources,
        .num_resources  = ARRAY_SIZE(usb_resources),
index cfd4d2e6dacd6d1f7fb235c84c98552c99347a0e..bee42c609df6c6db3c491e9826fc5c4d5973225d 100644 (file)
@@ -307,7 +307,7 @@ static struct resource iop13xx_adma_2_resources[] = {
        }
 };
 
-static u64 iop13xx_adma_dmamask = DMA_64BIT_MASK;
+static u64 iop13xx_adma_dmamask = DMA_BIT_MASK(64);
 static struct iop_adma_platform_data iop13xx_adma_0_data = {
        .hw_id = 0,
        .pool_size = PAGE_SIZE,
@@ -331,7 +331,7 @@ static struct platform_device iop13xx_adma_0_channel = {
        .resource = iop13xx_adma_0_resources,
        .dev = {
                .dma_mask = &iop13xx_adma_dmamask,
-               .coherent_dma_mask = DMA_64BIT_MASK,
+               .coherent_dma_mask = DMA_BIT_MASK(64),
                .platform_data = (void *) &iop13xx_adma_0_data,
        },
 };
@@ -343,7 +343,7 @@ static struct platform_device iop13xx_adma_1_channel = {
        .resource = iop13xx_adma_1_resources,
        .dev = {
                .dma_mask = &iop13xx_adma_dmamask,
-               .coherent_dma_mask = DMA_64BIT_MASK,
+               .coherent_dma_mask = DMA_BIT_MASK(64),
                .platform_data = (void *) &iop13xx_adma_1_data,
        },
 };
@@ -355,7 +355,7 @@ static struct platform_device iop13xx_adma_2_channel = {
        .resource = iop13xx_adma_2_resources,
        .dev = {
                .dma_mask = &iop13xx_adma_dmamask,
-               .coherent_dma_mask = DMA_64BIT_MASK,
+               .coherent_dma_mask = DMA_BIT_MASK(64),
                .platform_data = (void *) &iop13xx_adma_2_data,
        },
 };
index c6af1e1bee32e5a844d13686eabf02ade6f10c57..6fdad7a0425af0e1a6565b1fc3a45aab5f27aa35 100644 (file)
@@ -151,7 +151,7 @@ static struct resource iop13xx_tpmi_3_resources[] = {
        }
 };
 
-u64 iop13xx_tpmi_mask = DMA_64BIT_MASK;
+u64 iop13xx_tpmi_mask = DMA_BIT_MASK(64);
 static struct platform_device iop13xx_tpmi_0_device = {
        .name = "iop-tpmi",
        .id = 0,
@@ -159,7 +159,7 @@ static struct platform_device iop13xx_tpmi_0_device = {
        .resource = iop13xx_tpmi_0_resources,
        .dev = {
                .dma_mask          = &iop13xx_tpmi_mask,
-               .coherent_dma_mask = DMA_64BIT_MASK,
+               .coherent_dma_mask = DMA_BIT_MASK(64),
        },
 };
 
@@ -170,7 +170,7 @@ static struct platform_device iop13xx_tpmi_1_device = {
        .resource = iop13xx_tpmi_1_resources,
        .dev = {
                .dma_mask          = &iop13xx_tpmi_mask,
-               .coherent_dma_mask = DMA_64BIT_MASK,
+               .coherent_dma_mask = DMA_BIT_MASK(64),
        },
 };
 
@@ -181,7 +181,7 @@ static struct platform_device iop13xx_tpmi_2_device = {
        .resource = iop13xx_tpmi_2_resources,
        .dev = {
                .dma_mask          = &iop13xx_tpmi_mask,
-               .coherent_dma_mask = DMA_64BIT_MASK,
+               .coherent_dma_mask = DMA_BIT_MASK(64),
        },
 };
 
@@ -192,7 +192,7 @@ static struct platform_device iop13xx_tpmi_3_device = {
        .resource = iop13xx_tpmi_3_resources,
        .dev = {
                .dma_mask          = &iop13xx_tpmi_mask,
-               .coherent_dma_mask = DMA_64BIT_MASK,
+               .coherent_dma_mask = DMA_BIT_MASK(64),
        },
 };
 
index 3d2fae84651231dcd835c017c9630250ab66884a..16dc9ea0839398ea3c040bc636a991842fbba6cb 100644 (file)
@@ -508,7 +508,7 @@ static struct mv_xor_platform_shared_data kirkwood_xor_shared_data = {
        .dram           = &kirkwood_mbus_dram_info,
 };
 
-static u64 kirkwood_xor_dmamask = DMA_32BIT_MASK;
+static u64 kirkwood_xor_dmamask = DMA_BIT_MASK(32);
 
 
 /*****************************************************************************
@@ -559,7 +559,7 @@ static struct platform_device kirkwood_xor00_channel = {
        .resource       = kirkwood_xor00_resources,
        .dev            = {
                .dma_mask               = &kirkwood_xor_dmamask,
-               .coherent_dma_mask      = DMA_64BIT_MASK,
+               .coherent_dma_mask      = DMA_BIT_MASK(64),
                .platform_data          = (void *)&kirkwood_xor00_data,
        },
 };
@@ -585,7 +585,7 @@ static struct platform_device kirkwood_xor01_channel = {
        .resource       = kirkwood_xor01_resources,
        .dev            = {
                .dma_mask               = &kirkwood_xor_dmamask,
-               .coherent_dma_mask      = DMA_64BIT_MASK,
+               .coherent_dma_mask      = DMA_BIT_MASK(64),
                .platform_data          = (void *)&kirkwood_xor01_data,
        },
 };
@@ -657,7 +657,7 @@ static struct platform_device kirkwood_xor10_channel = {
        .resource       = kirkwood_xor10_resources,
        .dev            = {
                .dma_mask               = &kirkwood_xor_dmamask,
-               .coherent_dma_mask      = DMA_64BIT_MASK,
+               .coherent_dma_mask      = DMA_BIT_MASK(64),
                .platform_data          = (void *)&kirkwood_xor10_data,
        },
 };
@@ -683,7 +683,7 @@ static struct platform_device kirkwood_xor11_channel = {
        .resource       = kirkwood_xor11_resources,
        .dev            = {
                .dma_mask               = &kirkwood_xor_dmamask,
-               .coherent_dma_mask      = DMA_64BIT_MASK,
+               .coherent_dma_mask      = DMA_BIT_MASK(64),
                .platform_data          = (void *)&kirkwood_xor11_data,
        },
 };
index 82f1309568ef92c950fc37f847c8f2c01c1b1f61..7f86fe073ec67232632ed3b84a025f96f90c3d53 100644 (file)
@@ -6,6 +6,9 @@
 
 obj-y                  += generic.o clock.o devices.o
 
+# Support for CMOS sensor interface
+obj-$(CONFIG_MX1_VIDEO)        += ksym_mx1.o mx1_camera_fiq.o
+
 # Specific board support
 obj-$(CONFIG_ARCH_MX1ADS) += mx1ads.o
 obj-$(CONFIG_MACH_SCB9328) += scb9328.o
\ No newline at end of file
index 97f42d96d7a14d3d2f7055498ee68396b4635153..76d1ffb4807980fadade7ca3c905d30a86af9523 100644 (file)
@@ -44,7 +44,7 @@ static struct resource imx_csi_resources[] = {
 static u64 imx_csi_dmamask = 0xffffffffUL;
 
 struct platform_device imx_csi_device = {
-       .name           = "imx-csi",
+       .name           = "mx1-camera",
        .id             = 0, /* This is used to put cameras on this interface */
        .dev            = {
                .dma_mask = &imx_csi_dmamask,
diff --git a/arch/arm/mach-mx1/ksym_mx1.c b/arch/arm/mach-mx1/ksym_mx1.c
new file mode 100644 (file)
index 0000000..b09ee12
--- /dev/null
@@ -0,0 +1,18 @@
+/*
+ * Exported ksyms of ARCH_MX1
+ *
+ * Copyright (C) 2008, Darius Augulis <augulis.darius@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/platform_device.h>
+#include <linux/module.h>
+
+#include <mach/mx1_camera.h>
+
+/* IMX camera FIQ handler */
+EXPORT_SYMBOL(mx1_camera_sof_fiq_start);
+EXPORT_SYMBOL(mx1_camera_sof_fiq_end);
diff --git a/arch/arm/mach-mx1/mx1_camera_fiq.S b/arch/arm/mach-mx1/mx1_camera_fiq.S
new file mode 100644 (file)
index 0000000..9c69aa6
--- /dev/null
@@ -0,0 +1,35 @@
+/*
+ *  Copyright (C) 2008 Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
+ *
+ *  Based on linux/arch/arm/lib/floppydma.S
+ *      Copyright (C) 1995, 1996 Russell King
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/linkage.h>
+#include <asm/assembler.h>
+
+               .text
+               .global mx1_camera_sof_fiq_end
+               .global mx1_camera_sof_fiq_start
+mx1_camera_sof_fiq_start:
+               @ enable dma
+               ldr     r12, [r9]
+               orr     r12, r12, #0x00000001
+               str     r12, [r9]
+               @ unmask DMA interrupt
+               ldr     r12, [r8]
+               bic     r12, r12, r13
+               str     r12, [r8]
+               @ disable SOF interrupt
+               ldr     r12, [r10]
+               bic     r12, r12, #0x00010000
+               str     r12, [r10]
+               @ clear SOF flag
+               mov     r12, #0x00010000
+               str     r12, [r11]
+               @ return from FIQ
+               subs    pc, lr, #4
+mx1_camera_sof_fiq_end:
index ca46f4801c3dbc22b8846789af23f42a464b1a33..9957a11533a4471fc7a03837417bf740e8765ae9 100644 (file)
@@ -533,7 +533,7 @@ static struct clk_lookup lookups[] __initdata = {
        _REGISTER_CLOCK(NULL, "kpp", kpp_clk)
        _REGISTER_CLOCK("fsl-usb2-udc", "usb", usb_clk1)
        _REGISTER_CLOCK("fsl-usb2-udc", "usb_ahb", usb_clk2)
-       _REGISTER_CLOCK("mx3-camera.0", "csi", csi_clk)
+       _REGISTER_CLOCK("mx3-camera.0", NULL, csi_clk)
        _REGISTER_CLOCK("imx-uart.0", NULL, uart1_clk)
        _REGISTER_CLOCK("imx-uart.1", NULL, uart2_clk)
        _REGISTER_CLOCK("imx-uart.2", NULL, uart3_clk)
index 68cc3efae56736a47894c4fd304e55d3f4126012..6af99ddabdfb92e0159ba96252654549dc04b9ce 100644 (file)
@@ -463,7 +463,7 @@ static struct platform_device orion5x_xor_shared = {
        .resource       = orion5x_xor_shared_resources,
 };
 
-static u64 orion5x_xor_dmamask = DMA_32BIT_MASK;
+static u64 orion5x_xor_dmamask = DMA_BIT_MASK(32);
 
 static struct resource orion5x_xor0_resources[] = {
        [0] = {
@@ -486,7 +486,7 @@ static struct platform_device orion5x_xor0_channel = {
        .resource       = orion5x_xor0_resources,
        .dev            = {
                .dma_mask               = &orion5x_xor_dmamask,
-               .coherent_dma_mask      = DMA_64BIT_MASK,
+               .coherent_dma_mask      = DMA_BIT_MASK(64),
                .platform_data          = (void *)&orion5x_xor0_data,
        },
 };
@@ -512,7 +512,7 @@ static struct platform_device orion5x_xor1_channel = {
        .resource       = orion5x_xor1_resources,
        .dev            = {
                .dma_mask               = &orion5x_xor_dmamask,
-               .coherent_dma_mask      = DMA_64BIT_MASK,
+               .coherent_dma_mask      = DMA_BIT_MASK(64),
                .platform_data          = (void *)&orion5x_xor1_data,
        },
 };
index 2206cb61a9f918060d2416adea78fa83b1cfeae9..b87cecd9bbdc08fda122ed5842d7403af4be0f73 100644 (file)
@@ -38,6 +38,7 @@ struct pxa2xx_spi_chip {
        u8 dma_burst_size;
        u32 timeout;
        u8 enable_loopback;
+       int gpio_cs;
        void (*cs_control)(u32 command);
 };
 
index 01bd76725b920040a6b7ea1687d1c84770f32f54..4389c160f7d08f920d884b3f974ea2474d44fa09 100644 (file)
@@ -409,8 +409,7 @@ static struct platform_device bast_sio = {
 static struct s3c2410_platform_i2c __initdata bast_i2c_info = {
        .flags          = 0,
        .slave_addr     = 0x10,
-       .bus_freq       = 100*1000,
-       .max_freq       = 130*1000,
+       .frequency      = 100*1000,
 };
 
 /* Asix AX88796 10/100 ethernet controller */
index 05a5e877b49b73b7ccfa20734544b8f1f089e2c7..2b83f87077100b310f8a9502663c75451bacaca0 100644 (file)
@@ -340,8 +340,7 @@ static struct platform_device *n35_devices[] __initdata = {
 static struct s3c2410_platform_i2c n30_i2ccfg = {
        .flags          = 0,
        .slave_addr     = 0x10,
-       .bus_freq       = 10*1000,
-       .max_freq       = 10*1000,
+       .frequency      = 10*1000,
 };
 
 /* Lots of hardcoded stuff, but it sets up the hardware in a useful
index 72c266aee1410ab73ab085b65c1dbec1c00919aa..332bd3263eafd18134791a95b6fd041b564370e6 100644 (file)
@@ -453,8 +453,7 @@ static struct spi_board_info __initdata jive_spi_devs[] = {
 /* I2C bus and device configuration. */
 
 static struct s3c2410_platform_i2c jive_i2c_cfg __initdata = {
-       .max_freq       = 80 * 1000,
-       .bus_freq       = 50 * 1000,
+       .frequency      = 80 * 1000,
        .flags          = S3C_IICFLG_FILTER,
        .sda_delay      = 2,
 };
index f724208216199ef8ae3b1e5228b70c7d48ba7f60..3c127aabe214e4bb8d7a2ff00c37061836a88cff 100644 (file)
@@ -119,7 +119,7 @@ static struct resource iop3xx_aau_resources[] = {
        }
 };
 
-static u64 iop3xx_adma_dmamask = DMA_32BIT_MASK;
+static u64 iop3xx_adma_dmamask = DMA_BIT_MASK(32);
 
 static struct iop_adma_platform_data iop3xx_dma_0_data = {
        .hw_id = DMA0_ID,
@@ -143,7 +143,7 @@ struct platform_device iop3xx_dma_0_channel = {
        .resource = iop3xx_dma_0_resources,
        .dev = {
                .dma_mask = &iop3xx_adma_dmamask,
-               .coherent_dma_mask = DMA_64BIT_MASK,
+               .coherent_dma_mask = DMA_BIT_MASK(64),
                .platform_data = (void *) &iop3xx_dma_0_data,
        },
 };
@@ -155,7 +155,7 @@ struct platform_device iop3xx_dma_1_channel = {
        .resource = iop3xx_dma_1_resources,
        .dev = {
                .dma_mask = &iop3xx_adma_dmamask,
-               .coherent_dma_mask = DMA_64BIT_MASK,
+               .coherent_dma_mask = DMA_BIT_MASK(64),
                .platform_data = (void *) &iop3xx_dma_1_data,
        },
 };
@@ -167,7 +167,7 @@ struct platform_device iop3xx_aau_channel = {
        .resource = iop3xx_aau_resources,
        .dev = {
                .dma_mask = &iop3xx_adma_dmamask,
-               .coherent_dma_mask = DMA_64BIT_MASK,
+               .coherent_dma_mask = DMA_BIT_MASK(64),
                .platform_data = (void *) &iop3xx_aau_data,
        },
 };
diff --git a/arch/arm/plat-mxc/include/mach/i2c.h b/arch/arm/plat-mxc/include/mach/i2c.h
new file mode 100644 (file)
index 0000000..4a5dc5c
--- /dev/null
@@ -0,0 +1,25 @@
+/*
+ * i2c.h - i.MX I2C driver header file
+ *
+ * Copyright (c) 2008, Darius Augulis <augulis.darius@gmail.com>
+ *
+ * This file is released under the GPLv2
+ */
+
+#ifndef __ASM_ARCH_I2C_H_
+#define __ASM_ARCH_I2C_H_
+
+/**
+ * struct imxi2c_platform_data - structure of platform data for MXC I2C driver
+ * @init:      Initialise gpio's and other board specific things
+ * @exit:      Free everything initialised by @init
+ * @bitrate:   Bus speed measured in Hz
+ *
+ **/
+struct imxi2c_platform_data {
+       int (*init)(struct device *dev);
+       void (*exit)(struct device *dev);
+       int bitrate;
+};
+
+#endif /* __ASM_ARCH_I2C_H_ */
index e0783e619580a3e39e0dcb9ed87e21b2cd5365e8..eca37d09f3f8cee771db68b8d32dbb2a6ef5cfc1 100644 (file)
 #define PHYS_OFFSET            UL(0x80000000)
 #endif
 
+#if defined(CONFIG_MX1_VIDEO)
+/*
+ * Increase size of DMA-consistent memory region.
+ * This is required for i.MX camera driver to capture at least four VGA frames.
+ */
+#define CONSISTENT_DMA_SIZE SZ_4M
+#endif /* CONFIG_MX1_VIDEO */
+
 #endif /* __ASM_ARCH_MXC_MEMORY_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/mx1_camera.h b/arch/arm/plat-mxc/include/mach/mx1_camera.h
new file mode 100644 (file)
index 0000000..4fd6c70
--- /dev/null
@@ -0,0 +1,35 @@
+/*
+ * mx1_camera.h - i.MX1/i.MXL camera driver header file
+ *
+ * Copyright (c) 2008, Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
+ * Copyright (C) 2009, Darius Augulis <augulis.darius@gmail.com>
+ *
+ * Based on PXA camera.h file:
+ * Copyright (C) 2003, Intel Corporation
+ * Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __ASM_ARCH_CAMERA_H_
+#define __ASM_ARCH_CAMERA_H_
+
+#define MX1_CAMERA_DATA_HIGH   1
+#define MX1_CAMERA_PCLK_RISING 2
+#define MX1_CAMERA_VSYNC_HIGH  4
+
+extern unsigned char mx1_camera_sof_fiq_start, mx1_camera_sof_fiq_end;
+
+/**
+ * struct mx1_camera_pdata - i.MX1/i.MXL camera platform data
+ * @mclk_10khz:        master clock frequency in 10kHz units
+ * @flags:     MX1 camera platform flags
+ */
+struct mx1_camera_pdata {
+       unsigned long mclk_10khz;
+       unsigned long flags;
+};
+
+#endif /* __ASM_ARCH_CAMERA_H_ */
index fe327074037ea05d4d996cbe52be7ab9a2deae78..428372868fbba66408c1fc2d290de9d138399397 100644 (file)
@@ -1,6 +1,6 @@
 /* linux/arch/arm/plat-s3c/dev-i2c0.c
  *
- * Copyright 2008 Simtec Electronics
+ * Copyright 2008,2009 Simtec Electronics
  *     Ben Dooks <ben@simtec.co.uk>
  *     http://armlinux.simtec.co.uk/
  *
@@ -50,9 +50,8 @@ struct platform_device s3c_device_i2c0 = {
 static struct s3c2410_platform_i2c default_i2c_data0 __initdata = {
        .flags          = 0,
        .slave_addr     = 0x10,
-       .bus_freq       = 100*1000,
-       .max_freq       = 400*1000,
-       .sda_delay      = S3C2410_IICLC_SDA_DELAY5 | S3C2410_IICLC_FILTER_ON,
+       .frequency      = 100*1000,
+       .sda_delay      = 100,
 };
 
 void __init s3c_i2c0_set_platdata(struct s3c2410_platform_i2c *pd)
index 2387fbf57af6da984b49dce28fcf08a55a6afee5..8349c462788c9e2f41eb0977b2f491f79bbb6f9a 100644 (file)
@@ -1,6 +1,6 @@
 /* linux/arch/arm/plat-s3c/dev-i2c1.c
  *
- * Copyright 2008 Simtec Electronics
+ * Copyright 2008,2009 Simtec Electronics
  *     Ben Dooks <ben@simtec.co.uk>
  *     http://armlinux.simtec.co.uk/
  *
@@ -47,9 +47,8 @@ static struct s3c2410_platform_i2c default_i2c_data1 __initdata = {
        .flags          = 0,
        .bus_num        = 1,
        .slave_addr     = 0x10,
-       .bus_freq       = 100*1000,
-       .max_freq       = 400*1000,
-       .sda_delay      = S3C2410_IICLC_SDA_DELAY5 | S3C2410_IICLC_FILTER_ON,
+       .frequency      = 100*1000,
+       .sda_delay      = 100,
 };
 
 void __init s3c_i2c1_set_platdata(struct s3c2410_platform_i2c *pd)
index dc1dfcb9bc6c63034e0a42750ab334ed72ed06d0..67450f115748641da0f8b889d4d19da185b13cd4 100644 (file)
@@ -1,9 +1,9 @@
-/* arch/arm/mach-s3c2410/include/mach/iic.h
+/* arch/arm/plat-s3c/include/plat/iic.h
  *
- * Copyright (c) 2004 Simtec Electronics
+ * Copyright 2004,2009 Simtec Electronics
  *     Ben Dooks <ben@simtec.co.uk>
  *
- * S3C2410 - I2C Controller platfrom_device info
+ * S3C - I2C Controller platform_device info
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
 
 #define S3C_IICFLG_FILTER      (1<<0)  /* enable s3c2440 filter */
 
-/* Notes:
- *     1) All frequencies are expressed in Hz
- *     2) A value of zero is `do not care`
-*/
-
+/**
+ *     struct s3c2410_platform_i2c - Platform data for s3c I2C.
+ *     @bus_num: The bus number to use (if possible).
+ *     @flags: Any flags for the I2C bus (E.g. S3C_IICFLK_FILTER).
+ *     @slave_addr: The I2C address for the slave device (if enabled).
+ *     @frequency: The desired frequency in Hz of the bus.  This is
+ *                  guaranteed to not be exceeded.  If the caller does
+ *                  not care, use zero and the driver will select a
+ *                  useful default.
+ *     @sda_delay: The delay (in ns) applied to SDA edges.
+ *     @cfg_gpio: A callback to configure the pins for I2C operation.
+ */
 struct s3c2410_platform_i2c {
-       int             bus_num;        /* bus number to use */
+       int             bus_num;
        unsigned int    flags;
-       unsigned int    slave_addr;     /* slave address for controller */
-       unsigned long   bus_freq;       /* standard bus frequency */
-       unsigned long   max_freq;       /* max frequency for the bus */
-       unsigned long   min_freq;       /* min frequency for the bus */
-       unsigned int    sda_delay;      /* pclks (s3c2440 only) */
+       unsigned int    slave_addr;
+       unsigned long   frequency;
+       unsigned int    sda_delay;
 
        void    (*cfg_gpio)(struct platform_device *dev);
 };
index 559bbcb03f9b696cb0589d649a803c8356772668..776c3cb9b6e410cfd7299149d49e667b8cb5f2b6 100644 (file)
@@ -280,13 +280,13 @@ static struct resource hh_fpga0_resource[] = {
        },
 };
 
-static u64 hh_fpga0_dma_mask = DMA_32BIT_MASK;
+static u64 hh_fpga0_dma_mask = DMA_BIT_MASK(32);
 static struct platform_device hh_fpga0_device = {
        .name           = "hh_fpga",
        .id             = 0,
        .dev            = {
                .dma_mask = &hh_fpga0_dma_mask,
-               .coherent_dma_mask = DMA_32BIT_MASK,
+               .coherent_dma_mask = DMA_BIT_MASK(32),
        },
        .resource       = hh_fpga0_resource,
        .num_resources  = ARRAY_SIZE(hh_fpga0_resource),
index 7cc6537983275d1bea9c6a183619e37a9c8392cc..eb9d4dc2e86dff84df6cc0905505d1efb97cfb59 100644 (file)
  * don't ... tc, smc, pio, rtc, watchdog, pwm, ps2, and more.
  */
 #define DEFINE_DEV(_name, _id)                                 \
-static u64 _name##_id##_dma_mask = DMA_32BIT_MASK;             \
+static u64 _name##_id##_dma_mask = DMA_BIT_MASK(32);           \
 static struct platform_device _name##_id##_device = {          \
        .name           = #_name,                               \
        .id             = _id,                                  \
        .dev            = {                                     \
                .dma_mask = &_name##_id##_dma_mask,             \
-               .coherent_dma_mask = DMA_32BIT_MASK,            \
+               .coherent_dma_mask = DMA_BIT_MASK(32),          \
        },                                                      \
        .resource       = _name##_id##_resource,                \
        .num_resources  = ARRAY_SIZE(_name##_id##_resource),    \
 }
 #define DEFINE_DEV_DATA(_name, _id)                            \
-static u64 _name##_id##_dma_mask = DMA_32BIT_MASK;             \
+static u64 _name##_id##_dma_mask = DMA_BIT_MASK(32);           \
 static struct platform_device _name##_id##_device = {          \
        .name           = #_name,                               \
        .id             = _id,                                  \
        .dev            = {                                     \
                .dma_mask = &_name##_id##_dma_mask,             \
                .platform_data  = &_name##_id##_data,           \
-               .coherent_dma_mask = DMA_32BIT_MASK,            \
+               .coherent_dma_mask = DMA_BIT_MASK(32),          \
        },                                                      \
        .resource       = _name##_id##_resource,                \
        .num_resources  = ARRAY_SIZE(_name##_id##_resource),    \
index 0292d58f9362e84e3b337c575a54b0b1ff6d9cad..aaeb4df10d578c6128aa6ef13a6ffb41b91e6a25 100644 (file)
@@ -11,6 +11,8 @@
 #ifndef _SPI_CHANNEL_H_
 #define _SPI_CHANNEL_H_
 
+#define MIN_SPI_BAUD_VAL       2
+
 #define SPI_READ              0
 #define SPI_WRITE             1
 
@@ -122,6 +124,9 @@ struct bfin5xx_spi_chip {
        u8 bits_per_word;
        u8 cs_change_per_word;
        u16 cs_chg_udelay; /* Some devices require 16-bit delays */
+       u32 cs_gpio;
+       /* Value to send if no TX value is supplied, usually 0x0 or 0xFFFF */
+       u16 idle_tx_val;
 };
 
 #endif /* _SPI_CHANNEL_H_ */
index e21c1c3e4ec7e8129b87989c81e49f9f4001a6a0..0fb2ce5d840e14ae73ba9058d19e4da9f3bd0733 100644 (file)
@@ -53,9 +53,9 @@
 #define UART_SET_DLAB(uart)     do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0)
 #define UART_CLEAR_DLAB(uart)   do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0)
 
-#define UART_GET_CTS(x) gpio_get_value(x->cts_pin)
-#define UART_SET_RTS(x) gpio_set_value(x->rts_pin, 1)
-#define UART_CLEAR_RTS(x) gpio_set_value(x->rts_pin, 0)
+#define UART_GET_CTS(x) (!gpio_get_value(x->cts_pin))
+#define UART_DISABLE_RTS(x) gpio_set_value(x->rts_pin, 1)
+#define UART_ENABLE_RTS(x) gpio_set_value(x->rts_pin, 0)
 #define UART_ENABLE_INTS(x, v) UART_PUT_IER(x, v)
 #define UART_DISABLE_INTS(x) UART_PUT_IER(x, 0)
 
@@ -87,6 +87,7 @@
 struct bfin_serial_port {
        struct uart_port port;
        unsigned int old_status;
+       int status_irq;
        unsigned int lsr;
 #ifdef CONFIG_SERIAL_BFIN_DMA
        int tx_done;
@@ -125,6 +126,7 @@ static inline void UART_CLEAR_LSR(struct bfin_serial_port *uart)
 struct bfin_serial_res {
        unsigned long uart_base_addr;
        int uart_irq;
+       int uart_status_irq;
 #ifdef CONFIG_SERIAL_BFIN_DMA
        unsigned int uart_tx_dma_channel;
        unsigned int uart_rx_dma_channel;
@@ -140,6 +142,7 @@ struct bfin_serial_res bfin_serial_resource[] = {
        {
         0xFFC00400,
         IRQ_UART0_RX,
+        IRQ_UART0_ERROR,
 #ifdef CONFIG_SERIAL_BFIN_DMA
         CH_UART0_TX,
         CH_UART0_RX,
@@ -154,6 +157,7 @@ struct bfin_serial_res bfin_serial_resource[] = {
        {
         0xFFC02000,
         IRQ_UART1_RX,
+        IRQ_UART1_ERROR,
 #ifdef CONFIG_SERIAL_BFIN_DMA
         CH_UART1_TX,
         CH_UART1_RX,
index e8c41fd842b5d818d70e83cc4ce78fda0288f01b..a625659dd67f4470d0ff310e833362ddd6ff3ebe 100644 (file)
@@ -53,9 +53,9 @@
 #define UART_SET_DLAB(uart)     do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0)
 #define UART_CLEAR_DLAB(uart)   do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0)
 
-#define UART_GET_CTS(x) gpio_get_value(x->cts_pin)
-#define UART_SET_RTS(x) gpio_set_value(x->rts_pin, 1)
-#define UART_CLEAR_RTS(x) gpio_set_value(x->rts_pin, 0)
+#define UART_GET_CTS(x) (!gpio_get_value(x->cts_pin))
+#define UART_DISABLE_RTS(x) gpio_set_value(x->rts_pin, 1)
+#define UART_ENABLE_RTS(x) gpio_set_value(x->rts_pin, 0)
 #define UART_ENABLE_INTS(x, v) UART_PUT_IER(x, v)
 #define UART_DISABLE_INTS(x) UART_PUT_IER(x, 0)
 
@@ -87,6 +87,7 @@
 struct bfin_serial_port {
        struct uart_port port;
        unsigned int old_status;
+       int status_irq;
        unsigned int lsr;
 #ifdef CONFIG_SERIAL_BFIN_DMA
        int tx_done;
@@ -125,6 +126,7 @@ static inline void UART_CLEAR_LSR(struct bfin_serial_port *uart)
 struct bfin_serial_res {
        unsigned long uart_base_addr;
        int uart_irq;
+       int uart_status_irq;
 #ifdef CONFIG_SERIAL_BFIN_DMA
        unsigned int uart_tx_dma_channel;
        unsigned int uart_rx_dma_channel;
@@ -140,6 +142,7 @@ struct bfin_serial_res bfin_serial_resource[] = {
        {
         0xFFC00400,
         IRQ_UART0_RX,
+        IRQ_UART0_ERROR,
 #ifdef CONFIG_SERIAL_BFIN_DMA
         CH_UART0_TX,
         CH_UART0_RX,
@@ -154,6 +157,7 @@ struct bfin_serial_res bfin_serial_resource[] = {
        {
         0xFFC02000,
         IRQ_UART1_RX,
+        IRQ_UART1_ERROR,
 #ifdef CONFIG_SERIAL_BFIN_DMA
         CH_UART1_TX,
         CH_UART1_RX,
@@ -167,29 +171,3 @@ struct bfin_serial_res bfin_serial_resource[] = {
 };
 
 #define DRIVER_NAME "bfin-uart"
-
-static void bfin_serial_hw_init(struct bfin_serial_port *uart)
-{
-
-#ifdef CONFIG_SERIAL_BFIN_UART0
-       peripheral_request(P_UART0_TX, DRIVER_NAME);
-       peripheral_request(P_UART0_RX, DRIVER_NAME);
-#endif
-
-#ifdef CONFIG_SERIAL_BFIN_UART1
-       peripheral_request(P_UART1_TX, DRIVER_NAME);
-       peripheral_request(P_UART1_RX, DRIVER_NAME);
-#endif
-
-#ifdef CONFIG_SERIAL_BFIN_CTSRTS
-       if (uart->cts_pin >= 0) {
-               gpio_request(uart->cts_pin, DRIVER_NAME);
-               gpio_direction_input(uart->cts_pin);
-       }
-
-       if (uart->rts_pin >= 0) {
-               gpio_request(uart->rts_pin, DRIVER_NAME);
-               gpio_direction_output(uart->rts_pin, 0);
-       }
-#endif
-}
index 5f517f53b0fd8d17fb8f9ab104269ffa51290f09..a3789d7ccf8c233c4fc182be215ba7585742c7c8 100644 (file)
@@ -53,9 +53,9 @@
 #define UART_SET_DLAB(uart)     do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0)
 #define UART_CLEAR_DLAB(uart)   do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0)
 
-#define UART_GET_CTS(x) gpio_get_value(x->cts_pin)
-#define UART_SET_RTS(x) gpio_set_value(x->rts_pin, 1)
-#define UART_CLEAR_RTS(x) gpio_set_value(x->rts_pin, 0)
+#define UART_GET_CTS(x) (!gpio_get_value(x->cts_pin))
+#define UART_DISABLE_RTS(x) gpio_set_value(x->rts_pin, 1)
+#define UART_ENABLE_RTS(x) gpio_set_value(x->rts_pin, 0)
 #define UART_ENABLE_INTS(x, v) UART_PUT_IER(x, v)
 #define UART_DISABLE_INTS(x) UART_PUT_IER(x, 0)
 
@@ -74,6 +74,7 @@
 struct bfin_serial_port {
         struct uart_port        port;
         unsigned int            old_status;
+       int                     status_irq;
        unsigned int lsr;
 #ifdef CONFIG_SERIAL_BFIN_DMA
        int                     tx_done;
@@ -116,6 +117,7 @@ static inline void UART_CLEAR_LSR(struct bfin_serial_port *uart)
 struct bfin_serial_res {
        unsigned long   uart_base_addr;
        int             uart_irq;
+       int             uart_status_irq;
 #ifdef CONFIG_SERIAL_BFIN_DMA
        unsigned int    uart_tx_dma_channel;
        unsigned int    uart_rx_dma_channel;
@@ -130,6 +132,7 @@ struct bfin_serial_res bfin_serial_resource[] = {
        {
        0xFFC00400,
        IRQ_UART_RX,
+       IRQ_UART_ERROR,
 #ifdef CONFIG_SERIAL_BFIN_DMA
        CH_UART_TX,
        CH_UART_RX,
@@ -142,23 +145,3 @@ struct bfin_serial_res bfin_serial_resource[] = {
 };
 
 #define DRIVER_NAME "bfin-uart"
-
-static void bfin_serial_hw_init(struct bfin_serial_port *uart)
-{
-
-#ifdef CONFIG_SERIAL_BFIN_UART0
-       peripheral_request(P_UART0_TX, DRIVER_NAME);
-       peripheral_request(P_UART0_RX, DRIVER_NAME);
-#endif
-
-#ifdef CONFIG_SERIAL_BFIN_CTSRTS
-       if (uart->cts_pin >= 0) {
-               gpio_request(uart->cts_pin, DRIVER_NAME);
-               gpio_direction_input(uart->cts_pin);
-       }
-       if (uart->rts_pin >= 0) {
-               gpio_request(uart->rts_pin, DRIVER_NAME);
-               gpio_direction_output(uart->rts_pin, 0);
-       }
-#endif
-}
index 9e34700844a294278921a36fe7ca411fd9c3a61f..b86662fb9de76fad4cf16b0ee3a46e5d81db4d32 100644 (file)
@@ -53,9 +53,9 @@
 #define UART_SET_DLAB(uart)     do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0)
 #define UART_CLEAR_DLAB(uart)   do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0)
 
-#define UART_GET_CTS(x) gpio_get_value(x->cts_pin)
-#define UART_SET_RTS(x) gpio_set_value(x->rts_pin, 1)
-#define UART_CLEAR_RTS(x) gpio_set_value(x->rts_pin, 0)
+#define UART_GET_CTS(x) (!gpio_get_value(x->cts_pin))
+#define UART_DISABLE_RTS(x) gpio_set_value(x->rts_pin, 1)
+#define UART_ENABLE_RTS(x) gpio_set_value(x->rts_pin, 0)
 #define UART_ENABLE_INTS(x, v) UART_PUT_IER(x, v)
 #define UART_DISABLE_INTS(x) UART_PUT_IER(x, 0)
 
@@ -87,6 +87,7 @@
 struct bfin_serial_port {
         struct uart_port        port;
         unsigned int            old_status;
+       int                     status_irq;
        unsigned int lsr;
 #ifdef CONFIG_SERIAL_BFIN_DMA
        int                     tx_done;
@@ -99,7 +100,6 @@ struct bfin_serial_port {
        struct work_struct      tx_dma_workqueue;
 #endif
 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
-       struct timer_list       cts_timer;
        int             cts_pin;
        int             rts_pin;
 #endif
@@ -125,6 +125,7 @@ static inline void UART_CLEAR_LSR(struct bfin_serial_port *uart)
 struct bfin_serial_res {
        unsigned long   uart_base_addr;
        int             uart_irq;
+       int             uart_status_irq;
 #ifdef CONFIG_SERIAL_BFIN_DMA
        unsigned int    uart_tx_dma_channel;
        unsigned int    uart_rx_dma_channel;
@@ -140,6 +141,7 @@ struct bfin_serial_res bfin_serial_resource[] = {
        {
        0xFFC00400,
        IRQ_UART0_RX,
+       IRQ_UART0_ERROR,
 #ifdef CONFIG_SERIAL_BFIN_DMA
        CH_UART0_TX,
        CH_UART0_RX,
@@ -154,6 +156,7 @@ struct bfin_serial_res bfin_serial_resource[] = {
        {
        0xFFC02000,
        IRQ_UART1_RX,
+       IRQ_UART1_ERROR,
 #ifdef CONFIG_SERIAL_BFIN_DMA
        CH_UART1_TX,
        CH_UART1_RX,
@@ -167,29 +170,3 @@ struct bfin_serial_res bfin_serial_resource[] = {
 };
 
 #define DRIVER_NAME "bfin-uart"
-
-static void bfin_serial_hw_init(struct bfin_serial_port *uart)
-{
-
-#ifdef CONFIG_SERIAL_BFIN_UART0
-       peripheral_request(P_UART0_TX, DRIVER_NAME);
-       peripheral_request(P_UART0_RX, DRIVER_NAME);
-#endif
-
-#ifdef CONFIG_SERIAL_BFIN_UART1
-       peripheral_request(P_UART1_TX, DRIVER_NAME);
-       peripheral_request(P_UART1_RX, DRIVER_NAME);
-#endif
-
-#ifdef CONFIG_SERIAL_BFIN_CTSRTS
-       if (uart->cts_pin >= 0) {
-               gpio_request(uart->cts_pin, DRIVER_NAME);
-               gpio_direction_input(uart->cts_pin);
-       }
-
-       if (uart->rts_pin >= 0) {
-               gpio_request(uart->rts_pin, DRIVER_NAME);
-               gpio_direction_output(uart->rts_pin, 0);
-       }
-#endif
-}
index 3c2811ebecddd520fec44339c7bba04460ae52ca..c536551eb4b8ff64dd35194d9270e32014aa8704 100644 (file)
@@ -53,9 +53,9 @@
 #define UART_SET_DLAB(uart)     do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0)
 #define UART_CLEAR_DLAB(uart)   do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0)
 
-#define UART_GET_CTS(x) gpio_get_value(x->cts_pin)
-#define UART_SET_RTS(x) gpio_set_value(x->rts_pin, 1)
-#define UART_CLEAR_RTS(x) gpio_set_value(x->rts_pin, 0)
+#define UART_GET_CTS(x) (!gpio_get_value(x->cts_pin))
+#define UART_DISABLE_RTS(x) gpio_set_value(x->rts_pin, 1)
+#define UART_ENABLE_RTS(x) gpio_set_value(x->rts_pin, 0)
 #define UART_ENABLE_INTS(x, v) UART_PUT_IER(x, v)
 #define UART_DISABLE_INTS(x) UART_PUT_IER(x, 0)
 
@@ -87,6 +87,7 @@
 struct bfin_serial_port {
        struct uart_port        port;
        unsigned int            old_status;
+       int                     status_irq;
        unsigned int lsr;
 #ifdef CONFIG_SERIAL_BFIN_DMA
        int                     tx_done;
@@ -125,6 +126,7 @@ static inline void UART_CLEAR_LSR(struct bfin_serial_port *uart)
 struct bfin_serial_res {
        unsigned long   uart_base_addr;
        int             uart_irq;
+       int             uart_status_irq;
 #ifdef CONFIG_SERIAL_BFIN_DMA
        unsigned int    uart_tx_dma_channel;
        unsigned int    uart_rx_dma_channel;
@@ -140,6 +142,7 @@ struct bfin_serial_res bfin_serial_resource[] = {
        {
        0xFFC00400,
        IRQ_UART0_RX,
+       IRQ_UART0_ERROR,
 #ifdef CONFIG_SERIAL_BFIN_DMA
        CH_UART0_TX,
        CH_UART0_RX,
@@ -154,6 +157,7 @@ struct bfin_serial_res bfin_serial_resource[] = {
        {
        0xFFC02000,
        IRQ_UART1_RX,
+       IRQ_UART1_ERROR,
 #ifdef CONFIG_SERIAL_BFIN_DMA
        CH_UART1_TX,
        CH_UART1_RX,
index c05e79cba257b0870629ed815bca9efe752bc809..2d1b5fa3cca04dece182ba61115674b3d868cb4f 100644 (file)
 #define UART_PUT_CHAR(uart,v)   bfin_write16(((uart)->port.membase + OFFSET_THR),v)
 #define UART_PUT_DLL(uart,v)    bfin_write16(((uart)->port.membase + OFFSET_DLL),v)
 #define UART_SET_IER(uart,v)    bfin_write16(((uart)->port.membase + OFFSET_IER_SET),v)
-#define UART_CLEAR_IER(uart,v)    bfin_write16(((uart)->port.membase + OFFSET_IER_CLEAR),v)
+#define UART_CLEAR_IER(uart,v)  bfin_write16(((uart)->port.membase + OFFSET_IER_CLEAR),v)
 #define UART_PUT_DLH(uart,v)    bfin_write16(((uart)->port.membase + OFFSET_DLH),v)
 #define UART_PUT_LSR(uart,v)   bfin_write16(((uart)->port.membase + OFFSET_LSR),v)
 #define UART_PUT_LCR(uart,v)    bfin_write16(((uart)->port.membase + OFFSET_LCR),v)
 #define UART_CLEAR_LSR(uart)    bfin_write16(((uart)->port.membase + OFFSET_LSR), -1)
 #define UART_PUT_GCTL(uart,v)   bfin_write16(((uart)->port.membase + OFFSET_GCTL),v)
 #define UART_PUT_MCR(uart,v)    bfin_write16(((uart)->port.membase + OFFSET_MCR),v)
+#define UART_CLEAR_SCTS(uart)   bfin_write16(((uart)->port.membase + OFFSET_MSR),SCTS)
 
 #define UART_SET_DLAB(uart)     /* MMRs not muxed on BF54x */
 #define UART_CLEAR_DLAB(uart)   /* MMRs not muxed on BF54x */
 
 #define UART_GET_CTS(x) (UART_GET_MSR(x) & CTS)
-#define UART_SET_RTS(x) (UART_PUT_MCR(x, UART_GET_MCR(x) | MRTS))
-#define UART_CLEAR_RTS(x) (UART_PUT_MCR(x, UART_GET_MCR(x) & ~MRTS))
+#define UART_DISABLE_RTS(x) UART_PUT_MCR(x, UART_GET_MCR(x) & ~(ARTS|MRTS))
+#define UART_ENABLE_RTS(x) UART_PUT_MCR(x, UART_GET_MCR(x) | MRTS | ARTS)
 #define UART_ENABLE_INTS(x, v) UART_SET_IER(x, v)
 #define UART_DISABLE_INTS(x) UART_CLEAR_IER(x, 0xF)
 
-#if defined(CONFIG_BFIN_UART0_CTSRTS) || defined(CONFIG_BFIN_UART2_CTSRTS)
-# define CONFIG_SERIAL_BFIN_CTSRTS
-
-# ifndef CONFIG_UART0_CTS_PIN
-#  define CONFIG_UART0_CTS_PIN -1
-# endif
-
-# ifndef CONFIG_UART0_RTS_PIN
-#  define CONFIG_UART0_RTS_PIN -1
-# endif
-
-# ifndef CONFIG_UART2_CTS_PIN
-#  define CONFIG_UART2_CTS_PIN -1
-# endif
-
-# ifndef CONFIG_UART2_RTS_PIN
-#  define CONFIG_UART2_RTS_PIN -1
-# endif
+#if defined(CONFIG_BFIN_UART0_CTSRTS) || defined(CONFIG_BFIN_UART1_CTSRTS) || \
+       defined(CONFIG_BFIN_UART2_CTSRTS) || defined(CONFIG_BFIN_UART3_CTSRTS)
+# define CONFIG_SERIAL_BFIN_HARD_CTSRTS
 #endif
 
 #define BFIN_UART_TX_FIFO_SIZE 2
@@ -91,6 +77,7 @@
 struct bfin_serial_port {
         struct uart_port        port;
         unsigned int            old_status;
+       int                     status_irq;
 #ifdef CONFIG_SERIAL_BFIN_DMA
        int                     tx_done;
        int                     tx_count;
@@ -101,23 +88,24 @@ struct bfin_serial_port {
        unsigned int            rx_dma_channel;
        struct work_struct      tx_dma_workqueue;
 #endif
-#ifdef CONFIG_SERIAL_BFIN_CTSRTS
-       struct timer_list       cts_timer;
-       int             cts_pin;
-       int             rts_pin;
+#ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
+       int                     scts;
+       int                     cts_pin;
+       int                     rts_pin;
 #endif
 };
 
 struct bfin_serial_res {
        unsigned long   uart_base_addr;
        int             uart_irq;
+       int             uart_status_irq;
 #ifdef CONFIG_SERIAL_BFIN_DMA
        unsigned int    uart_tx_dma_channel;
        unsigned int    uart_rx_dma_channel;
 #endif
-#ifdef CONFIG_SERIAL_BFIN_CTSRTS
-       int     uart_cts_pin;
-       int     uart_rts_pin;
+#ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
+       int             uart_cts_pin;
+       int             uart_rts_pin;
 #endif
 };
 
@@ -126,13 +114,14 @@ struct bfin_serial_res bfin_serial_resource[] = {
        {
        0xFFC00400,
        IRQ_UART0_RX,
+       IRQ_UART0_ERROR,
 #ifdef CONFIG_SERIAL_BFIN_DMA
        CH_UART0_TX,
        CH_UART0_RX,
 #endif
-#ifdef CONFIG_SERIAL_BFIN_CTSRTS
-       CONFIG_UART0_CTS_PIN,
-       CONFIG_UART0_RTS_PIN,
+#ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
+       0,
+       0,
 #endif
        },
 #endif
@@ -140,13 +129,14 @@ struct bfin_serial_res bfin_serial_resource[] = {
        {
        0xFFC02000,
        IRQ_UART1_RX,
+       IRQ_UART1_ERROR,
 #ifdef CONFIG_SERIAL_BFIN_DMA
        CH_UART1_TX,
        CH_UART1_RX,
 #endif
-#ifdef CONFIG_SERIAL_BFIN_CTSRTS
-       0,
-       0,
+#ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
+       GPIO_PE10,
+       GPIO_PE9,
 #endif
        },
 #endif
@@ -154,13 +144,14 @@ struct bfin_serial_res bfin_serial_resource[] = {
        {
        0xFFC02100,
        IRQ_UART2_RX,
+       IRQ_UART2_ERROR,
 #ifdef CONFIG_SERIAL_BFIN_DMA
        CH_UART2_TX,
        CH_UART2_RX,
 #endif
-#ifdef CONFIG_SERIAL_BFIN_CTSRTS
-       CONFIG_UART2_CTS_PIN,
-       CONFIG_UART2_RTS_PIN,
+#ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
+       0,
+       0,
 #endif
        },
 #endif
@@ -168,61 +159,17 @@ struct bfin_serial_res bfin_serial_resource[] = {
        {
        0xFFC03100,
        IRQ_UART3_RX,
+       IRQ_UART3_ERROR,
 #ifdef CONFIG_SERIAL_BFIN_DMA
        CH_UART3_TX,
        CH_UART3_RX,
 #endif
-#ifdef CONFIG_SERIAL_BFIN_CTSRTS
-       0,
-       0,
+#ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
+       GPIO_PB3,
+       GPIO_PB2,
 #endif
        },
 #endif
 };
 
 #define DRIVER_NAME "bfin-uart"
-
-static void bfin_serial_hw_init(struct bfin_serial_port *uart)
-{
-#ifdef CONFIG_SERIAL_BFIN_UART0
-       peripheral_request(P_UART0_TX, DRIVER_NAME);
-       peripheral_request(P_UART0_RX, DRIVER_NAME);
-#endif
-
-#ifdef CONFIG_SERIAL_BFIN_UART1
-       peripheral_request(P_UART1_TX, DRIVER_NAME);
-       peripheral_request(P_UART1_RX, DRIVER_NAME);
-
-#ifdef CONFIG_BFIN_UART1_CTSRTS
-       peripheral_request(P_UART1_RTS, DRIVER_NAME);
-       peripheral_request(P_UART1_CTS, DRIVER_NAME);
-#endif
-#endif
-
-#ifdef CONFIG_SERIAL_BFIN_UART2
-       peripheral_request(P_UART2_TX, DRIVER_NAME);
-       peripheral_request(P_UART2_RX, DRIVER_NAME);
-#endif
-
-#ifdef CONFIG_SERIAL_BFIN_UART3
-       peripheral_request(P_UART3_TX, DRIVER_NAME);
-       peripheral_request(P_UART3_RX, DRIVER_NAME);
-
-#ifdef CONFIG_BFIN_UART3_CTSRTS
-       peripheral_request(P_UART3_RTS, DRIVER_NAME);
-       peripheral_request(P_UART3_CTS, DRIVER_NAME);
-#endif
-#endif
-       SSYNC();
-#ifdef CONFIG_SERIAL_BFIN_CTSRTS
-       if (uart->cts_pin >= 0) {
-               gpio_request(uart->cts_pin, DRIVER_NAME);
-               gpio_direction_input(uart->cts_pin);
-       }
-
-       if (uart->rts_pin >= 0) {
-               gpio_request(uart->rts_pin, DRIVER_NAME);
-               gpio_direction_output(uart->rts_pin, 0);
-       }
-#endif
-}
index ca8c5f6452093c7c8d9247906e35a8b1baf4fb9b..a1b50878553fbfc462e63a869a5ab7be1c190722 100644 (file)
@@ -53,9 +53,9 @@
 #define UART_SET_DLAB(uart)     do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0)
 #define UART_CLEAR_DLAB(uart)   do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0)
 
-#define UART_GET_CTS(x) gpio_get_value(x->cts_pin)
-#define UART_SET_RTS(x) gpio_set_value(x->rts_pin, 1)
-#define UART_CLEAR_RTS(x) gpio_set_value(x->rts_pin, 0)
+#define UART_GET_CTS(x) (!gpio_get_value(x->cts_pin))
+#define UART_DISABLE_RTS(x) gpio_set_value(x->rts_pin, 1)
+#define UART_ENABLE_RTS(x) gpio_set_value(x->rts_pin, 0)
 #define UART_ENABLE_INTS(x, v) UART_PUT_IER(x, v)
 #define UART_DISABLE_INTS(x) UART_PUT_IER(x, 0)
 
@@ -74,6 +74,7 @@
 struct bfin_serial_port {
         struct uart_port        port;
         unsigned int            old_status;
+       int                     status_irq;
        unsigned int lsr;
 #ifdef CONFIG_SERIAL_BFIN_DMA
        int                     tx_done;
@@ -116,6 +117,7 @@ static inline void UART_CLEAR_LSR(struct bfin_serial_port *uart)
 struct bfin_serial_res {
        unsigned long   uart_base_addr;
        int             uart_irq;
+       int             uart_status_irq;
 #ifdef CONFIG_SERIAL_BFIN_DMA
        unsigned int    uart_tx_dma_channel;
        unsigned int    uart_rx_dma_channel;
@@ -130,6 +132,7 @@ struct bfin_serial_res bfin_serial_resource[] = {
        {
        0xFFC00400,
        IRQ_UART_RX,
+       IRQ_UART_ERROR,
 #ifdef CONFIG_SERIAL_BFIN_DMA
        CH_UART_TX,
        CH_UART_RX,
@@ -142,23 +145,3 @@ struct bfin_serial_res bfin_serial_resource[] = {
 };
 
 #define DRIVER_NAME "bfin-uart"
-
-static void bfin_serial_hw_init(struct bfin_serial_port *uart)
-{
-
-#ifdef CONFIG_SERIAL_BFIN_UART0
-       peripheral_request(P_UART0_TX, DRIVER_NAME);
-       peripheral_request(P_UART0_RX, DRIVER_NAME);
-#endif
-
-#ifdef CONFIG_SERIAL_BFIN_CTSRTS
-       if (uart->cts_pin >= 0) {
-               gpio_request(uart->cts_pin, DRIVER_NAME);
-               gpio_direction_input(uart->cts_pin);
-       }
-       if (uart->rts_pin >= 0) {
-               gpio_request(uart->rts_pin, DRIVER_NAME);
-               gpio_direction_output(uart->rts_pin, 0);
-       }
-#endif
-}
index 4f4e52531fa0bc7a07433caace232cdd4f053145..35bbc181598a710477c1e81fc099d3662ca13d99 100644 (file)
@@ -74,8 +74,9 @@
 #define TIOCSHAYESESP   0x545F  /* Set Hayes ESP configuration */
 #define FIOQSIZE       0x5460
 
-#define TIOCSERSETRS485 0x5461  /* enable rs-485 */
-#define TIOCSERWRRS485  0x5462  /* write rs-485 */
+#define TIOCSERSETRS485        0x5461  /* enable rs-485 (deprecated) */
+#define TIOCSERWRRS485 0x5462  /* write rs-485 */
+#define TIOCSRS485     0x5463  /* enable rs-485 */
 
 /* Used for packet mode */
 #define TIOCPKT_DATA            0
index c331c51b0c2b4cec0ac59df248220b32e351c7ce..ad40f9fbcb8ae7459a43985bc3b9748f30c19022 100644 (file)
@@ -1,15 +1,13 @@
 /* RS-485 structures */
 
-/* RS-485 support */
-/* Used with ioctl() TIOCSERSETRS485 */
+/* Used with ioctl() TIOCSERSETRS485 for backward compatibility!
+ * XXX: Do not use it for new code!
+ */
 struct rs485_control {
         unsigned short rts_on_send;
         unsigned short rts_after_sent;
         unsigned long delay_rts_before_send;
         unsigned short enabled;
-#ifdef __KERNEL__
-        int disable_serial_loopback;
-#endif
 };
 
 /* Used with ioctl() TIOCSERWRRS485 */
index b0124e6c2e416d7273fe274a9b36d7d7fb65d093..1265109f4ce3b485ac68623a889cd5a5621c079b 100644 (file)
@@ -4,6 +4,7 @@
 #include <asm/termbits.h>
 #include <asm/ioctls.h>
 #include <asm/rs485.h>
+#include <linux/serial.h>
 
 struct winsize {
        unsigned short ws_row;
index e4cb443bb988feffbf93840dd023e319d205e7ca..eb987386f69138fe2eb2e829735b25784a763ecf 100644 (file)
@@ -37,7 +37,7 @@ int force_iommu __read_mostly;
    to i386. */
 struct device fallback_dev = {
        .init_name = "fallback device",
-       .coherent_dma_mask = DMA_32BIT_MASK,
+       .coherent_dma_mask = DMA_BIT_MASK(32),
        .dma_mask = &fallback_dev.coherent_dma_mask,
 };
 
@@ -75,7 +75,7 @@ int iommu_dma_supported(struct device *dev, u64 mask)
        /* Copied from i386. Doesn't make much sense, because it will
           only work for pci_alloc_coherent.
           The caller just has to use GFP_DMA in this case. */
-       if (mask < DMA_24BIT_MASK)
+       if (mask < DMA_BIT_MASK(24))
                return 0;
 
        /* Tell the device to use SAC when IOMMU force is on.  This
@@ -90,7 +90,7 @@ int iommu_dma_supported(struct device *dev, u64 mask)
           SAC for these.  Assume all masks <= 40 bits are of this
           type. Normally this doesn't make any difference, but gives
           more gentle handling of IOMMU overflow. */
-       if (iommu_sac_force && (mask >= DMA_40BIT_MASK)) {
+       if (iommu_sac_force && (mask >= DMA_BIT_MASK(40))) {
                dev_info(dev, "Force SAC with mask %lx\n", mask);
                return 0;
        }
index 8c130e8f00e1d3aee8052eb3141b8e33eb3ec3bd..d876423e4e755465d8249f4aeb01610490f62cff 100644 (file)
@@ -349,7 +349,7 @@ static int sn_dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
 
 u64 sn_dma_get_required_mask(struct device *dev)
 {
-       return DMA_64BIT_MASK;
+       return DMA_BIT_MASK(64);
 }
 EXPORT_SYMBOL_GPL(sn_dma_get_required_mask);
 
index 5c76c6448e04c41d9c82e5e3eec4544f5f218f02..117f99f70649547f137a4442021444b2e8ef73fd 100644 (file)
@@ -80,14 +80,14 @@ static struct resource au1xxx_usb_ohci_resources[] = {
 };
 
 /* The dmamask must be set for OHCI to work */
-static u64 ohci_dmamask = DMA_32BIT_MASK;
+static u64 ohci_dmamask = DMA_BIT_MASK(32);
 
 static struct platform_device au1xxx_usb_ohci_device = {
        .name           = "au1xxx-ohci",
        .id             = 0,
        .dev = {
                .dma_mask               = &ohci_dmamask,
-               .coherent_dma_mask      = DMA_32BIT_MASK,
+               .coherent_dma_mask      = DMA_BIT_MASK(32),
        },
        .num_resources  = ARRAY_SIZE(au1xxx_usb_ohci_resources),
        .resource       = au1xxx_usb_ohci_resources,
@@ -109,14 +109,14 @@ static struct resource au1100_lcd_resources[] = {
        }
 };
 
-static u64 au1100_lcd_dmamask = DMA_32BIT_MASK;
+static u64 au1100_lcd_dmamask = DMA_BIT_MASK(32);
 
 static struct platform_device au1100_lcd_device = {
        .name           = "au1100-lcd",
        .id             = 0,
        .dev = {
                .dma_mask               = &au1100_lcd_dmamask,
-               .coherent_dma_mask      = DMA_32BIT_MASK,
+               .coherent_dma_mask      = DMA_BIT_MASK(32),
        },
        .num_resources  = ARRAY_SIZE(au1100_lcd_resources),
        .resource       = au1100_lcd_resources,
@@ -138,14 +138,14 @@ static struct resource au1xxx_usb_ehci_resources[] = {
        },
 };
 
-static u64 ehci_dmamask = DMA_32BIT_MASK;
+static u64 ehci_dmamask = DMA_BIT_MASK(32);
 
 static struct platform_device au1xxx_usb_ehci_device = {
        .name           = "au1xxx-ehci",
        .id             = 0,
        .dev = {
                .dma_mask               = &ehci_dmamask,
-               .coherent_dma_mask      = DMA_32BIT_MASK,
+               .coherent_dma_mask      = DMA_BIT_MASK(32),
        },
        .num_resources  = ARRAY_SIZE(au1xxx_usb_ehci_resources),
        .resource       = au1xxx_usb_ehci_resources,
@@ -165,14 +165,14 @@ static struct resource au1xxx_usb_gdt_resources[] = {
        },
 };
 
-static u64 udc_dmamask = DMA_32BIT_MASK;
+static u64 udc_dmamask = DMA_BIT_MASK(32);
 
 static struct platform_device au1xxx_usb_gdt_device = {
        .name           = "au1xxx-udc",
        .id             = 0,
        .dev = {
                .dma_mask               = &udc_dmamask,
-               .coherent_dma_mask      = DMA_32BIT_MASK,
+               .coherent_dma_mask      = DMA_BIT_MASK(32),
        },
        .num_resources  = ARRAY_SIZE(au1xxx_usb_gdt_resources),
        .resource       = au1xxx_usb_gdt_resources,
@@ -192,14 +192,14 @@ static struct resource au1xxx_usb_otg_resources[] = {
        },
 };
 
-static u64 uoc_dmamask = DMA_32BIT_MASK;
+static u64 uoc_dmamask = DMA_BIT_MASK(32);
 
 static struct platform_device au1xxx_usb_otg_device = {
        .name           = "au1xxx-uoc",
        .id             = 0,
        .dev = {
                .dma_mask               = &uoc_dmamask,
-               .coherent_dma_mask      = DMA_32BIT_MASK,
+               .coherent_dma_mask      = DMA_BIT_MASK(32),
        },
        .num_resources  = ARRAY_SIZE(au1xxx_usb_otg_resources),
        .resource       = au1xxx_usb_otg_resources,
@@ -218,20 +218,20 @@ static struct resource au1200_lcd_resources[] = {
        }
 };
 
-static u64 au1200_lcd_dmamask = DMA_32BIT_MASK;
+static u64 au1200_lcd_dmamask = DMA_BIT_MASK(32);
 
 static struct platform_device au1200_lcd_device = {
        .name           = "au1200-lcd",
        .id             = 0,
        .dev = {
                .dma_mask               = &au1200_lcd_dmamask,
-               .coherent_dma_mask      = DMA_32BIT_MASK,
+               .coherent_dma_mask      = DMA_BIT_MASK(32),
        },
        .num_resources  = ARRAY_SIZE(au1200_lcd_resources),
        .resource       = au1200_lcd_resources,
 };
 
-static u64 au1xxx_mmc_dmamask =  DMA_32BIT_MASK;
+static u64 au1xxx_mmc_dmamask =  DMA_BIT_MASK(32);
 
 extern struct au1xmmc_platform_data au1xmmc_platdata[2];
 
@@ -263,7 +263,7 @@ static struct platform_device au1200_mmc0_device = {
        .id = 0,
        .dev = {
                .dma_mask               = &au1xxx_mmc_dmamask,
-               .coherent_dma_mask      = DMA_32BIT_MASK,
+               .coherent_dma_mask      = DMA_BIT_MASK(32),
                .platform_data          = &au1xmmc_platdata[0],
        },
        .num_resources  = ARRAY_SIZE(au1200_mmc0_resources),
@@ -299,7 +299,7 @@ static struct platform_device au1200_mmc1_device = {
        .id = 1,
        .dev = {
                .dma_mask               = &au1xxx_mmc_dmamask,
-               .coherent_dma_mask      = DMA_32BIT_MASK,
+               .coherent_dma_mask      = DMA_BIT_MASK(32),
                .platform_data          = &au1xmmc_platdata[1],
        },
        .num_resources  = ARRAY_SIZE(au1200_mmc1_resources),
index 0d68e1985ffd15d2ca62b67280600fd4c088b150..b93dff4a6789ca4e5c054a42302e640b619e9f69 100644 (file)
@@ -119,14 +119,14 @@ static struct resource ide_resources[] = {
        }
 };
 
-static u64 ide_dmamask = DMA_32BIT_MASK;
+static u64 ide_dmamask = DMA_BIT_MASK(32);
 
 static struct platform_device ide_device = {
        .name           = "au1200-ide",
        .id             = 0,
        .dev = {
                .dma_mask               = &ide_dmamask,
-               .coherent_dma_mask      = DMA_32BIT_MASK,
+               .coherent_dma_mask      = DMA_BIT_MASK(32),
        },
        .num_resources  = ARRAY_SIZE(ide_resources),
        .resource       = ide_resources
index b1ccbcc18f783aea6697d734677493d9f9231278..01f8345a2069d0fcf129b98f1c08ddd97b055b1c 100644 (file)
@@ -42,7 +42,7 @@
 #include <irq-mapping.h>
 #include <pnx833x.h>
 
-static u64 uart_dmamask     = DMA_32BIT_MASK;
+static u64 uart_dmamask     = DMA_BIT_MASK(32);
 
 static struct resource pnx833x_uart_resources[] = {
        [0] = {
@@ -101,14 +101,14 @@ static struct platform_device pnx833x_uart_device = {
        .id             = -1,
        .dev = {
                .dma_mask               = &uart_dmamask,
-               .coherent_dma_mask      = DMA_32BIT_MASK,
+               .coherent_dma_mask      = DMA_BIT_MASK(32),
                .platform_data          = pnx8xxx_ports,
        },
        .num_resources  = ARRAY_SIZE(pnx833x_uart_resources),
        .resource       = pnx833x_uart_resources,
 };
 
-static u64 ehci_dmamask     = DMA_32BIT_MASK;
+static u64 ehci_dmamask     = DMA_BIT_MASK(32);
 
 static struct resource pnx833x_usb_ehci_resources[] = {
        [0] = {
@@ -128,7 +128,7 @@ static struct platform_device pnx833x_usb_ehci_device = {
        .id             = -1,
        .dev = {
                .dma_mask               = &ehci_dmamask,
-               .coherent_dma_mask      = DMA_32BIT_MASK,
+               .coherent_dma_mask      = DMA_BIT_MASK(32),
        },
        .num_resources  = ARRAY_SIZE(pnx833x_usb_ehci_resources),
        .resource       = pnx833x_usb_ehci_resources,
@@ -198,7 +198,7 @@ static struct platform_device pnx833x_i2c1_device = {
 };
 #endif
 
-static u64 ethernet_dmamask = DMA_32BIT_MASK;
+static u64 ethernet_dmamask = DMA_BIT_MASK(32);
 
 static struct resource pnx833x_ethernet_resources[] = {
        [0] = {
@@ -218,7 +218,7 @@ static struct platform_device pnx833x_ethernet_device = {
        .id   = -1,
        .dev  = {
                .dma_mask          = &ethernet_dmamask,
-               .coherent_dma_mask = DMA_32BIT_MASK,
+               .coherent_dma_mask = DMA_BIT_MASK(32),
        },
        .num_resources = ARRAY_SIZE(pnx833x_ethernet_resources),
        .resource      = pnx833x_ethernet_resources,
index 21d2955359b3d97dfaee1094e1ce9dad9cb493f6..5264cc09a27bacbe2057ca7a66e50645a3eefd04 100644 (file)
@@ -92,16 +92,16 @@ struct pnx8xxx_port pnx8xxx_ports[] = {
 };
 
 /* The dmamask must be set for OHCI to work */
-static u64 ohci_dmamask = DMA_32BIT_MASK;
+static u64 ohci_dmamask = DMA_BIT_MASK(32);
 
-static u64 uart_dmamask = DMA_32BIT_MASK;
+static u64 uart_dmamask = DMA_BIT_MASK(32);
 
 static struct platform_device pnx8550_usb_ohci_device = {
        .name           = "pnx8550-ohci",
        .id             = -1,
        .dev = {
                .dma_mask               = &ohci_dmamask,
-               .coherent_dma_mask      = DMA_32BIT_MASK,
+               .coherent_dma_mask      = DMA_BIT_MASK(32),
        },
        .num_resources  = ARRAY_SIZE(pnx8550_usb_ohci_resources),
        .resource       = pnx8550_usb_ohci_resources,
@@ -112,7 +112,7 @@ static struct platform_device pnx8550_uart_device = {
        .id             = -1,
        .dev = {
                .dma_mask               = &uart_dmamask,
-               .coherent_dma_mask      = DMA_32BIT_MASK,
+               .coherent_dma_mask      = DMA_BIT_MASK(32),
                .platform_data = pnx8xxx_ports,
        },
        .num_resources  = ARRAY_SIZE(pnx8550_uart_resources),
index f7ca4f58233168ea3a2e9fd84dfa208f2fbaa596..0ee01e359dd8aa4f0a1fcaa20d3fb0c05709cbde 100644 (file)
@@ -49,14 +49,14 @@ static struct resource msp_usbhost_resources [] = {
        },
 };
 
-static u64 msp_usbhost_dma_mask = DMA_32BIT_MASK;
+static u64 msp_usbhost_dma_mask = DMA_BIT_MASK(32);
 
 static struct platform_device msp_usbhost_device = {
        .name   = "pmcmsp-ehci",
        .id     = 0,
        .dev    = {
                .dma_mask = &msp_usbhost_dma_mask,
-               .coherent_dma_mask = DMA_32BIT_MASK,
+               .coherent_dma_mask = DMA_BIT_MASK(32),
        },
        .num_resources  = ARRAY_SIZE(msp_usbhost_resources),
        .resource       = msp_usbhost_resources,
@@ -77,14 +77,14 @@ static struct resource msp_usbdev_resources [] = {
        },
 };
 
-static u64 msp_usbdev_dma_mask = DMA_32BIT_MASK;
+static u64 msp_usbdev_dma_mask = DMA_BIT_MASK(32);
 
 static struct platform_device msp_usbdev_device = {
        .name   = "msp71xx_udc",
        .id     = 0,
        .dev    = {
                .dma_mask = &msp_usbdev_dma_mask,
-               .coherent_dma_mask = DMA_32BIT_MASK,
+               .coherent_dma_mask = DMA_BIT_MASK(32),
        },
        .num_resources  = ARRAY_SIZE(msp_usbdev_resources),
        .resource       = msp_usbdev_resources,
index 9e08d8a69fdf48a78cc84c671815c9c1356ca3db..5b50e1ac61794ea71a2c76298e3ec7ac819a2cab 100644 (file)
@@ -316,7 +316,7 @@ config ARCH_ENABLE_MEMORY_HOTREMOVE
 
 config KEXEC
        bool "kexec system call (EXPERIMENTAL)"
-       depends on BOOK3S && EXPERIMENTAL
+       depends on PPC_BOOK3S && EXPERIMENTAL
        help
          kexec is a system call that implements the ability to shutdown your
          current kernel, and to start another kernel.  It is like a reboot
@@ -775,6 +775,7 @@ config LOWMEM_CAM_NUM_BOOL
          Say N here unless you know what you are doing.
 
 config LOWMEM_CAM_NUM
+       depends on FSL_BOOKE
        int "Number of CAMs to use to map low memory" if LOWMEM_CAM_NUM_BOOL
        default 3
 
index 308fe7c29deaf662379baa3e1106a1b82b045cea..c9cfd374bffb327ce8be53dadcd48d39935be113 100644 (file)
                bus-frequency = <0>;                            /* Fixed by bootwrapper */
 
                memory-controller@2000 {
-                       compatible = "fsl,8540-memory-controller";
+                       compatible = "fsl,mpc8540-memory-controller";
                        reg = <0x2000 0x1000>;
                        interrupt-parent = <&mpic>;
                        interrupts = <0x12 0x2>;
                };
 
                L2: l2-cache-controller@20000 {
-                       compatible = "fsl,8540-l2-cache-controller";
+                       compatible = "fsl,mpc8540-l2-cache-controller";
                        reg = <0x20000 0x1000>;
                        cache-line-size = <0x20>;               /* 32 bytes */
                        cache-size = <0x40000>;                 /* L2, 256K */
index b2d61091b36daca5c5ee20959051faba9420fe51..0bb6693767437bcbe8fe66e96fb16abbc07b8034 100644 (file)
        #address-cells = <1>;
        #size-cells = <1>;
 
+       aliases {
+               ethernet0 = &enet0;
+               ethernet1 = &enet1;
+               serial0 = &serial0;
+               serial1 = &serial1;
+               pci0 = &pci0;
+       };
+
        cpus {
                #address-cells = <1>;
                #size-cells = <0>;
@@ -45,7 +53,7 @@
                #size-cells = <1>;
                reg = <0xf0010100 0x60>;
 
-               ranges = <0x0 0x0 0xfe000000 0x800000
+               ranges = <0x0 0x0 0xff800000 0x800000
                          0x1 0x0 0xf4500000 0x8000
                          0x8 0x0 0xf8200000 0x8000>;
 
@@ -71,7 +79,7 @@
                };
        };
 
-       pci@f0010800 {
+       pci0: pci@f0010800 {
                device_type = "pci";
                reg = <0xf0010800 0x10c 0xf00101ac 0x8 0xf00101c4 0x8>;
                compatible = "fsl,mpc8280-pci", "fsl,pq2-pci";
                                reg = <0x119f0 0x10 0x115f0 0x10>;
                        };
 
-                       serial@11a00 {
+                       serial0: serial@11a00 {
                                device_type = "serial";
                                compatible = "fsl,mpc8280-scc-uart",
                                             "fsl,cpm2-scc-uart";
                                fsl,cpm-command = <0x800000>;
                        };
 
-                       serial@11a20 {
+                       serial1: serial@11a20 {
                                device_type = "serial";
                                compatible = "fsl,mpc8280-scc-uart",
                                             "fsl,cpm2-scc-uart";
                                fsl,cpm-command = <0x4a00000>;
                        };
 
-                       ethernet@11320 {
+                       enet0: ethernet@11320 {
                                device_type = "network";
                                compatible = "fsl,mpc8280-fcc-enet",
                                             "fsl,cpm2-fcc-enet";
                                fsl,cpm-command = <0x16200300>;
                        };
 
-                       ethernet@11340 {
+                       enet1: ethernet@11340 {
                                device_type = "network";
                                compatible = "fsl,mpc8280-fcc-enet",
                                             "fsl,cpm2-fcc-enet";
index 9c5079fec4f23b3750e671d2b39bf34e3a069d8a..b1f1416ac9988d254be577f200fc3ef59cb5abd6 100644 (file)
                compatible = "simple-bus";
 
                memory-controller@2000 {
-                       compatible = "fsl,8548-memory-controller";
+                       compatible = "fsl,mpc8548-memory-controller";
                        reg = <0x2000 0x1000>;
                        interrupt-parent = <&mpic>;
                        interrupts = <0x12 0x2>;
                };
 
                L2: l2-cache-controller@20000 {
-                       compatible = "fsl,8548-l2-cache-controller";
+                       compatible = "fsl,mpc8548-l2-cache-controller";
                        reg = <0x20000 0x1000>;
                        cache-line-size = <0x20>;       // 32 bytes
                        cache-size = <0x80000>; // L2, 512K
index b772405a9a0a2f70ef0821d7474ce9b9312c4e4d..c4564b81e47305e478aa6b6591118cd4712616f9 100644 (file)
                clock-frequency = <0>;
 
                memory-controller@2000 {
-                       compatible = "fsl,8560-memory-controller";
+                       compatible = "fsl,mpc8560-memory-controller";
                        reg = <0x2000 0x1000>;
                        interrupt-parent = <&mpic>;
                        interrupts = <0x12 0x2>;
                };
 
                L2: l2-cache-controller@20000 {
-                       compatible = "fsl,8560-l2-cache-controller";
+                       compatible = "fsl,mpc8560-l2-cache-controller";
                        reg = <0x20000 0x1000>;
                        cache-line-size = <0x20>;       // 32 bytes
                        cache-size = <0x40000>;         // L2, 256K
index b8d0fc6f00424aef2ef1ab26f48979d3a00f7e53..7a6ae75a1e573a14afac948038fa469a662b012f 100644 (file)
@@ -52,6 +52,7 @@
        soc8544@e0000000 {
                #address-cells = <1>;
                #size-cells = <1>;
+               device_type = "soc";
 
                ranges = <0x00000000 0xe0000000 0x00100000>;
                reg = <0xe0000000 0x00001000>;  // CCSRBAR 1M
                        #address-cells = <1>;
                        #size-cells = <0>;
                        cell-index = <0>;
-                       compatible = "fsl-i2c";
+                       compatible = "fsl,mpc8544-i2c", "fsl-i2c";
                        reg = <0x3000 0x100>;
                        interrupts = <43 2>;
                        interrupt-parent = <&mpic>;
-                       dfsrr;
+                       fsl,preserve-clocking;
 
                        dtt@28 {
                                compatible = "winbond,w83782d";
                        #address-cells = <1>;
                        #size-cells = <0>;
                        cell-index = <1>;
-                       compatible = "fsl-i2c";
+                       compatible = "fsl,mpc8544-i2c", "fsl-i2c";
                        reg = <0x3100 0x100>;
                        interrupts = <43 2>;
                        interrupt-parent = <&mpic>;
-                       dfsrr;
+                       fsl,preserve-clocking;
                };
 
                enet0: ethernet@24000 {
index 8b173957fb5f67ac9e99bcec040d755d77901c95..ea6b15152de39d15e0d3474b23a1771bc6a1f3f0 100644 (file)
                compatible = "fsl,mpc8560-immr", "simple-bus";
 
                memory-controller@2000 {
-                       compatible = "fsl,8540-memory-controller";
+                       compatible = "fsl,mpc8540-memory-controller";
                        reg = <0x2000 0x1000>;
                        interrupt-parent = <&mpic>;
                        interrupts = <18 2>;
                };
 
                L2: l2-cache-controller@20000 {
-                       compatible = "fsl,8540-l2-cache-controller";
+                       compatible = "fsl,mpc8540-l2-cache-controller";
                        reg = <0x20000 0x1000>;
                        cache-line-size = <32>;
                        cache-size = <0x40000>; // L2, 256K
index ac9413a29f9f5d6033bb52a63fcbe91f5bb2eb86..231bae756637e0eca72b6b45b2056ab812bf029a 100644 (file)
                compatible = "fsl,mpc8540-immr", "simple-bus";
 
                memory-controller@2000 {
-                       compatible = "fsl,8540-memory-controller";
+                       compatible = "fsl,mpc8540-memory-controller";
                        reg = <0x2000 0x1000>;
                        interrupt-parent = <&mpic>;
                        interrupts = <18 2>;
                };
 
                L2: l2-cache-controller@20000 {
-                       compatible = "fsl,8540-l2-cache-controller";
+                       compatible = "fsl,mpc8540-l2-cache-controller";
                        reg = <0x20000 0x1000>;
                        cache-line-size = <32>;
                        cache-size = <0x40000>; // L2, 256K
index c71bb5dd5e5ec02226ac3c410111edc00b7258b9..4356a1f08295d1edf7c9d6d2ee836c4f4d942e43 100644 (file)
                compatible = "fsl,mpc8541-immr", "simple-bus";
 
                memory-controller@2000 {
-                       compatible = "fsl,8540-memory-controller";
+                       compatible = "fsl,mpc8540-memory-controller";
                        reg = <0x2000 0x1000>;
                        interrupt-parent = <&mpic>;
                        interrupts = <18 2>;
                };
 
                L2: l2-cache-controller@20000 {
-                       compatible = "fsl,8540-l2-cache-controller";
+                       compatible = "fsl,mpc8540-l2-cache-controller";
                        reg = <0x20000 0x1000>;
                        cache-line-size = <32>;
                        cache-size = <0x40000>; // L2, 256K
index a133ded6dddbba41886407edcb54717d1879287e..06d366ebbda30a84e910e1e7242cb71b2c867431 100644 (file)
                compatible = "fsl,mpc8555-immr", "simple-bus";
 
                memory-controller@2000 {
-                       compatible = "fsl,8540-memory-controller";
+                       compatible = "fsl,mpc8540-memory-controller";
                        reg = <0x2000 0x1000>;
                        interrupt-parent = <&mpic>;
                        interrupts = <18 2>;
                };
 
                L2: l2-cache-controller@20000 {
-                       compatible = "fsl,8540-l2-cache-controller";
+                       compatible = "fsl,mpc8540-l2-cache-controller";
                        reg = <0x20000 0x1000>;
                        cache-line-size = <32>;
                        cache-size = <0x40000>; // L2, 256K
index 649e2e576267a5eb913f3cfece032eb4437fd0ab..feff915e04926e2810a6ea5c8429aebe5557254e 100644 (file)
                compatible = "fsl,mpc8560-immr", "simple-bus";
 
                memory-controller@2000 {
-                       compatible = "fsl,8540-memory-controller";
+                       compatible = "fsl,mpc8540-memory-controller";
                        reg = <0x2000 0x1000>;
                        interrupt-parent = <&mpic>;
                        interrupts = <18 2>;
                };
 
                L2: l2-cache-controller@20000 {
-                       compatible = "fsl,8540-l2-cache-controller";
+                       compatible = "fsl,mpc8540-l2-cache-controller";
                        reg = <0x20000 0x1000>;
                        cache-line-size = <32>;
                        cache-size = <0x40000>; // L2, 256K
index 61b100849715d3907c87303b25bcfe0392147d2a..f1889abb89b1a196e61861413237f0ecd423368c 100644 (file)
@@ -95,7 +95,7 @@ CONFIG_CGROUP_CPUACCT=y
 CONFIG_SYSFS_DEPRECATED=y
 CONFIG_SYSFS_DEPRECATED_V2=y
 CONFIG_PROC_PID_CPUSET=y
-# CONFIG_RELAY is not set
+CONFIG_RELAY=y
 CONFIG_NAMESPACES=y
 # CONFIG_UTS_NS is not set
 # CONFIG_IPC_NS is not set
index 68235f7e4a8fabb4febe5302adee68e6a20d1d64..d2a65e8ca6ae08df08c17626dfa4acaf2d6103d9 100644 (file)
@@ -125,7 +125,7 @@ struct lppaca {
        // NOTE: This value will ALWAYS be zero for dedicated processors and
        // will NEVER be zero for shared processors (ie, initialized to a 1).
        volatile u32 yield_count;       // PLIC increments each dispatchx00-x03
-       u32 reserved6;
+       volatile u32 dispersion_count;  // dispatch changed phys cpu    x04-x07
        volatile u64 cmo_faults;        // CMO page fault count         x08-x0F
        volatile u64 cmo_fault_time;    // CMO page fault time          x10-x17
        u8      reserved7[104];         // Reserved                     x18-x7F
index c2ccca53b991a8af7fb6493726041ba286810bf2..a002682f3a6dfe4b2dfe4e2ac88b6f935839b137 100644 (file)
 #define MPIC_GREG_FEATURE_1            0x00010
 #define MPIC_GREG_GLOBAL_CONF_0                0x00020
 #define                MPIC_GREG_GCONF_RESET                   0x80000000
+/* On the FSL mpic implementations the Mode field is expand to be
+ * 2 bits wide:
+ *     0b00 = pass through (interrupts routed to IRQ0)
+ *     0b01 = Mixed mode
+ *     0b10 = reserved
+ *     0b11 = External proxy / coreint
+ */
+#define                MPIC_GREG_GCONF_COREINT                 0x60000000
 #define                MPIC_GREG_GCONF_8259_PTHROU_DIS         0x20000000
 #define                MPIC_GREG_GCONF_NO_BIAS                 0x10000000
 #define                MPIC_GREG_GCONF_BASE_MASK               0x000fffff
@@ -357,6 +365,8 @@ struct mpic
 #define MPIC_BROKEN_FRR_NIRQS          0x00000800
 /* Destination only supports a single CPU at a time */
 #define MPIC_SINGLE_DEST_CPU           0x00001000
+/* Enable CoreInt delivery of interrupts */
+#define MPIC_ENABLE_COREINT            0x00002000
 
 /* MPIC HW modification ID */
 #define MPIC_REGSET_MASK               0xf0000000
@@ -470,6 +480,8 @@ extern void mpic_end_irq(unsigned int irq);
 extern unsigned int mpic_get_one_irq(struct mpic *mpic);
 /* This one gets from the primary mpic */
 extern unsigned int mpic_get_irq(void);
+/* This one gets from the primary mpic via CoreInt*/
+extern unsigned int mpic_get_coreint_irq(void);
 /* Fetch Machine Check interrupt from primary mpic */
 extern unsigned int mpic_get_mcirq(void);
 
index 90dbefb8cfc4a01528c1700f123e870c160decab..e7233a849680ce4595f8b9afc345593b9431d6ce 100644 (file)
@@ -21,7 +21,6 @@
 
 #include <linux/types.h>
 #include <linux/ioctl.h>
-#include <linux/types.h>
 
 /* ioctl */
 #define PS3FB_IOCTL_SETMODE       _IOW('r',  1, int) /* set video mode */
index d9740e88680145e0dbf0ef77c263671aed8ec116..a7e210b6b48c347f4d7af601e56660cf824b1728 100644 (file)
@@ -151,9 +151,11 @@ extern unsigned long bad_call_to_PMD_PAGE_SIZE(void);
                                 _PAGE_NO_CACHE)
 #define PAGE_KERNEL_NCG        __pgprot(_PAGE_BASE_NC | _PAGE_KERNEL_RW | \
                                 _PAGE_NO_CACHE | _PAGE_GUARDED)
-#define PAGE_KERNEL_X  __pgprot(_PAGE_BASE | _PAGE_KERNEL_RW | _PAGE_EXEC)
+#define PAGE_KERNEL_X  __pgprot(_PAGE_BASE | _PAGE_KERNEL_RW | _PAGE_EXEC | \
+                                _PAGE_HWEXEC)
 #define PAGE_KERNEL_RO __pgprot(_PAGE_BASE | _PAGE_KERNEL_RO)
-#define PAGE_KERNEL_ROX        __pgprot(_PAGE_BASE | _PAGE_KERNEL_RO | _PAGE_EXEC)
+#define PAGE_KERNEL_ROX        __pgprot(_PAGE_BASE | _PAGE_KERNEL_RO | _PAGE_EXEC | \
+                                _PAGE_HWEXEC)
 
 /* Protection used for kernel text. We want the debuggers to be able to
  * set breakpoints anywhere, so don't write protect the kernel text
index c9ff1ec97479d0d7002c7ade3f6e65a811e1e9ff..e8018d540e87db3f3c0f5bf44b7453dc57dbe9d9 100644 (file)
 #define FPSCR_NI       0x00000004      /* FPU non IEEE-Mode */
 #define FPSCR_RN       0x00000003      /* FPU rounding control */
 
+/* Bit definitions for SPEFSCR. */
+#define SPEFSCR_SOVH   0x80000000      /* Summary integer overflow high */
+#define SPEFSCR_OVH    0x40000000      /* Integer overflow high */
+#define SPEFSCR_FGH    0x20000000      /* Embedded FP guard bit high */
+#define SPEFSCR_FXH    0x10000000      /* Embedded FP sticky bit high */
+#define SPEFSCR_FINVH  0x08000000      /* Embedded FP invalid operation high */
+#define SPEFSCR_FDBZH  0x04000000      /* Embedded FP div by zero high */
+#define SPEFSCR_FUNFH  0x02000000      /* Embedded FP underflow high */
+#define SPEFSCR_FOVFH  0x01000000      /* Embedded FP overflow high */
+#define SPEFSCR_FINXS  0x00200000      /* Embedded FP inexact sticky */
+#define SPEFSCR_FINVS  0x00100000      /* Embedded FP invalid op. sticky */
+#define SPEFSCR_FDBZS  0x00080000      /* Embedded FP div by zero sticky */
+#define SPEFSCR_FUNFS  0x00040000      /* Embedded FP underflow sticky */
+#define SPEFSCR_FOVFS  0x00020000      /* Embedded FP overflow sticky */
+#define SPEFSCR_MODE   0x00010000      /* Embedded FP mode */
+#define SPEFSCR_SOV    0x00008000      /* Integer summary overflow */
+#define SPEFSCR_OV     0x00004000      /* Integer overflow */
+#define SPEFSCR_FG     0x00002000      /* Embedded FP guard bit */
+#define SPEFSCR_FX     0x00001000      /* Embedded FP sticky bit */
+#define SPEFSCR_FINV   0x00000800      /* Embedded FP invalid operation */
+#define SPEFSCR_FDBZ   0x00000400      /* Embedded FP div by zero */
+#define SPEFSCR_FUNF   0x00000200      /* Embedded FP underflow */
+#define SPEFSCR_FOVF   0x00000100      /* Embedded FP overflow */
+#define SPEFSCR_FINXE  0x00000040      /* Embedded FP inexact enable */
+#define SPEFSCR_FINVE  0x00000020      /* Embedded FP invalid op. enable */
+#define SPEFSCR_FDBZE  0x00000010      /* Embedded FP div by zero enable */
+#define SPEFSCR_FUNFE  0x00000008      /* Embedded FP underflow enable */
+#define SPEFSCR_FOVFE  0x00000004      /* Embedded FP overflow enable */
+#define SPEFSCR_FRMC   0x00000003      /* Embedded FP rounding mode control */
+
 /* Special Purpose Registers (SPRNs)*/
 #define SPRN_CTR       0x009   /* Count Register */
 #define SPRN_DSCR      0x11
index a56f4d61aa7264c27ec60e9008c92e464a28a6f0..601ddbc460023e20a26558fafa61fdbafd24bfae 100644 (file)
 #define SGR_NORMAL     0               /* Speculative fetching allowed. */
 #define SGR_GUARDED    1               /* Speculative fetching disallowed. */
 
-/* Bit definitions for SPEFSCR. */
-#define SPEFSCR_SOVH   0x80000000      /* Summary integer overflow high */
-#define SPEFSCR_OVH    0x40000000      /* Integer overflow high */
-#define SPEFSCR_FGH    0x20000000      /* Embedded FP guard bit high */
-#define SPEFSCR_FXH    0x10000000      /* Embedded FP sticky bit high */
-#define SPEFSCR_FINVH  0x08000000      /* Embedded FP invalid operation high */
-#define SPEFSCR_FDBZH  0x04000000      /* Embedded FP div by zero high */
-#define SPEFSCR_FUNFH  0x02000000      /* Embedded FP underflow high */
-#define SPEFSCR_FOVFH  0x01000000      /* Embedded FP overflow high */
-#define SPEFSCR_FINXS  0x00200000      /* Embedded FP inexact sticky */
-#define SPEFSCR_FINVS  0x00100000      /* Embedded FP invalid op. sticky */
-#define SPEFSCR_FDBZS  0x00080000      /* Embedded FP div by zero sticky */
-#define SPEFSCR_FUNFS  0x00040000      /* Embedded FP underflow sticky */
-#define SPEFSCR_FOVFS  0x00020000      /* Embedded FP overflow sticky */
-#define SPEFSCR_MODE   0x00010000      /* Embedded FP mode */
-#define SPEFSCR_SOV    0x00008000      /* Integer summary overflow */
-#define SPEFSCR_OV     0x00004000      /* Integer overflow */
-#define SPEFSCR_FG     0x00002000      /* Embedded FP guard bit */
-#define SPEFSCR_FX     0x00001000      /* Embedded FP sticky bit */
-#define SPEFSCR_FINV   0x00000800      /* Embedded FP invalid operation */
-#define SPEFSCR_FDBZ   0x00000400      /* Embedded FP div by zero */
-#define SPEFSCR_FUNF   0x00000200      /* Embedded FP underflow */
-#define SPEFSCR_FOVF   0x00000100      /* Embedded FP overflow */
-#define SPEFSCR_FINXE  0x00000040      /* Embedded FP inexact enable */
-#define SPEFSCR_FINVE  0x00000020      /* Embedded FP invalid op. enable */
-#define SPEFSCR_FDBZE  0x00000010      /* Embedded FP div by zero enable */
-#define SPEFSCR_FUNFE  0x00000008      /* Embedded FP underflow enable */
-#define SPEFSCR_FOVFE  0x00000004      /* Embedded FP overflow enable */
-#define SPEFSCR_FRMC   0x00000003      /* Embedded FP rounding mode control */
-
 /*
  * The IBM-403 is an even more odd special case, as it is much
  * older than the IBM-405 series.  We put these down here incase someone
index 0aa0315fb7e8a56d5aa120e8932afb9ddf0c694f..01c12339b30444270d8f2a0be248f6860571d21f 100644 (file)
@@ -68,7 +68,8 @@ struct rtas_t {
 #define RTAS_EPOW_WARNING              0x40000000 /* set bit 1 */
 #define RTAS_POWERMGM_EVENTS           0x20000000 /* set bit 2 */
 #define RTAS_HOTPLUG_EVENTS            0x10000000 /* set bit 3 */
-#define RTAS_EVENT_SCAN_ALL_EVENTS     0xf0000000
+#define RTAS_IO_EVENTS                 0x08000000 /* set bit 4 */
+#define RTAS_EVENT_SCAN_ALL_EVENTS     0xffffffff
 
 /* RTAS event severity */
 #define RTAS_SEVERITY_FATAL            0x5
index 3d9f831c3c55749829e76abf8e912cbf47af7991..3a7a67a0d006cfe24d0b2bd626e7361d771dde1b 100644 (file)
@@ -29,9 +29,9 @@
 
 /* basic word size definitions */
 #define _FP_W_TYPE_SIZE                32
-#define _FP_W_TYPE             unsigned long
-#define _FP_WS_TYPE            signed long
-#define _FP_I_TYPE             long
+#define _FP_W_TYPE             unsigned int
+#define _FP_WS_TYPE            signed int
+#define _FP_I_TYPE             int
 
 #define __ll_B                 ((UWtype) 1 << (W_TYPE_SIZE / 2))
 #define __ll_lowpart(t)                ((UWtype) (t) & (__ll_B - 1))
index fe166491e9dcf9a821fb10be53678b48a3f3578e..d98a30dfd41ca2e11c8f7212097182ab6caaeaa2 100644 (file)
@@ -322,3 +322,6 @@ SYSCALL_SPU(epoll_create1)
 SYSCALL_SPU(dup3)
 SYSCALL_SPU(pipe2)
 SYSCALL(inotify_init1)
+SYSCALL(ni_syscall)
+COMPAT_SYS_SPU(preadv)
+COMPAT_SYS_SPU(pwritev)
index e07d0c76ed779793280480b50032d0ffefe04c54..3f06f8ec81c513639e96194ca7b40262e35cf0ca 100644 (file)
 #define __NR_dup3              316
 #define __NR_pipe2             317
 #define __NR_inotify_init1     318
+#define __NR_preadv            320
+#define __NR_pwritev           321
 
 #ifdef __KERNEL__
 
-#define __NR_syscalls          319
+#define __NR_syscalls          322
 
 #define __NR__exit __NR_exit
 #define NR_syscalls    __NR_syscalls
index 1c5c8a6fc129ff825bd1b4cb4da985e15ba85707..53c7788cba78d2978002e2edc5d03027f459e974 100644 (file)
@@ -94,7