Merge remote-tracking branches 'asoc/fix/rockchip', 'asoc/fix/rt5645', 'asoc/fix...
authorMark Brown <broonie@kernel.org>
Mon, 3 Jul 2017 15:51:26 +0000 (16:51 +0100)
committerMark Brown <broonie@kernel.org>
Mon, 3 Jul 2017 15:51:26 +0000 (16:51 +0100)
sound/soc/codecs/rt5645.c
sound/soc/codecs/rt5663.c
sound/soc/codecs/rt5663.h
sound/soc/codecs/rt5670.c
sound/soc/rockchip/rockchip_i2s.c
sound/soc/zte/zx-i2s.c

index 87844a45886a5f965d04abaeb670e28ab32efdee..206b41688d960d6930a45e5854c2810099ed1e83 100644 (file)
@@ -3897,6 +3897,7 @@ static int rt5645_i2c_remove(struct i2c_client *i2c)
 
        cancel_delayed_work_sync(&rt5645->jack_detect_work);
        cancel_delayed_work_sync(&rt5645->rcclock_work);
+       del_timer_sync(&rt5645->btn_check_timer);
 
        snd_soc_unregister_codec(&i2c->dev);
        regulator_bulk_disable(ARRAY_SIZE(rt5645->supplies), rt5645->supplies);
index a32508d7dcfd8a78e6510dc3db0ef546923a407b..a33202affeb123aca338303d9d9c61bd7d5f5f39 100644 (file)
@@ -2847,6 +2847,8 @@ static int rt5663_resume(struct snd_soc_codec *codec)
        regcache_cache_only(rt5663->regmap, false);
        regcache_sync(rt5663->regmap);
 
+       rt5663_irq(0, rt5663);
+
        return 0;
 }
 #else
@@ -3141,7 +3143,7 @@ static int rt5663_i2c_probe(struct i2c_client *i2c,
                regmap_update_bits(rt5663->regmap, RT5663_DIG_MISC,
                        RT5663_DIG_GATE_CTRL_MASK, RT5663_DIG_GATE_CTRL_EN);
                regmap_update_bits(rt5663->regmap, RT5663_AUTO_1MRC_CLK,
-                       RT5663_IRQ_POW_SAV_MASK, RT5663_IRQ_POW_SAV_EN);
+                       RT5663_IRQ_MANUAL_MASK, RT5663_IRQ_MANUAL_EN);
                regmap_update_bits(rt5663->regmap, RT5663_IRQ_1,
                        RT5663_EN_IRQ_JD1_MASK, RT5663_EN_IRQ_JD1_EN);
                regmap_update_bits(rt5663->regmap, RT5663_GPIO_1,
index d77fae619f2f118f3e81ee47caa3ff26cd5e4321..4621812c94d8a718c8c80fbae463fd560f4e646c 100644 (file)
 #define RT5663_IRQ_POW_SAV_JD1_SHIFT           14
 #define RT5663_IRQ_POW_SAV_JD1_DIS             (0x0 << 14)
 #define RT5663_IRQ_POW_SAV_JD1_EN              (0x1 << 14)
+#define RT5663_IRQ_MANUAL_MASK                 (0x1 << 8)
+#define RT5663_IRQ_MANUAL_SHIFT                        8
+#define RT5663_IRQ_MANUAL_DIS                  (0x0 << 8)
+#define RT5663_IRQ_MANUAL_EN                   (0x1 << 8)
 
 /* IRQ Control 1 (0x00b6) */
 #define RT5663_EN_CB_JD_MASK                   (0x1 << 3)
index e27c5a4a0a152333205d6a59b6b239e2a81e225b..d95d2e693dc6c9cf380f2d6ab2341df7f4d66b89 100644 (file)
@@ -1717,7 +1717,6 @@ static const struct snd_soc_dapm_widget rt5670_dapm_widgets[] = {
        SND_SOC_DAPM_PGA("IF1_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
        SND_SOC_DAPM_PGA("IF1_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
        SND_SOC_DAPM_PGA("IF1_ADC3", SND_SOC_NOPM, 0, 0, NULL, 0),
-       SND_SOC_DAPM_PGA("IF1_ADC4", SND_SOC_NOPM, 0, 0, NULL, 0),
 
        /* DSP */
        SND_SOC_DAPM_PGA("TxDP_ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
@@ -2086,13 +2085,13 @@ static const struct snd_soc_dapm_route rt5670_dapm_routes[] = {
        { "IF1 ADC1 IN1 Mux", "IF1_ADC3", "IF1_ADC3" },
 
        { "IF1 ADC1 IN2 Mux", "IF1_ADC1_IN1", "IF1 ADC1 IN1 Mux" },
-       { "IF1 ADC1 IN2 Mux", "IF1_ADC4", "IF1_ADC4" },
+       { "IF1 ADC1 IN2 Mux", "IF1_ADC4", "TxDP_ADC" },
 
        { "IF1 ADC2 IN Mux", "IF_ADC2", "IF_ADC2" },
        { "IF1 ADC2 IN Mux", "VAD_ADC", "VAD_ADC" },
 
        { "IF1 ADC2 IN1 Mux", "IF1_ADC2_IN", "IF1 ADC2 IN Mux" },
-       { "IF1 ADC2 IN1 Mux", "IF1_ADC4", "IF1_ADC4" },
+       { "IF1 ADC2 IN1 Mux", "IF1_ADC4", "TxDP_ADC" },
 
        { "IF1_ADC1" , NULL, "IF1 ADC1 IN2 Mux" },
        { "IF1_ADC2" , NULL, "IF1 ADC2 IN1 Mux" },
index 974915cb4c4fd8a0c0f44c8d5cd2935411c10646..f54843342ee2e3a1cebf4fe3743c1aaa183d6448 100644 (file)
@@ -116,6 +116,7 @@ static void rockchip_snd_txctrl(struct rk_i2s_dev *i2s, int on)
                                           I2S_XFER_TXS_STOP |
                                           I2S_XFER_RXS_STOP);
 
+                       udelay(150);
                        regmap_update_bits(i2s->regmap, I2S_CLR,
                                           I2S_CLR_TXC | I2S_CLR_RXC,
                                           I2S_CLR_TXC | I2S_CLR_RXC);
@@ -162,6 +163,7 @@ static void rockchip_snd_rxctrl(struct rk_i2s_dev *i2s, int on)
                                           I2S_XFER_TXS_STOP |
                                           I2S_XFER_RXS_STOP);
 
+                       udelay(150);
                        regmap_update_bits(i2s->regmap, I2S_CLR,
                                           I2S_CLR_TXC | I2S_CLR_RXC,
                                           I2S_CLR_TXC | I2S_CLR_RXC);
index a865f37c2a56f8aacf9198879756d994e9398881..8bbad1d72bc560deae51537af1eec50b83186812 100644 (file)
@@ -203,13 +203,15 @@ static int zx_i2s_set_fmt(struct snd_soc_dai *cpu_dai, unsigned int fmt)
 
        switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
        case SND_SOC_DAIFMT_CBM_CFM:
-               i2s->master = 1;
-               val |= ZX_I2S_TIMING_MAST;
-               break;
-       case SND_SOC_DAIFMT_CBS_CFS:
+               /* Codec is master, and I2S is slave. */
                i2s->master = 0;
                val |= ZX_I2S_TIMING_SLAVE;
                break;
+       case SND_SOC_DAIFMT_CBS_CFS:
+               /* Codec is slave, and I2S is master. */
+               i2s->master = 1;
+               val |= ZX_I2S_TIMING_MAST;
+               break;
        default:
                dev_err(cpu_dai->dev, "Unknown master/slave format\n");
                return -EINVAL;
@@ -226,11 +228,12 @@ static int zx_i2s_hw_params(struct snd_pcm_substream *substream,
        struct zx_i2s_info *i2s = snd_soc_dai_get_drvdata(socdai);
        struct snd_dmaengine_dai_dma_data *dma_data;
        unsigned int lane, ch_num, len, ret = 0;
+       unsigned int ts_width = 32;
        unsigned long val;
        unsigned long chn_cfg;
 
        dma_data = snd_soc_dai_get_dma_data(socdai, substream);
-       dma_data->addr_width = params_width(params) >> 3;
+       dma_data->addr_width = ts_width >> 3;
 
        val = readl_relaxed(i2s->reg_base + ZX_I2S_TIMING_CTRL);
        val &= ~(ZX_I2S_TIMING_TS_WIDTH_MASK | ZX_I2S_TIMING_DATA_SIZE_MASK |
@@ -251,7 +254,7 @@ static int zx_i2s_hw_params(struct snd_pcm_substream *substream,
                dev_err(socdai->dev, "Unknown data format\n");
                return -EINVAL;
        }
-       val |= ZX_I2S_TIMING_TS_WIDTH(len) | ZX_I2S_TIMING_DATA_SIZE(len);
+       val |= ZX_I2S_TIMING_TS_WIDTH(ts_width) | ZX_I2S_TIMING_DATA_SIZE(len);
 
        ch_num = params_channels(params);
        switch (ch_num) {