arm64/sysreg: Convert LOREA_EL1 to automatic generation

Convert LOREA_EL1 to automatic register generation as per DDI0487H.a, no
functional changes.

Signed-off-by: Mark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/r/20220704170302.2609529-24-broonie@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>

diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index 48a48974515b9b7da201d3fb2cdedbe1fdf0ea6f..56989d982c813bfb8fdbb30dd84690e2f281b50f 100644 (file)
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -407,7 +407,6 @@
 #define SYS_MAIR_EL1                   sys_reg(3, 0, 10, 2, 0)
 #define SYS_AMAIR_EL1                  sys_reg(3, 0, 10, 3, 0)
 
-#define SYS_LOREA_EL1                  sys_reg(3, 0, 10, 4, 1)
 #define SYS_LORN_EL1                   sys_reg(3, 0, 10, 4, 2)
 #define SYS_LORC_EL1                   sys_reg(3, 0, 10, 4, 3)
 #define SYS_LORID_EL1                  sys_reg(3, 0, 10, 4, 7)

diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
index c1e3a9ceb049cb836247f1d18a80ba9ecabf3778..4c23c65e53d14e9ce03bd5bb7257cada81d18833 100644 (file)
--- a/arch/arm64/tools/sysreg
+++ b/arch/arm64/tools/sysreg
@@ -523,3 +523,9 @@ Res0        15:1
 Field  0       Valid
 EndSysreg
 
+Sysreg LOREA_EL1       3       0       10      4       1
+Res0   63:52
+Field  51:48   EA_51_48
+Field  47:16   EA_47_16
+Res0   15:0
+EndSysreg