drm/i915/pps: rename intel_power_sequencer_reset to intel_pps_reset_all

Follow the usual naming pattern for functions. "reset all" because it
iterates over all DP encoders. No functional changes.

Reviewed-by: Anshuman Gupta <anshuman.gupta@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/b10013e2c976ca140b1ad62669e18a2e9f1e8c35.1610127741.git.jani.nikula@intel.com

diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
index a11bd8213df4dbd57dcd9a6e4c925348d9bcb958..c11c37c65d861306a58e8ba67e729fce41b6749f 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -936,7 +936,7 @@ static void bxt_enable_dc9(struct drm_i915_private *dev_priv)
         * because PPS registers are always on.
         */
        if (!HAS_PCH_SPLIT(dev_priv))
-               intel_power_sequencer_reset(dev_priv);
+               intel_pps_reset_all(dev_priv);
        gen9_set_dc_state(dev_priv, DC_STATE_EN_DC9);
 }
 
@@ -1446,7 +1446,7 @@ static void vlv_display_power_well_deinit(struct drm_i915_private *dev_priv)
        /* make sure we're done processing display irqs */
        intel_synchronize_irq(dev_priv);
 
-       intel_power_sequencer_reset(dev_priv);
+       intel_pps_reset_all(dev_priv);
 
        /* Prevent us from re-enabling polling on accident in late suspend */
        if (!dev_priv->drm.dev->power.is_suspended)

diff --git a/drivers/gpu/drm/i915/display/intel_pps.c b/drivers/gpu/drm/i915/display/intel_pps.c
index 9e5744578b26d8a6764f0a06bb0482cef0f5e2ea..d396ee5f6f6941838e69564426fc7f671a851cbd 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_pps.c
+++ b/drivers/gpu/drm/i915/display/intel_pps.c
@@ -22,8 +22,7 @@ intel_wakeref_t intel_pps_lock(struct intel_dp *intel_dp)
        intel_wakeref_t wakeref;
 
        /*
-        * See intel_power_sequencer_reset() why we need
-        * a power domain reference here.
+        * See intel_pps_reset_all() why we need a power domain reference here.
         */
        wakeref = intel_display_power_get(dev_priv, POWER_DOMAIN_DISPLAY_CORE);
        mutex_lock(&dev_priv->pps_mutex);
@@ -313,7 +312,7 @@ vlv_initial_power_sequencer_setup(struct intel_dp *intel_dp)
        intel_dp_init_panel_power_sequencer_registers(intel_dp, false);
 }
 
-void intel_power_sequencer_reset(struct drm_i915_private *dev_priv)
+void intel_pps_reset_all(struct drm_i915_private *dev_priv)
 {
        struct intel_encoder *encoder;
 

diff --git a/drivers/gpu/drm/i915/display/intel_pps.h b/drivers/gpu/drm/i915/display/intel_pps.h
index e0391c9c8383acaf046fc0944066f2a8aea2ad17..ecd9ea2a095cef6cddcff72fc40c7866dff0b9c7 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_pps.h
+++ b/drivers/gpu/drm/i915/display/intel_pps.h
@@ -42,7 +42,7 @@ void wait_panel_power_cycle(struct intel_dp *intel_dp);
 
 void intel_pps_init(struct intel_dp *intel_dp);
 void intel_pps_encoder_reset(struct intel_dp *intel_dp);
-void intel_power_sequencer_reset(struct drm_i915_private *i915);
+void intel_pps_reset_all(struct drm_i915_private *i915);
 
 void vlv_init_panel_power_sequencer(struct intel_encoder *encoder,
                                    const struct intel_crtc_state *crtc_state);