ASoC: da7213: Improve 32KHz mode PLL locking
authorAdam Thomson <Adam.Thomson.Opensource@diasemi.com>
Thu, 4 Aug 2016 14:35:41 +0000 (15:35 +0100)
committerMark Brown <broonie@kernel.org>
Mon, 8 Aug 2016 10:54:40 +0000 (11:54 +0100)
commitd936d527d241b606b0280034b3972b7825d3704c
tree6cab9099c9346cdd10ec584831c73763a4d4e5dc
parent4c75225aa05753217a81ed10f136b86fb94c5922
ASoC: da7213: Improve 32KHz mode PLL locking

To aid PLL in locking on to a 32KHz MCLK, some register mods
are made during PLL configuration, and when enabling the DAI,
to achieve the full range of sample rates.

Signed-off-by: Adam Thomson <Adam.Thomson.Opensource@diasemi.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
sound/soc/codecs/da7213.c