Revert "MIPS: BCM47XX: Enable 74K Core ExternalSync for PCIe erratum"
authorRafał Miłecki <rafal@milecki.pl>
Fri, 27 Jul 2018 11:13:39 +0000 (13:13 +0200)
committerPaul Burton <paul.burton@mips.com>
Fri, 27 Jul 2018 17:07:32 +0000 (10:07 -0700)
commitd5ea019f8a381f88545bb26993b62ec24a2796b7
tree5e06f16aa8e1bb9f60bab49f2d2db27f496eeccc
parentd72e90f33aa4709ebecc5005562f52335e106a60
Revert "MIPS: BCM47XX: Enable 74K Core ExternalSync for PCIe erratum"

This reverts commit 2a027b47dba6 ("MIPS: BCM47XX: Enable 74K Core
ExternalSync for PCIe erratum").

Enabling ExternalSync caused a regression for BCM4718A1 (used e.g. in
Netgear E3000 and ASUS RT-N16): it simply hangs during PCIe
initialization. It's likely that BCM4717A1 is also affected.

I didn't notice that earlier as the only BCM47XX devices with PCIe I
own are:
1) BCM4706 with 2 x 14e4:4331
2) BCM4706 with 14e4:4360 and 14e4:4331
it appears that BCM4706 is unaffected.

While BCM5300X-ES300-RDS.pdf seems to document that erratum and its
workarounds (according to quotes provided by Tokunori) it seems not even
Broadcom follows them.

According to the provided info Broadcom should define CONF7_ES in their
SDK's mipsinc.h and implement workaround in the si_mips_init(). Checking
both didn't reveal such code. It *could* mean Broadcom also had some
problems with the given workaround.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Reported-by: Michael Marley <michael@michaelmarley.com>
Patchwork: https://patchwork.linux-mips.org/patch/20032/
URL: https://bugs.openwrt.org/index.php?do=details&task_id=1688
Cc: Tokunori Ikegami <ikegami@allied-telesis.co.jp>
Cc: Hauke Mehrtens <hauke@hauke-m.de>
Cc: Chris Packham <chris.packham@alliedtelesis.co.nz>
Cc: James Hogan <jhogan@kernel.org>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org
arch/mips/bcm47xx/setup.c
arch/mips/include/asm/mipsregs.h