[ARM] xsc3: fix xsc3_l2_inv_range
authorDan Williams <dan.j.williams@intel.com>
Fri, 7 Nov 2008 00:43:55 +0000 (17:43 -0700)
committerDan Williams <dan.j.williams@intel.com>
Thu, 6 Nov 2008 17:48:29 +0000 (10:48 -0700)
commitc7cf72dcadbe39c2077b32460f86c9f8167be3be
tree66984afe9b390596d1ae97e35aaeb4e6f52c412d
parent45beca08dd8b6d6a65c5ffd730af2eac7a2c7a03
[ARM] xsc3: fix xsc3_l2_inv_range

When 'start' and 'end' are less than a cacheline apart and 'start' is
unaligned we are done after cleaning and invalidating the first
cacheline.  So check for (start < end) which will not walk off into
invalid address ranges when (start > end).

This issue was caught by drivers/dma/dmatest.

2.6.27 is susceptible.

Cc: <stable@kernel.org>
Cc: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Cc: Lothar WaÃ<9f>mann <LW@KARO-electronics.de>
Cc: Lennert Buytenhek <buytenh@marvell.com>
Cc: Eric Miao <eric.miao@marvell.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
arch/arm/mm/cache-xsc3l2.c