i2c: designware: Manually set RESTART bit between messages
authorChew, Chiau Ee <chiau.ee.chew@intel.com>
Fri, 21 Jun 2013 07:05:28 +0000 (15:05 +0800)
committerWolfram Sang <wsa@the-dreams.de>
Wed, 7 Aug 2013 14:58:07 +0000 (16:58 +0200)
commit825642455367e5498da82a8044dd345ac7869c8d
tree999b3a3e79b0b5cfb8059a54720127427bda4b7a
parent9d3dda5c0d092d6bc9911bf24de81350d47c6be6
i2c: designware: Manually set RESTART bit between messages

If both IC_EMPTYFIFO_HOLD_MASTER_EN and IC_RESTART_EN are set to 1, the
Designware I2C controller doesn't generate RESTART unless user specifically
requests it by setting RESTART bit in IC_DATA_CMD register.

Since IC_EMPTYFIFO_HOLD_MASTER_EN setting can't be detected from hardware
register, we must always manually set the restart bit between messages.

Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
drivers/i2c/busses/i2c-designware-core.c