i915/dp/fec: Configure the Forward Error Correction bits.
authorAnusha Srivatsa <anusha.srivatsa@intel.com>
Wed, 28 Nov 2018 20:26:27 +0000 (12:26 -0800)
committerManasi Navare <manasi.d.navare@intel.com>
Thu, 29 Nov 2018 20:34:51 +0000 (12:34 -0800)
commit5c44b938629a81641e283f0b84e1d8cf48cbdc41
tree36fac9c9512fce0d0500daf73a89f6e865ed2f87
parenta322b97589a6af4b87978d200645aac562fc746f
i915/dp/fec: Configure the Forward Error Correction bits.

If FEC is supported, the corresponding
DP_TP_CTL register bits have to be configured.

The driver has to program the FEC_ENABLE in DP_TP_CTL[30] register
and wait till FEC_STATUS in DP_TP_CTL[28] is 1.
Also add the warn message to make sure that the control
register is already active while enabling FEC.

v2:
- Change commit message. Configure fec state after
  link training (Manasi, Gaurav)
- Remove redundent checks (Manasi)
- Remove the registers that get added automagically (Anusha)

v3: s/intel_dp_set_fec_state()/intel_dp_enable_fec_state() (Gaurav)

v4: rebased.

v5:
- Move the code to the proper spot, according to spec.(Ville)
- Use fec state as a check too.

v6: Pass intel_encoder, instead of intel_dp. (Ville)

v7: Remove unwanted comments (Manasi)

Cc: dri-devel@lists.freedesktop.org
Cc: Gaurav K Singh <gaurav.k.singh@intel.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181128202628.20238-16-manasi.d.navare@intel.com
drivers/gpu/drm/i915/i915_reg.h
drivers/gpu/drm/i915/intel_ddi.c