drm/i915/icl: MBUS B credit change
authorRodrigo Vivi <rodrigo.vivi@intel.com>
Thu, 4 Oct 2018 15:18:14 +0000 (08:18 -0700)
committerRodrigo Vivi <rodrigo.vivi@intel.com>
Fri, 5 Oct 2018 20:52:12 +0000 (13:52 -0700)
commit443d5e3973e8e774addd830bc1091498b49b4bf2
treea3f9b34353461a036e65439703f2e3f51a693029
parentdfdaa566b7d4ecbfcabbb624bc45c5221f142039
drm/i915/icl: MBUS B credit change

No functional change. But just a minor change to keep
up with Spec, since it has changed since commit c3cc39c539d4
("drm/i915/icl: program mbus during pipe enable")

The instructions previously said to program pipe's
B credit = 24 / number of pipes, which is 8 for ICL.
Now the spec gives us direct values independent of number
of pipes. Let's keep in sync.

Also just a reorder on fields to make easier to compare
against spec's sequence: A -> BW -> B.

Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Cc: Mahesh Kumar <mahesh1.kumar@intel.com>
Cc: Arthur J Runyan <arthur.j.runyan@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Mahesh Kumar <mahesh1.kumar@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181004151814.6054-1-rodrigo.vivi@intel.com
drivers/gpu/drm/i915/intel_display.c