drm/i915/icl: Get pipe timings for DSI
authorMadhav Chauhan <madhav.chauhan@intel.com>
Thu, 29 Nov 2018 14:12:28 +0000 (16:12 +0200)
committerJani Nikula <jani.nikula@intel.com>
Mon, 3 Dec 2018 13:54:44 +0000 (15:54 +0200)
commit2eae5d6bfa5f5d3e815cd0c76d864c0ff09b2c4c
tree4b84e503b7c0b95591980514ab999bd5759448dc
parent2ca711caeca2c6a4f3026d9fbdb135b65d7d68b3
drm/i915/icl: Get pipe timings for DSI

Transcoder timings for Gen11 DSI encoder
is available at pipe level unlike in older platform
where port specific registers need to be accessed.

v2 by Jani:
 - get timings for (!dsi || icl) instead of (dsi && icl).

Signed-off-by: Madhav Chauhan <madhav.chauhan@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/f60e0c1aee08248e758da3219d3239898b43ba41.1543500286.git.jani.nikula@intel.com
drivers/gpu/drm/i915/intel_display.c