KVM: MIPS/TLB: Handle virtually tagged icaches
authorJames Hogan <james.hogan@imgtec.com>
Tue, 14 Mar 2017 10:25:46 +0000 (10:25 +0000)
committerJames Hogan <james.hogan@imgtec.com>
Tue, 28 Mar 2017 14:36:17 +0000 (15:36 +0100)
commit1c506c9c104cf01d01a9633ad2e76f15f938c54c
tree27df069d8a6e31f4c76f4bfb18790727ae3d50c7
parent4fa9de5a645a9770679032a7eea0604f9a36eaf3
KVM: MIPS/TLB: Handle virtually tagged icaches

When TLB entries are invalidated in the presence of a virtually tagged
icache, such as that found on Octeon CPUs, flush the icache so that we
don't get a reserved instruction exception even though the TLB mapping
is removed.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: "Radim Krčmář" <rkrcmar@redhat.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: David Daney <david.daney@cavium.com>
Cc: Andreas Herrmann <andreas.herrmann@caviumnetworks.com>
Cc: linux-mips@linux-mips.org
Cc: kvm@vger.kernel.org
arch/mips/kvm/tlb.c