Merge branch 'fix/asoc' into for-linus

[sfrench/cifs-2.6.git] / sound / soc / omap / omap-mcbsp.c

diff --git a/sound/soc/omap/omap-mcbsp.c b/sound/soc/omap/omap-mcbsp.c
index d6882be33452ae3c6b63140b984d392e0f2e3f61..90f4df7fd906bd4feece5f1cfce73ab28db611c1 100644 (file)
--- a/sound/soc/omap/omap-mcbsp.c
+++ b/sound/soc/omap/omap-mcbsp.c
@@ -146,6 +146,17 @@ static int omap_mcbsp_dai_startup(struct snd_pcm_substream *substream,
        struct omap_mcbsp_data *mcbsp_data = to_mcbsp(cpu_dai->private_data);
        int err = 0;
 
+       if (cpu_is_omap343x() && mcbsp_data->bus_id == 1) {
+               /*
+                * McBSP2 in OMAP3 has 1024 * 32-bit internal audio buffer.
+                * Set constraint for minimum buffer size to the same than FIFO
+                * size in order to avoid underruns in playback startup because
+                * HW is keeping the DMA request active until FIFO is filled.
+                */
+               snd_pcm_hw_constraint_minmax(substream->runtime,
+                       SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 4096, UINT_MAX);
+       }
+
        if (!cpu_dai->active)
                err = omap_mcbsp_request(mcbsp_data->bus_id);
 
@@ -272,7 +283,7 @@ static int omap_mcbsp_dai_hw_params(struct snd_pcm_substream *substream,
                break;
        case SND_SOC_DAIFMT_DSP_B:
                regs->srgr2     |= FPER(wlen * channels - 1);
-               regs->srgr1     |= FWID(wlen * channels - 2);
+               regs->srgr1     |= FWID(0);
                break;
        }
 
@@ -291,6 +302,7 @@ static int omap_mcbsp_dai_set_dai_fmt(struct snd_soc_dai *cpu_dai,
 {
        struct omap_mcbsp_data *mcbsp_data = to_mcbsp(cpu_dai->private_data);
        struct omap_mcbsp_reg_cfg *regs = &mcbsp_data->regs;
+       unsigned int temp_fmt = fmt;
 
        if (mcbsp_data->configured)
                return 0;
@@ -317,6 +329,8 @@ static int omap_mcbsp_dai_set_dai_fmt(struct snd_soc_dai *cpu_dai,
                /* 0-bit data delay */
                regs->rcr2      |= RDATDLY(0);
                regs->xcr2      |= XDATDLY(0);
+               /* Invert FS polarity configuration */
+               temp_fmt ^= SND_SOC_DAIFMT_NB_IF;
                break;
        default:
                /* Unsupported data format */
@@ -340,7 +354,7 @@ static int omap_mcbsp_dai_set_dai_fmt(struct snd_soc_dai *cpu_dai,
        }
 
        /* Set bit clock (CLKX/CLKR) and FS polarities */
-       switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
+       switch (temp_fmt & SND_SOC_DAIFMT_INV_MASK) {
        case SND_SOC_DAIFMT_NB_NF:
                /*
                 * Normal BCLK + FS.