fbdev: s1d13xxxfb: add accelerated bitblt functions

[sfrench/cifs-2.6.git] / include / video / s1d13xxxfb.h

diff --git a/include/video/s1d13xxxfb.h b/include/video/s1d13xxxfb.h
index fe41b84079460033618a0598fa424aefc6c55576..f0736cff2ca3f15f2762634726f55a6f27af22e7 100644 (file)
--- a/include/video/s1d13xxxfb.h
+++ b/include/video/s1d13xxxfb.h
@@ -14,13 +14,16 @@
 #define        S1D13XXXFB_H
 
 #define S1D_PALETTE_SIZE               256
-#define S1D13506_CHIP_REV              4       /* expected chip revision number for s1d13506 */
-#define S1D13806_CHIP_REV              7       /* expected chip revision number for s1d13806 */
-#define S1D_FBID                       "S1D13806"
-#define S1D_DEVICENAME                 "s1d13806fb"
+#define S1D_FBID                       "S1D13xxx"
+#define S1D_DEVICENAME                 "s1d13xxxfb"
+
+/* S1DREG_REV_CODE register = prod_id (6 bits) + revision (2 bits) */
+#define S1D13505_PROD_ID               0x3     /* 000011 */
+#define S1D13506_PROD_ID               0x4     /* 000100 */
+#define S1D13806_PROD_ID               0x7     /* 000111 */
 
 /* register definitions (tested on s1d13896) */
-#define S1DREG_REV_CODE                        0x0000  /* Revision Code Register */
+#define S1DREG_REV_CODE                        0x0000  /* Prod + Rev Code Register */
 #define S1DREG_MISC                    0x0001  /* Miscellaneous Register */
 #define S1DREG_GPIO_CNF0               0x0004  /* General IO Pins Configuration Register 0 */
 #define S1DREG_GPIO_CNF1               0x0005  /* General IO Pins Configuration Register 1 */
@@ -133,6 +136,15 @@
 #define S1DREG_DELAYOFF                        0xFFFE
 #define S1DREG_DELAYON                 0xFFFF
 
+#define BBLT_FIFO_EMPTY                        0x00
+#define BBLT_FIFO_NOT_EMPTY            0x40
+#define BBLT_FIFO_NOT_FULL             0x30
+#define BBLT_FIFO_HALF_FULL            0x20
+#define BBLT_FIFO_FULL                 0x10
+
+#define BBLT_SOLID_FILL                        0x0c
+
+
 /* Note: all above defines should go in separate header files
    when implementing other S1D13xxx chip support. */
 
@@ -141,10 +153,11 @@ struct s1d13xxxfb_regval {
        u8      value;
 };
 
-
 struct s1d13xxxfb_par {
        void __iomem    *regs;
        unsigned char   display;
+       unsigned char   prod_id;
+       unsigned char   revision;
 
        unsigned int    pseudo_palette[16];
 #ifdef CONFIG_PM