net/mlx5: FW tracer, add hardware structures

[sfrench/cifs-2.6.git] / include / linux / mlx5 / mlx5_ifc.h

diff --git a/include/linux/mlx5/mlx5_ifc.h b/include/linux/mlx5/mlx5_ifc.h
index 27134c4fcb76eb5140ff4828066e73e11d671cd9..bd7b71f54d590857e08eb5aae6c858cdc24a8a50 100644 (file)
--- a/include/linux/mlx5/mlx5_ifc.h
+++ b/include/linux/mlx5/mlx5_ifc.h
@@ -75,6 +75,15 @@ enum {
        MLX5_SET_HCA_CAP_OP_MOD_ATOMIC                = 0x3,
 };
 
+enum {
+       MLX5_GENERAL_OBJ_TYPES_CAP_UCTX = (1ULL << 4),
+       MLX5_GENERAL_OBJ_TYPES_CAP_UMEM = (1ULL << 5),
+};
+
+enum {
+       MLX5_OBJ_TYPE_UCTX = 0x0004,
+};
+
 enum {
        MLX5_CMD_OP_QUERY_HCA_CAP                 = 0x100,
        MLX5_CMD_OP_QUERY_ADAPTER                 = 0x101,
@@ -242,6 +251,8 @@ enum {
        MLX5_CMD_OP_FPGA_QUERY_QP                 = 0x962,
        MLX5_CMD_OP_FPGA_DESTROY_QP               = 0x963,
        MLX5_CMD_OP_FPGA_QUERY_QP_COUNTERS        = 0x964,
+       MLX5_CMD_OP_CREATE_GENERAL_OBJECT         = 0xa00,
+       MLX5_CMD_OP_DESTROY_GENERAL_OBJECT        = 0xa03,
        MLX5_CMD_OP_MAX
 };
 
@@ -874,7 +885,9 @@ struct mlx5_ifc_cmd_hca_cap_bits {
        u8         log_max_eq_sz[0x8];
        u8         reserved_at_e8[0x2];
        u8         log_max_mkey[0x6];
-       u8         reserved_at_f0[0xc];
+       u8         reserved_at_f0[0x8];
+       u8         dump_fill_mkey[0x1];
+       u8         reserved_at_f9[0x3];
        u8         log_max_eq[0x4];
 
        u8         max_indirection[0x8];
@@ -1113,7 +1126,9 @@ struct mlx5_ifc_cmd_hca_cap_bits {
        u8         reserved_at_3f8[0x3];
        u8         log_max_current_uc_list[0x5];
 
-       u8         reserved_at_400[0x80];
+       u8         general_obj_types[0x40];
+
+       u8         reserved_at_440[0x40];
 
        u8         reserved_at_480[0x3];
        u8         log_max_l2_table[0x5];
@@ -1668,7 +1683,11 @@ struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits {
 
        u8         rx_buffer_full_low[0x20];
 
-       u8         reserved_at_1c0[0x600];
+       u8         rx_icrc_encapsulated_high[0x20];
+
+       u8         rx_icrc_encapsulated_low[0x20];
+
+       u8         reserved_at_200[0x5c0];
 };
 
 struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits {
@@ -8031,8 +8050,9 @@ struct mlx5_ifc_peir_reg_bits {
 };
 
 struct mlx5_ifc_pcam_enhanced_features_bits {
-       u8         reserved_at_0[0x76];
-
+       u8         reserved_at_0[0x6d];
+       u8         rx_icrc_encapsulated_counter[0x1];
+       u8         reserved_at_6e[0x8];
        u8         pfcc_mask[0x1];
        u8         reserved_at_77[0x4];
        u8         rx_buffer_fullness_counters[0x1];
@@ -8092,7 +8112,9 @@ struct mlx5_ifc_mcam_access_reg_bits {
        u8         mcqi[0x1];
        u8         reserved_at_1f[0x1];
 
-       u8         regs_95_to_64[0x20];
+       u8         regs_95_to_68[0x1c];
+       u8         tracer_registers[0x4];
+
        u8         regs_63_to_32[0x20];
        u8         regs_31_to_0[0x20];
 };
@@ -9115,4 +9137,113 @@ struct mlx5_ifc_dealloc_memic_out_bits {
        u8         reserved_at_40[0x40];
 };
 
+struct mlx5_ifc_general_obj_in_cmd_hdr_bits {
+       u8         opcode[0x10];
+       u8         uid[0x10];
+
+       u8         reserved_at_20[0x10];
+       u8         obj_type[0x10];
+
+       u8         obj_id[0x20];
+
+       u8         reserved_at_60[0x20];
+};
+
+struct mlx5_ifc_general_obj_out_cmd_hdr_bits {
+       u8         status[0x8];
+       u8         reserved_at_8[0x18];
+
+       u8         syndrome[0x20];
+
+       u8         obj_id[0x20];
+
+       u8         reserved_at_60[0x20];
+};
+
+struct mlx5_ifc_umem_bits {
+       u8         modify_field_select[0x40];
+
+       u8         reserved_at_40[0x5b];
+       u8         log_page_size[0x5];
+
+       u8         page_offset[0x20];
+
+       u8         num_of_mtt[0x40];
+
+       struct mlx5_ifc_mtt_bits  mtt[0];
+};
+
+struct mlx5_ifc_uctx_bits {
+       u8         modify_field_select[0x40];
+
+       u8         reserved_at_40[0x1c0];
+};
+
+struct mlx5_ifc_create_umem_in_bits {
+       struct mlx5_ifc_general_obj_in_cmd_hdr_bits   hdr;
+       struct mlx5_ifc_umem_bits                     umem;
+};
+
+struct mlx5_ifc_create_uctx_in_bits {
+       struct mlx5_ifc_general_obj_in_cmd_hdr_bits   hdr;
+       struct mlx5_ifc_uctx_bits                     uctx;
+};
+
+struct mlx5_ifc_mtrc_string_db_param_bits {
+       u8         string_db_base_address[0x20];
+
+       u8         reserved_at_20[0x8];
+       u8         string_db_size[0x18];
+};
+
+struct mlx5_ifc_mtrc_cap_bits {
+       u8         trace_owner[0x1];
+       u8         trace_to_memory[0x1];
+       u8         reserved_at_2[0x4];
+       u8         trc_ver[0x2];
+       u8         reserved_at_8[0x14];
+       u8         num_string_db[0x4];
+
+       u8         first_string_trace[0x8];
+       u8         num_string_trace[0x8];
+       u8         reserved_at_30[0x28];
+
+       u8         log_max_trace_buffer_size[0x8];
+
+       u8         reserved_at_60[0x20];
+
+       struct mlx5_ifc_mtrc_string_db_param_bits string_db_param[8];
+
+       u8         reserved_at_280[0x180];
+};
+
+struct mlx5_ifc_mtrc_conf_bits {
+       u8         reserved_at_0[0x1c];
+       u8         trace_mode[0x4];
+       u8         reserved_at_20[0x18];
+       u8         log_trace_buffer_size[0x8];
+       u8         trace_mkey[0x20];
+       u8         reserved_at_60[0x3a0];
+};
+
+struct mlx5_ifc_mtrc_stdb_bits {
+       u8         string_db_index[0x4];
+       u8         reserved_at_4[0x4];
+       u8         read_size[0x18];
+       u8         start_offset[0x20];
+       u8         string_db_data[0];
+};
+
+struct mlx5_ifc_mtrc_ctrl_bits {
+       u8         trace_status[0x2];
+       u8         reserved_at_2[0x2];
+       u8         arm_event[0x1];
+       u8         reserved_at_5[0xb];
+       u8         modify_field_select[0x10];
+       u8         reserved_at_20[0x2b];
+       u8         current_timestamp52_32[0x15];
+       u8         current_timestamp31_0[0x20];
+       u8         reserved_at_80[0x180];
+};
+
 #endif /* MLX5_IFC_H */