net/mlx5: Add cap bits for flow table destination in FDB table

[sfrench/cifs-2.6.git] / include / linux / mlx5 / mlx5_ifc.h

diff --git a/include/linux/mlx5/mlx5_ifc.h b/include/linux/mlx5/mlx5_ifc.h
index 1aad455538f40836635d352a06c20955d6ec5ef7..05b480fae27d17ebbecf94538702db5f148de9fb 100644 (file)
--- a/include/linux/mlx5/mlx5_ifc.h
+++ b/include/linux/mlx5/mlx5_ifc.h
@@ -356,22 +356,6 @@ struct mlx5_ifc_odp_per_transport_service_cap_bits {
        u8         reserved_at_6[0x1a];
 };
 
-struct mlx5_ifc_ipv4_layout_bits {
-       u8         reserved_at_0[0x60];
-
-       u8         ipv4[0x20];
-};
-
-struct mlx5_ifc_ipv6_layout_bits {
-       u8         ipv6[16][0x8];
-};
-
-union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits {
-       struct mlx5_ifc_ipv6_layout_bits ipv6_layout;
-       struct mlx5_ifc_ipv4_layout_bits ipv4_layout;
-       u8         reserved_at_0[0x80];
-};
-
 struct mlx5_ifc_fte_match_set_lyr_2_4_bits {
        u8         smac_47_16[0x20];
 
@@ -412,7 +396,7 @@ struct mlx5_ifc_fte_match_set_misc_bits {
        u8         reserved_at_0[0x8];
        u8         source_sqn[0x18];
 
-       u8         reserved_at_20[0x10];
+       u8         source_eswitch_owner_vhca_id[0x10];
        u8         source_port[0x10];
 
        u8         outer_second_prio[0x3];
@@ -540,7 +524,9 @@ struct mlx5_ifc_flow_table_nic_cap_bits {
 };
 
 struct mlx5_ifc_flow_table_eswitch_cap_bits {
-       u8     reserved_at_0[0x200];
+       u8      reserved_at_0[0x1c];
+       u8      fdb_multi_path_to_table[0x1];
+       u8      reserved_at_1d[0x1e3];
 
        struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_esw_fdb;
 
@@ -557,7 +543,8 @@ struct mlx5_ifc_e_switch_cap_bits {
        u8         vport_svlan_insert[0x1];
        u8         vport_cvlan_insert_if_not_exist[0x1];
        u8         vport_cvlan_insert_overwrite[0x1];
-       u8         reserved_at_5[0x19];
+       u8         reserved_at_5[0x18];
+       u8         merged_eswitch[0x1];
        u8         nic_vport_node_guid_modify[0x1];
        u8         nic_vport_port_guid_modify[0x1];
 
@@ -1147,8 +1134,9 @@ enum mlx5_flow_destination_type {
 struct mlx5_ifc_dest_format_struct_bits {
        u8         destination_type[0x8];
        u8         destination_id[0x18];
-
-       u8         reserved_at_20[0x20];
+       u8         destination_eswitch_owner_vhca_id_valid[0x1];
+       u8         reserved_at_21[0xf];
+       u8         destination_eswitch_owner_vhca_id[0x10];
 };
 
 struct mlx5_ifc_flow_counter_list_bits {
@@ -6993,7 +6981,9 @@ struct mlx5_ifc_create_flow_group_in_bits {
        u8         reserved_at_a0[0x8];
        u8         table_id[0x18];
 
-       u8         reserved_at_c0[0x20];
+       u8         source_eswitch_owner_vhca_id_valid[0x1];
+
+       u8         reserved_at_c1[0x1f];
 
        u8         start_flow_index[0x20];
 
@@ -8015,6 +8005,17 @@ struct mlx5_ifc_pcam_enhanced_features_bits {
        u8         ppcnt_statistical_group[0x1];
 };
 
+struct mlx5_ifc_pcam_regs_5000_to_507f_bits {
+       u8         port_access_reg_cap_mask_127_to_96[0x20];
+       u8         port_access_reg_cap_mask_95_to_64[0x20];
+       u8         port_access_reg_cap_mask_63_to_32[0x20];
+
+       u8         port_access_reg_cap_mask_31_to_13[0x13];
+       u8         pbmc[0x1];
+       u8         pptb[0x1];
+       u8         port_access_reg_cap_mask_10_to_0[0xb];
+};
+
 struct mlx5_ifc_pcam_reg_bits {
        u8         reserved_at_0[0x8];
        u8         feature_group[0x8];
@@ -8024,6 +8025,7 @@ struct mlx5_ifc_pcam_reg_bits {
        u8         reserved_at_20[0x20];
 
        union {
+               struct mlx5_ifc_pcam_regs_5000_to_507f_bits regs_5000_to_507f;
                u8         reserved_at_0[0x80];
        } port_access_reg_cap_mask;
 
@@ -8788,6 +8790,41 @@ struct mlx5_ifc_qpts_reg_bits {
        u8         trust_state[0x3];
 };
 
+struct mlx5_ifc_pptb_reg_bits {
+       u8         reserved_at_0[0x2];
+       u8         mm[0x2];
+       u8         reserved_at_4[0x4];
+       u8         local_port[0x8];
+       u8         reserved_at_10[0x6];
+       u8         cm[0x1];
+       u8         um[0x1];
+       u8         pm[0x8];
+
+       u8         prio_x_buff[0x20];
+
+       u8         pm_msb[0x8];
+       u8         reserved_at_48[0x10];
+       u8         ctrl_buff[0x4];
+       u8         untagged_buff[0x4];
+};
+
+struct mlx5_ifc_pbmc_reg_bits {
+       u8         reserved_at_0[0x8];
+       u8         local_port[0x8];
+       u8         reserved_at_10[0x10];
+
+       u8         xoff_timer_value[0x10];
+       u8         xoff_refresh[0x10];
+
+       u8         reserved_at_40[0x9];
+       u8         fullness_threshold[0x7];
+       u8         port_buffer_size[0x10];
+
+       struct mlx5_ifc_bufferx_reg_bits buffer[10];
+
+       u8         reserved_at_2e0[0x40];
+};
+
 struct mlx5_ifc_qtct_reg_bits {
        u8         reserved_at_0[0x8];
        u8         port_number[0x8];