net/mlx5: Expose PCAM, MCAM registers infrastructure
[sfrench/cifs-2.6.git] / include / linux / mlx5 / device.h
index 9f489365b3d39c2400fd2fd19099ca98803396d7..79f38e67fe2f1ff3347c6aad5a4401dd50ae4a5e 100644 (file)
@@ -212,10 +212,20 @@ enum {
 };
 
 enum {
-       MLX5_BF_REGS_PER_PAGE           = 4,
-       MLX5_MAX_UAR_PAGES              = 1 << 8,
-       MLX5_NON_FP_BF_REGS_PER_PAGE    = 2,
-       MLX5_MAX_UUARS  = MLX5_MAX_UAR_PAGES * MLX5_NON_FP_BF_REGS_PER_PAGE,
+       MLX5_ADAPTER_PAGE_SHIFT         = 12,
+       MLX5_ADAPTER_PAGE_SIZE          = 1 << MLX5_ADAPTER_PAGE_SHIFT,
+};
+
+enum {
+       MLX5_BFREGS_PER_UAR             = 4,
+       MLX5_MAX_UARS                   = 1 << 8,
+       MLX5_NON_FP_BFREGS_PER_UAR      = 2,
+       MLX5_FP_BFREGS_PER_UAR          = MLX5_BFREGS_PER_UAR -
+                                         MLX5_NON_FP_BFREGS_PER_UAR,
+       MLX5_MAX_BFREGS                 = MLX5_MAX_UARS *
+                                         MLX5_NON_FP_BFREGS_PER_UAR,
+       MLX5_UARS_IN_PAGE               = PAGE_SIZE / MLX5_ADAPTER_PAGE_SIZE,
+       MLX5_NON_FP_BFREGS_IN_PAGE      = MLX5_NON_FP_BFREGS_PER_UAR * MLX5_UARS_IN_PAGE,
 };
 
 enum {
@@ -279,6 +289,7 @@ enum mlx5_event {
        MLX5_EVENT_TYPE_GPIO_EVENT         = 0x15,
        MLX5_EVENT_TYPE_PORT_MODULE_EVENT  = 0x16,
        MLX5_EVENT_TYPE_REMOTE_CONFIG      = 0x19,
+       MLX5_EVENT_TYPE_PPS_EVENT          = 0x25,
 
        MLX5_EVENT_TYPE_DB_BF_CONGESTION   = 0x1a,
        MLX5_EVENT_TYPE_STALL_EVENT        = 0x1b,
@@ -388,11 +399,6 @@ enum {
        MLX5_MAX_PAGE_SHIFT             = 31
 };
 
-enum {
-       MLX5_ADAPTER_PAGE_SHIFT         = 12,
-       MLX5_ADAPTER_PAGE_SIZE          = 1 << MLX5_ADAPTER_PAGE_SHIFT,
-};
-
 enum {
        MLX5_CAP_OFF_CMDIF_CSUM         = 46,
 };
@@ -534,7 +540,9 @@ struct mlx5_eqe_page_fault {
                        __be16  wqe_index;
                        u16     reserved2;
                        __be16  packet_length;
-                       u8      reserved3[12];
+                       __be32  token;
+                       u8      reserved4[8];
+                       __be32  pftype_wq;
                } __packed wqe;
                struct {
                        __be32  r_key;
@@ -542,9 +550,9 @@ struct mlx5_eqe_page_fault {
                        __be16  packet_length;
                        __be32  rdma_op_len;
                        __be64  rdma_va;
+                       __be32  pftype_token;
                } __packed rdma;
        } __packed;
-       __be32 flags_qpn;
 } __packed;
 
 struct mlx5_eqe_vport_change {
@@ -562,6 +570,22 @@ struct mlx5_eqe_port_module {
        u8        error_type;
 } __packed;
 
+struct mlx5_eqe_pps {
+       u8              rsvd0[3];
+       u8              pin;
+       u8              rsvd1[4];
+       union {
+               struct {
+                       __be32          time_sec;
+                       __be32          time_nsec;
+               };
+               struct {
+                       __be64          time_stamp;
+               };
+       };
+       u8              rsvd2[12];
+} __packed;
+
 union ev_data {
        __be32                          raw[7];
        struct mlx5_eqe_cmd             cmd;
@@ -576,6 +600,7 @@ union ev_data {
        struct mlx5_eqe_page_fault      page_fault;
        struct mlx5_eqe_vport_change    vport_change;
        struct mlx5_eqe_port_module     port_module;
+       struct mlx5_eqe_pps             pps;
 } __packed;
 
 struct mlx5_eqe {
@@ -945,6 +970,22 @@ enum mlx5_cap_type {
        MLX5_CAP_NUM
 };
 
+enum mlx5_pcam_reg_groups {
+       MLX5_PCAM_REGS_5000_TO_507F                 = 0x0,
+};
+
+enum mlx5_pcam_feature_groups {
+       MLX5_PCAM_FEATURE_ENHANCED_FEATURES         = 0x0,
+};
+
+enum mlx5_mcam_reg_groups {
+       MLX5_MCAM_REGS_FIRST_128                    = 0x0,
+};
+
+enum mlx5_mcam_feature_groups {
+       MLX5_MCAM_FEATURE_ENHANCED_FEATURES         = 0x0,
+};
+
 /* GET Dev Caps macros */
 #define MLX5_CAP_GEN(mdev, cap) \
        MLX5_GET(cmd_hca_cap, mdev->hca_caps_cur[MLX5_CAP_GENERAL], cap)
@@ -1071,11 +1112,6 @@ enum {
        MLX5_INFINIBAND_PORT_COUNTERS_GROUP   = 0x20,
 };
 
-enum {
-       MLX5_PCIE_PERFORMANCE_COUNTERS_GROUP       = 0x0,
-       MLX5_PCIE_TIMERS_AND_STATES_COUNTERS_GROUP = 0x2,
-};
-
 static inline u16 mlx5_to_sw_pkey_sz(int pkey_sz)
 {
        if (pkey_sz > MLX5_MAX_LOG_PKEY_TABLE)