Merge branches 'intel_pstate', 'pm-cpufreq' and 'pm-cpufreq-sched'

[sfrench/cifs-2.6.git] / drivers / watchdog / sama5d4_wdt.c

diff --git a/drivers/watchdog/sama5d4_wdt.c b/drivers/watchdog/sama5d4_wdt.c
index f709962018ac260107dd2c419c1fbcdfafd4599b..362fd229786df6cea1600108a9060b89b800f475 100644 (file)
--- a/drivers/watchdog/sama5d4_wdt.c
+++ b/drivers/watchdog/sama5d4_wdt.c
@@ -6,6 +6,7 @@
  * Licensed under GPLv2.
  */
 
+#include <linux/delay.h>
 #include <linux/interrupt.h>
 #include <linux/io.h>
 #include <linux/kernel.h>
@@ -29,6 +30,7 @@ struct sama5d4_wdt {
        struct watchdog_device  wdd;
        void __iomem            *reg_base;
        u32                     mr;
+       unsigned long           last_ping;
 };
 
 static int wdt_timeout = WDT_DEFAULT_TIMEOUT;
@@ -44,11 +46,34 @@ MODULE_PARM_DESC(nowayout,
        "Watchdog cannot be stopped once started (default="
        __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
 
+#define wdt_enabled (!(wdt->mr & AT91_WDT_WDDIS))
+
 #define wdt_read(wdt, field) \
        readl_relaxed((wdt)->reg_base + (field))
 
-#define wdt_write(wtd, field, val) \
-       writel_relaxed((val), (wdt)->reg_base + (field))
+/* 4 slow clock periods is 4/32768 = 122.07µs*/
+#define WDT_DELAY      usecs_to_jiffies(123)
+
+static void wdt_write(struct sama5d4_wdt *wdt, u32 field, u32 val)
+{
+       /*
+        * WDT_CR and WDT_MR must not be modified within three slow clock
+        * periods following a restart of the watchdog performed by a write
+        * access in WDT_CR.
+        */
+       while (time_before(jiffies, wdt->last_ping + WDT_DELAY))
+               usleep_range(30, 125);
+       writel_relaxed(val, wdt->reg_base + field);
+       wdt->last_ping = jiffies;
+}
+
+static void wdt_write_nosleep(struct sama5d4_wdt *wdt, u32 field, u32 val)
+{
+       if (time_before(jiffies, wdt->last_ping + WDT_DELAY))
+               udelay(123);
+       writel_relaxed(val, wdt->reg_base + field);
+       wdt->last_ping = jiffies;
+}
 
 static int sama5d4_wdt_start(struct watchdog_device *wdd)
 {
@@ -89,7 +114,16 @@ static int sama5d4_wdt_set_timeout(struct watchdog_device *wdd,
        wdt->mr &= ~AT91_WDT_WDD;
        wdt->mr |= AT91_WDT_SET_WDV(value);
        wdt->mr |= AT91_WDT_SET_WDD(value);
-       wdt_write(wdt, AT91_WDT_MR, wdt->mr);
+
+       /*
+        * WDDIS has to be 0 when updating WDD/WDV. The datasheet states: When
+        * setting the WDDIS bit, and while it is set, the fields WDV and WDD
+        * must not be modified.
+        * If the watchdog is enabled, then the timeout can be updated. Else,
+        * wait that the user enables it.
+        */
+       if (wdt_enabled)
+               wdt_write(wdt, AT91_WDT_MR, wdt->mr & ~AT91_WDT_WDDIS);
 
        wdd->timeout = timeout;
 
@@ -145,23 +179,21 @@ static int of_sama5d4_wdt_init(struct device_node *np, struct sama5d4_wdt *wdt)
 
 static int sama5d4_wdt_init(struct sama5d4_wdt *wdt)
 {
-       struct watchdog_device *wdd = &wdt->wdd;
-       u32 value = WDT_SEC2TICKS(wdd->timeout);
        u32 reg;
-
        /*
-        * Because the fields WDV and WDD must not be modified when the WDDIS
-        * bit is set, so clear the WDDIS bit before writing the WDT_MR.
+        * When booting and resuming, the bootloader may have changed the
+        * watchdog configuration.
+        * If the watchdog is already running, we can safely update it.
+        * Else, we have to disable it properly.
         */
-       reg = wdt_read(wdt, AT91_WDT_MR);
-       reg &= ~AT91_WDT_WDDIS;
-       wdt_write(wdt, AT91_WDT_MR, reg);
-
-       wdt->mr |= AT91_WDT_SET_WDD(value);
-       wdt->mr |= AT91_WDT_SET_WDV(value);
-
-       wdt_write(wdt, AT91_WDT_MR, wdt->mr);
-
+       if (wdt_enabled) {
+               wdt_write_nosleep(wdt, AT91_WDT_MR, wdt->mr);
+       } else {
+               reg = wdt_read(wdt, AT91_WDT_MR);
+               if (!(reg & AT91_WDT_WDDIS))
+                       wdt_write_nosleep(wdt, AT91_WDT_MR,
+                                         reg | AT91_WDT_WDDIS);
+       }
        return 0;
 }
 
@@ -172,6 +204,7 @@ static int sama5d4_wdt_probe(struct platform_device *pdev)
        struct resource *res;
        void __iomem *regs;
        u32 irq = 0;
+       u32 timeout;
        int ret;
 
        wdt = devm_kzalloc(&pdev->dev, sizeof(*wdt), GFP_KERNEL);
@@ -184,6 +217,7 @@ static int sama5d4_wdt_probe(struct platform_device *pdev)
        wdd->ops = &sama5d4_wdt_ops;
        wdd->min_timeout = MIN_WDT_TIMEOUT;
        wdd->max_timeout = MAX_WDT_TIMEOUT;
+       wdt->last_ping = jiffies;
 
        watchdog_set_drvdata(wdd, wdt);
 
@@ -221,6 +255,11 @@ static int sama5d4_wdt_probe(struct platform_device *pdev)
                return ret;
        }
 
+       timeout = WDT_SEC2TICKS(wdd->timeout);
+
+       wdt->mr |= AT91_WDT_SET_WDD(timeout);
+       wdt->mr |= AT91_WDT_SET_WDV(timeout);
+
        ret = sama5d4_wdt_init(wdt);
        if (ret)
                return ret;
@@ -263,9 +302,7 @@ static int sama5d4_wdt_resume(struct device *dev)
 {
        struct sama5d4_wdt *wdt = dev_get_drvdata(dev);
 
-       wdt_write(wdt, AT91_WDT_MR, wdt->mr & ~AT91_WDT_WDDIS);
-       if (wdt->mr & AT91_WDT_WDDIS)
-               wdt_write(wdt, AT91_WDT_MR, wdt->mr);
+       sama5d4_wdt_init(wdt);
 
        return 0;
 }