* Some of the code has been inspired/copied from the 2.4 code written
* by Dale Farnsworth <dfarnsworth@mvista.com>.
*
+ * Copyright (C) 2008 Freescale Semiconductor Inc.
+ * John Rigby <jrigby@gmail.com>
+ * Added support for MPC5121
* Copyright (C) 2006 Secret Lab Technologies Ltd.
* Grant Likely <grant.likely@secretlab.ca>
* Copyright (C) 2004-2006 Sylvain Munaut <tnt@246tNt.com>
* DCD. However, the pin multiplexing aren't changed and should be set either
* by the bootloader or in the platform init code.
*
- * The idx field must be equal to the PSC index ( e.g. 0 for PSC1, 1 for PSC2,
+ * The idx field must be equal to the PSC index (e.g. 0 for PSC1, 1 for PSC2,
* and so on). So the PSC1 is mapped to /dev/ttyPSC0, PSC2 to /dev/ttyPSC1 and
* so on. But be warned, it's an ABSOLUTE REQUIREMENT ! This is needed mainly
* fpr the console code : without this 1:1 mapping, at early boot time, when we
#include <linux/serial.h>
#include <linux/sysrq.h>
#include <linux/console.h>
-
-#include <asm/delay.h>
-#include <asm/io.h>
+#include <linux/delay.h>
+#include <linux/io.h>
#if defined(CONFIG_PPC_MERGE)
-#include <asm/of_platform.h>
+#include <linux/of.h>
+#include <linux/of_platform.h>
#else
#include <linux/platform_device.h>
#endif
#include <asm/mpc52xx.h>
+#include <asm/mpc512x.h>
#include <asm/mpc52xx_psc.h>
#if defined(CONFIG_SERIAL_MPC52xx_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
static void mpc52xx_uart_of_enumerate(void);
#endif
+
#define PSC(port) ((struct mpc52xx_psc __iomem *)((port)->membase))
/* Forward declaration of the interruption handling routine */
-static irqreturn_t mpc52xx_uart_int(int irq,void *dev_id);
+static irqreturn_t mpc52xx_uart_int(int irq, void *dev_id);
/* Simple macro to test if a port is console or not. This one is taken
* for serial_core.c and maybe should be moved to serial_core.h ? */
#ifdef CONFIG_SERIAL_CORE_CONSOLE
-#define uart_console(port) ((port)->cons && (port)->cons->index == (port)->line)
+#define uart_console(port) \
+ ((port)->cons && (port)->cons->index == (port)->line)
#else
#define uart_console(port) (0)
#endif
+/* ======================================================================== */
+/* PSC fifo operations for isolating differences between 52xx and 512x */
+/* ======================================================================== */
+
+struct psc_ops {
+ void (*fifo_init)(struct uart_port *port);
+ int (*raw_rx_rdy)(struct uart_port *port);
+ int (*raw_tx_rdy)(struct uart_port *port);
+ int (*rx_rdy)(struct uart_port *port);
+ int (*tx_rdy)(struct uart_port *port);
+ int (*tx_empty)(struct uart_port *port);
+ void (*stop_rx)(struct uart_port *port);
+ void (*start_tx)(struct uart_port *port);
+ void (*stop_tx)(struct uart_port *port);
+ void (*rx_clr_irq)(struct uart_port *port);
+ void (*tx_clr_irq)(struct uart_port *port);
+ void (*write_char)(struct uart_port *port, unsigned char c);
+ unsigned char (*read_char)(struct uart_port *port);
+ void (*cw_disable_ints)(struct uart_port *port);
+ void (*cw_restore_ints)(struct uart_port *port);
+ unsigned long (*getuartclk)(void *p);
+};
+
+#ifdef CONFIG_PPC_MPC52xx
+#define FIFO_52xx(port) ((struct mpc52xx_psc_fifo __iomem *)(PSC(port)+1))
+static void mpc52xx_psc_fifo_init(struct uart_port *port)
+{
+ struct mpc52xx_psc __iomem *psc = PSC(port);
+ struct mpc52xx_psc_fifo __iomem *fifo = FIFO_52xx(port);
+
+ /* /32 prescaler */
+ out_be16(&psc->mpc52xx_psc_clock_select, 0xdd00);
+
+ out_8(&fifo->rfcntl, 0x00);
+ out_be16(&fifo->rfalarm, 0x1ff);
+ out_8(&fifo->tfcntl, 0x07);
+ out_be16(&fifo->tfalarm, 0x80);
+
+ port->read_status_mask |= MPC52xx_PSC_IMR_RXRDY | MPC52xx_PSC_IMR_TXRDY;
+ out_be16(&psc->mpc52xx_psc_imr, port->read_status_mask);
+}
+
+static int mpc52xx_psc_raw_rx_rdy(struct uart_port *port)
+{
+ return in_be16(&PSC(port)->mpc52xx_psc_status)
+ & MPC52xx_PSC_SR_RXRDY;
+}
+
+static int mpc52xx_psc_raw_tx_rdy(struct uart_port *port)
+{
+ return in_be16(&PSC(port)->mpc52xx_psc_status)
+ & MPC52xx_PSC_SR_TXRDY;
+}
+
+
+static int mpc52xx_psc_rx_rdy(struct uart_port *port)
+{
+ return in_be16(&PSC(port)->mpc52xx_psc_isr)
+ & port->read_status_mask
+ & MPC52xx_PSC_IMR_RXRDY;
+}
+
+static int mpc52xx_psc_tx_rdy(struct uart_port *port)
+{
+ return in_be16(&PSC(port)->mpc52xx_psc_isr)
+ & port->read_status_mask
+ & MPC52xx_PSC_IMR_TXRDY;
+}
+
+static int mpc52xx_psc_tx_empty(struct uart_port *port)
+{
+ return in_be16(&PSC(port)->mpc52xx_psc_status)
+ & MPC52xx_PSC_SR_TXEMP;
+}
+
+static void mpc52xx_psc_start_tx(struct uart_port *port)
+{
+ port->read_status_mask |= MPC52xx_PSC_IMR_TXRDY;
+ out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask);
+}
+
+static void mpc52xx_psc_stop_tx(struct uart_port *port)
+{
+ port->read_status_mask &= ~MPC52xx_PSC_IMR_TXRDY;
+ out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask);
+}
+
+static void mpc52xx_psc_stop_rx(struct uart_port *port)
+{
+ port->read_status_mask &= ~MPC52xx_PSC_IMR_RXRDY;
+ out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask);
+}
+
+static void mpc52xx_psc_rx_clr_irq(struct uart_port *port)
+{
+}
+
+static void mpc52xx_psc_tx_clr_irq(struct uart_port *port)
+{
+}
+
+static void mpc52xx_psc_write_char(struct uart_port *port, unsigned char c)
+{
+ out_8(&PSC(port)->mpc52xx_psc_buffer_8, c);
+}
+
+static unsigned char mpc52xx_psc_read_char(struct uart_port *port)
+{
+ return in_8(&PSC(port)->mpc52xx_psc_buffer_8);
+}
+
+static void mpc52xx_psc_cw_disable_ints(struct uart_port *port)
+{
+ out_be16(&PSC(port)->mpc52xx_psc_imr, 0);
+}
+
+static void mpc52xx_psc_cw_restore_ints(struct uart_port *port)
+{
+ out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask);
+}
+
+/* Search for bus-frequency property in this node or a parent */
+static unsigned long mpc52xx_getuartclk(void *p)
+{
#if defined(CONFIG_PPC_MERGE)
-static struct of_device_id mpc52xx_uart_of_match[] = {
- { .type = "serial", .compatible = "mpc5200-psc-uart", },
- {},
+ /*
+ * 5200 UARTs have a / 32 prescaler
+ * but the generic serial code assumes 16
+ * so return ipb freq / 2
+ */
+ return mpc52xx_find_ipb_freq(p) / 2;
+#else
+ pr_debug("unexpected call to mpc52xx_getuartclk with arch/ppc\n");
+ return NULL;
+#endif
+}
+
+static struct psc_ops mpc52xx_psc_ops = {
+ .fifo_init = mpc52xx_psc_fifo_init,
+ .raw_rx_rdy = mpc52xx_psc_raw_rx_rdy,
+ .raw_tx_rdy = mpc52xx_psc_raw_tx_rdy,
+ .rx_rdy = mpc52xx_psc_rx_rdy,
+ .tx_rdy = mpc52xx_psc_tx_rdy,
+ .tx_empty = mpc52xx_psc_tx_empty,
+ .stop_rx = mpc52xx_psc_stop_rx,
+ .start_tx = mpc52xx_psc_start_tx,
+ .stop_tx = mpc52xx_psc_stop_tx,
+ .rx_clr_irq = mpc52xx_psc_rx_clr_irq,
+ .tx_clr_irq = mpc52xx_psc_tx_clr_irq,
+ .write_char = mpc52xx_psc_write_char,
+ .read_char = mpc52xx_psc_read_char,
+ .cw_disable_ints = mpc52xx_psc_cw_disable_ints,
+ .cw_restore_ints = mpc52xx_psc_cw_restore_ints,
+ .getuartclk = mpc52xx_getuartclk,
+};
+
+#endif /* CONFIG_MPC52xx */
+
+#ifdef CONFIG_PPC_MPC512x
+#define FIFO_512x(port) ((struct mpc512x_psc_fifo __iomem *)(PSC(port)+1))
+static void mpc512x_psc_fifo_init(struct uart_port *port)
+{
+ out_be32(&FIFO_512x(port)->txcmd, MPC512x_PSC_FIFO_RESET_SLICE);
+ out_be32(&FIFO_512x(port)->txcmd, MPC512x_PSC_FIFO_ENABLE_SLICE);
+ out_be32(&FIFO_512x(port)->txalarm, 1);
+ out_be32(&FIFO_512x(port)->tximr, 0);
+
+ out_be32(&FIFO_512x(port)->rxcmd, MPC512x_PSC_FIFO_RESET_SLICE);
+ out_be32(&FIFO_512x(port)->rxcmd, MPC512x_PSC_FIFO_ENABLE_SLICE);
+ out_be32(&FIFO_512x(port)->rxalarm, 1);
+ out_be32(&FIFO_512x(port)->rximr, 0);
+
+ out_be32(&FIFO_512x(port)->tximr, MPC512x_PSC_FIFO_ALARM);
+ out_be32(&FIFO_512x(port)->rximr, MPC512x_PSC_FIFO_ALARM);
+}
+
+static int mpc512x_psc_raw_rx_rdy(struct uart_port *port)
+{
+ return !(in_be32(&FIFO_512x(port)->rxsr) & MPC512x_PSC_FIFO_EMPTY);
+}
+
+static int mpc512x_psc_raw_tx_rdy(struct uart_port *port)
+{
+ return !(in_be32(&FIFO_512x(port)->txsr) & MPC512x_PSC_FIFO_FULL);
+}
+
+static int mpc512x_psc_rx_rdy(struct uart_port *port)
+{
+ return in_be32(&FIFO_512x(port)->rxsr)
+ & in_be32(&FIFO_512x(port)->rximr)
+ & MPC512x_PSC_FIFO_ALARM;
+}
+
+static int mpc512x_psc_tx_rdy(struct uart_port *port)
+{
+ return in_be32(&FIFO_512x(port)->txsr)
+ & in_be32(&FIFO_512x(port)->tximr)
+ & MPC512x_PSC_FIFO_ALARM;
+}
+
+static int mpc512x_psc_tx_empty(struct uart_port *port)
+{
+ return in_be32(&FIFO_512x(port)->txsr)
+ & MPC512x_PSC_FIFO_EMPTY;
+}
+
+static void mpc512x_psc_stop_rx(struct uart_port *port)
+{
+ unsigned long rx_fifo_imr;
+
+ rx_fifo_imr = in_be32(&FIFO_512x(port)->rximr);
+ rx_fifo_imr &= ~MPC512x_PSC_FIFO_ALARM;
+ out_be32(&FIFO_512x(port)->rximr, rx_fifo_imr);
+}
+
+static void mpc512x_psc_start_tx(struct uart_port *port)
+{
+ unsigned long tx_fifo_imr;
+
+ tx_fifo_imr = in_be32(&FIFO_512x(port)->tximr);
+ tx_fifo_imr |= MPC512x_PSC_FIFO_ALARM;
+ out_be32(&FIFO_512x(port)->tximr, tx_fifo_imr);
+}
+
+static void mpc512x_psc_stop_tx(struct uart_port *port)
+{
+ unsigned long tx_fifo_imr;
+
+ tx_fifo_imr = in_be32(&FIFO_512x(port)->tximr);
+ tx_fifo_imr &= ~MPC512x_PSC_FIFO_ALARM;
+ out_be32(&FIFO_512x(port)->tximr, tx_fifo_imr);
+}
+
+static void mpc512x_psc_rx_clr_irq(struct uart_port *port)
+{
+ out_be32(&FIFO_512x(port)->rxisr, in_be32(&FIFO_512x(port)->rxisr));
+}
+
+static void mpc512x_psc_tx_clr_irq(struct uart_port *port)
+{
+ out_be32(&FIFO_512x(port)->txisr, in_be32(&FIFO_512x(port)->txisr));
+}
+
+static void mpc512x_psc_write_char(struct uart_port *port, unsigned char c)
+{
+ out_8(&FIFO_512x(port)->txdata_8, c);
+}
+
+static unsigned char mpc512x_psc_read_char(struct uart_port *port)
+{
+ return in_8(&FIFO_512x(port)->rxdata_8);
+}
+
+static void mpc512x_psc_cw_disable_ints(struct uart_port *port)
+{
+ port->read_status_mask =
+ in_be32(&FIFO_512x(port)->tximr) << 16 |
+ in_be32(&FIFO_512x(port)->rximr);
+ out_be32(&FIFO_512x(port)->tximr, 0);
+ out_be32(&FIFO_512x(port)->rximr, 0);
+}
+
+static void mpc512x_psc_cw_restore_ints(struct uart_port *port)
+{
+ out_be32(&FIFO_512x(port)->tximr,
+ (port->read_status_mask >> 16) & 0x7f);
+ out_be32(&FIFO_512x(port)->rximr, port->read_status_mask & 0x7f);
+}
+
+static unsigned long mpc512x_getuartclk(void *p)
+{
+ return mpc512x_find_ips_freq(p);
+}
+
+static struct psc_ops mpc512x_psc_ops = {
+ .fifo_init = mpc512x_psc_fifo_init,
+ .raw_rx_rdy = mpc512x_psc_raw_rx_rdy,
+ .raw_tx_rdy = mpc512x_psc_raw_tx_rdy,
+ .rx_rdy = mpc512x_psc_rx_rdy,
+ .tx_rdy = mpc512x_psc_tx_rdy,
+ .tx_empty = mpc512x_psc_tx_empty,
+ .stop_rx = mpc512x_psc_stop_rx,
+ .start_tx = mpc512x_psc_start_tx,
+ .stop_tx = mpc512x_psc_stop_tx,
+ .rx_clr_irq = mpc512x_psc_rx_clr_irq,
+ .tx_clr_irq = mpc512x_psc_tx_clr_irq,
+ .write_char = mpc512x_psc_write_char,
+ .read_char = mpc512x_psc_read_char,
+ .cw_disable_ints = mpc512x_psc_cw_disable_ints,
+ .cw_restore_ints = mpc512x_psc_cw_restore_ints,
+ .getuartclk = mpc512x_getuartclk,
};
#endif
+static struct psc_ops *psc_ops;
/* ======================================================================== */
/* UART operations */
static unsigned int
mpc52xx_uart_tx_empty(struct uart_port *port)
{
- int status = in_be16(&PSC(port)->mpc52xx_psc_status);
- return (status & MPC52xx_PSC_SR_TXEMP) ? TIOCSER_TEMT : 0;
+ return psc_ops->tx_empty(port) ? TIOCSER_TEMT : 0;
}
static void
mpc52xx_uart_stop_tx(struct uart_port *port)
{
/* port->lock taken by caller */
- port->read_status_mask &= ~MPC52xx_PSC_IMR_TXRDY;
- out_be16(&PSC(port)->mpc52xx_psc_imr,port->read_status_mask);
+ psc_ops->stop_tx(port);
}
static void
mpc52xx_uart_start_tx(struct uart_port *port)
{
/* port->lock taken by caller */
- port->read_status_mask |= MPC52xx_PSC_IMR_TXRDY;
- out_be16(&PSC(port)->mpc52xx_psc_imr,port->read_status_mask);
+ psc_ops->start_tx(port);
}
static void
if (ch) {
/* Make sure tx interrupts are on */
/* Truly necessary ??? They should be anyway */
- port->read_status_mask |= MPC52xx_PSC_IMR_TXRDY;
- out_be16(&PSC(port)->mpc52xx_psc_imr,port->read_status_mask);
+ psc_ops->start_tx(port);
}
spin_unlock_irqrestore(&port->lock, flags);
mpc52xx_uart_stop_rx(struct uart_port *port)
{
/* port->lock taken by caller */
- port->read_status_mask &= ~MPC52xx_PSC_IMR_RXRDY;
- out_be16(&PSC(port)->mpc52xx_psc_imr,port->read_status_mask);
+ psc_ops->stop_rx(port);
}
static void
unsigned long flags;
spin_lock_irqsave(&port->lock, flags);
- if ( ctl == -1 )
- out_8(&PSC(port)->command,MPC52xx_PSC_START_BRK);
+ if (ctl == -1)
+ out_8(&PSC(port)->command, MPC52xx_PSC_START_BRK);
else
- out_8(&PSC(port)->command,MPC52xx_PSC_STOP_BRK);
+ out_8(&PSC(port)->command, MPC52xx_PSC_STOP_BRK);
spin_unlock_irqrestore(&port->lock, flags);
}
/* Request IRQ */
ret = request_irq(port->irq, mpc52xx_uart_int,
- IRQF_DISABLED | IRQF_SAMPLE_RANDOM, "mpc52xx_psc_uart", port);
+ IRQF_DISABLED | IRQF_SAMPLE_RANDOM | IRQF_SHARED,
+ "mpc52xx_psc_uart", port);
if (ret)
return ret;
/* Reset/activate the port, clear and enable interrupts */
- out_8(&psc->command,MPC52xx_PSC_RST_RX);
- out_8(&psc->command,MPC52xx_PSC_RST_TX);
-
- out_be32(&psc->sicr,0); /* UART mode DCD ignored */
-
- out_be16(&psc->mpc52xx_psc_clock_select, 0xdd00); /* /16 prescaler on */
+ out_8(&psc->command, MPC52xx_PSC_RST_RX);
+ out_8(&psc->command, MPC52xx_PSC_RST_TX);
- out_8(&psc->rfcntl, 0x00);
- out_be16(&psc->rfalarm, 0x1ff);
- out_8(&psc->tfcntl, 0x07);
- out_be16(&psc->tfalarm, 0x80);
+ out_be32(&psc->sicr, 0); /* UART mode DCD ignored */
- port->read_status_mask |= MPC52xx_PSC_IMR_RXRDY | MPC52xx_PSC_IMR_TXRDY;
- out_be16(&psc->mpc52xx_psc_imr,port->read_status_mask);
+ psc_ops->fifo_init(port);
- out_8(&psc->command,MPC52xx_PSC_TX_ENABLE);
- out_8(&psc->command,MPC52xx_PSC_RX_ENABLE);
+ out_8(&psc->command, MPC52xx_PSC_TX_ENABLE);
+ out_8(&psc->command, MPC52xx_PSC_RX_ENABLE);
return 0;
}
struct mpc52xx_psc __iomem *psc = PSC(port);
/* Shut down the port. Leave TX active if on a console port */
- out_8(&psc->command,MPC52xx_PSC_RST_RX);
+ out_8(&psc->command, MPC52xx_PSC_RST_RX);
if (!uart_console(port))
- out_8(&psc->command,MPC52xx_PSC_RST_TX);
+ out_8(&psc->command, MPC52xx_PSC_RST_TX);
port->read_status_mask = 0;
- out_be16(&psc->mpc52xx_psc_imr,port->read_status_mask);
+ out_be16(&psc->mpc52xx_psc_imr, port->read_status_mask);
/* Release interrupt */
free_irq(port->irq, port);
static void
mpc52xx_uart_set_termios(struct uart_port *port, struct ktermios *new,
- struct ktermios *old)
+ struct ktermios *old)
{
struct mpc52xx_psc __iomem *psc = PSC(port);
unsigned long flags;
mr1 = 0;
switch (new->c_cflag & CSIZE) {
- case CS5: mr1 |= MPC52xx_PSC_MODE_5_BITS;
- break;
- case CS6: mr1 |= MPC52xx_PSC_MODE_6_BITS;
- break;
- case CS7: mr1 |= MPC52xx_PSC_MODE_7_BITS;
- break;
- case CS8:
- default: mr1 |= MPC52xx_PSC_MODE_8_BITS;
+ case CS5: mr1 |= MPC52xx_PSC_MODE_5_BITS;
+ break;
+ case CS6: mr1 |= MPC52xx_PSC_MODE_6_BITS;
+ break;
+ case CS7: mr1 |= MPC52xx_PSC_MODE_7_BITS;
+ break;
+ case CS8:
+ default: mr1 |= MPC52xx_PSC_MODE_8_BITS;
}
if (new->c_cflag & PARENB) {
* boot for the console, all stuff is not yet ready to receive at that
* time and that just makes the kernel oops */
/* while (j-- && mpc52xx_uart_int_rx_chars(port)); */
- while (!(in_be16(&psc->mpc52xx_psc_status) & MPC52xx_PSC_SR_TXEMP) &&
- --j)
+ while (!mpc52xx_uart_tx_empty(port) && --j)
udelay(1);
if (!j)
- printk( KERN_ERR "mpc52xx_uart.c: "
+ printk(KERN_ERR "mpc52xx_uart.c: "
"Unable to flush RX & TX fifos in-time in set_termios."
- "Some chars may have been lost.\n" );
+ "Some chars may have been lost.\n");
/* Reset the TX & RX */
- out_8(&psc->command,MPC52xx_PSC_RST_RX);
- out_8(&psc->command,MPC52xx_PSC_RST_TX);
+ out_8(&psc->command, MPC52xx_PSC_RST_RX);
+ out_8(&psc->command, MPC52xx_PSC_RST_TX);
/* Send new mode settings */
- out_8(&psc->command,MPC52xx_PSC_SEL_MODE_REG_1);
- out_8(&psc->mode,mr1);
- out_8(&psc->mode,mr2);
- out_8(&psc->ctur,ctr >> 8);
- out_8(&psc->ctlr,ctr & 0xff);
+ out_8(&psc->command, MPC52xx_PSC_SEL_MODE_REG_1);
+ out_8(&psc->mode, mr1);
+ out_8(&psc->mode, mr2);
+ out_8(&psc->ctur, ctr >> 8);
+ out_8(&psc->ctlr, ctr & 0xff);
/* Reenable TX & RX */
- out_8(&psc->command,MPC52xx_PSC_TX_ENABLE);
- out_8(&psc->command,MPC52xx_PSC_RX_ENABLE);
+ out_8(&psc->command, MPC52xx_PSC_TX_ENABLE);
+ out_8(&psc->command, MPC52xx_PSC_RX_ENABLE);
/* We're all set, release the lock */
spin_unlock_irqrestore(&port->lock, flags);
static void
mpc52xx_uart_release_port(struct uart_port *port)
{
- if (port->flags & UPF_IOREMAP) { /* remapped by us ? */
+ /* remapped by us ? */
+ if (port->flags & UPF_IOREMAP) {
iounmap(port->membase);
port->membase = NULL;
}
if (port->flags & UPF_IOREMAP) /* Need to remap ? */
port->membase = ioremap(port->mapbase,
- sizeof(struct mpc52xx_psc));
+ sizeof(struct mpc52xx_psc));
if (!port->membase)
return -EINVAL;
static void
mpc52xx_uart_config_port(struct uart_port *port, int flags)
{
- if ( (flags & UART_CONFIG_TYPE) &&
- (mpc52xx_uart_request_port(port) == 0) )
- port->type = PORT_MPC52xx;
+ if ((flags & UART_CONFIG_TYPE)
+ && (mpc52xx_uart_request_port(port) == 0))
+ port->type = PORT_MPC52xx;
}
static int
mpc52xx_uart_verify_port(struct uart_port *port, struct serial_struct *ser)
{
- if ( ser->type != PORT_UNKNOWN && ser->type != PORT_MPC52xx )
+ if (ser->type != PORT_UNKNOWN && ser->type != PORT_MPC52xx)
return -EINVAL;
- if ( (ser->irq != port->irq) ||
- (ser->io_type != SERIAL_IO_MEM) ||
- (ser->baud_base != port->uartclk) ||
- (ser->iomem_base != (void*)port->mapbase) ||
- (ser->hub6 != 0 ) )
+ if ((ser->irq != port->irq) ||
+ (ser->io_type != SERIAL_IO_MEM) ||
+ (ser->baud_base != port->uartclk) ||
+ (ser->iomem_base != (void *)port->mapbase) ||
+ (ser->hub6 != 0))
return -EINVAL;
return 0;
unsigned short status;
/* While we can read, do so ! */
- while ( (status = in_be16(&PSC(port)->mpc52xx_psc_status)) &
- MPC52xx_PSC_SR_RXRDY) {
-
+ while (psc_ops->raw_rx_rdy(port)) {
/* Get the char */
- ch = in_8(&PSC(port)->mpc52xx_psc_buffer_8);
+ ch = psc_ops->read_char(port);
/* Handle sysreq char */
#ifdef SUPPORT_SYSRQ
flag = TTY_NORMAL;
port->icount.rx++;
- if ( status & (MPC52xx_PSC_SR_PE |
- MPC52xx_PSC_SR_FE |
- MPC52xx_PSC_SR_RB) ) {
+ status = in_be16(&PSC(port)->mpc52xx_psc_status);
+
+ if (status & (MPC52xx_PSC_SR_PE |
+ MPC52xx_PSC_SR_FE |
+ MPC52xx_PSC_SR_RB)) {
if (status & MPC52xx_PSC_SR_RB) {
flag = TTY_BREAK;
flag = TTY_FRAME;
/* Clear error condition */
- out_8(&PSC(port)->command,MPC52xx_PSC_RST_ERR_STAT);
+ out_8(&PSC(port)->command, MPC52xx_PSC_RST_ERR_STAT);
}
tty_insert_flip_char(tty, ch, flag);
tty_flip_buffer_push(tty);
- return in_be16(&PSC(port)->mpc52xx_psc_status) & MPC52xx_PSC_SR_RXRDY;
+ return psc_ops->raw_rx_rdy(port);
}
static inline int
/* Process out of band chars */
if (port->x_char) {
- out_8(&PSC(port)->mpc52xx_psc_buffer_8, port->x_char);
+ psc_ops->write_char(port, port->x_char);
port->icount.tx++;
port->x_char = 0;
return 1;
}
/* Send chars */
- while (in_be16(&PSC(port)->mpc52xx_psc_status) & MPC52xx_PSC_SR_TXRDY) {
- out_8(&PSC(port)->mpc52xx_psc_buffer_8, xmit->buf[xmit->tail]);
+ while (psc_ops->raw_tx_rdy(port)) {
+ psc_ops->write_char(port, xmit->buf[xmit->tail]);
xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
port->icount.tx++;
if (uart_circ_empty(xmit))
struct uart_port *port = dev_id;
unsigned long pass = ISR_PASS_LIMIT;
unsigned int keepgoing;
- unsigned short status;
spin_lock(&port->lock);
/* If we don't find anything to do, we stop */
keepgoing = 0;
- /* Read status */
- status = in_be16(&PSC(port)->mpc52xx_psc_isr);
- status &= port->read_status_mask;
-
- /* Do we need to receive chars ? */
- /* For this RX interrupts must be on and some chars waiting */
- if ( status & MPC52xx_PSC_IMR_RXRDY )
+ psc_ops->rx_clr_irq(port);
+ if (psc_ops->rx_rdy(port))
keepgoing |= mpc52xx_uart_int_rx_chars(port);
- /* Do we need to send chars ? */
- /* For this, TX must be ready and TX interrupt enabled */
- if ( status & MPC52xx_PSC_IMR_TXRDY )
+ psc_ops->tx_clr_irq(port);
+ if (psc_ops->tx_rdy(port))
keepgoing |= mpc52xx_uart_int_tx_chars(port);
/* Limit number of iteration */
- if ( !(--pass) )
+ if (!(--pass))
keepgoing = 0;
} while (keepgoing);
static void __init
mpc52xx_console_get_options(struct uart_port *port,
- int *baud, int *parity, int *bits, int *flow)
+ int *baud, int *parity, int *bits, int *flow)
{
struct mpc52xx_psc __iomem *psc = PSC(port);
unsigned char mr1;
pr_debug("mpc52xx_console_get_options(port=%p)\n", port);
/* Read the mode registers */
- out_8(&psc->command,MPC52xx_PSC_SEL_MODE_REG_1);
+ out_8(&psc->command, MPC52xx_PSC_SEL_MODE_REG_1);
mr1 = in_8(&psc->mode);
/* CT{U,L}R are write-only ! */
/* Parse them */
switch (mr1 & MPC52xx_PSC_MODE_BITS_MASK) {
- case MPC52xx_PSC_MODE_5_BITS: *bits = 5; break;
- case MPC52xx_PSC_MODE_6_BITS: *bits = 6; break;
- case MPC52xx_PSC_MODE_7_BITS: *bits = 7; break;
- case MPC52xx_PSC_MODE_8_BITS:
- default: *bits = 8;
+ case MPC52xx_PSC_MODE_5_BITS:
+ *bits = 5;
+ break;
+ case MPC52xx_PSC_MODE_6_BITS:
+ *bits = 6;
+ break;
+ case MPC52xx_PSC_MODE_7_BITS:
+ *bits = 7;
+ break;
+ case MPC52xx_PSC_MODE_8_BITS:
+ default:
+ *bits = 8;
}
if (mr1 & MPC52xx_PSC_MODE_PARNONE)
mpc52xx_console_write(struct console *co, const char *s, unsigned int count)
{
struct uart_port *port = &mpc52xx_uart_ports[co->index];
- struct mpc52xx_psc __iomem *psc = PSC(port);
unsigned int i, j;
/* Disable interrupts */
- out_be16(&psc->mpc52xx_psc_imr, 0);
+ psc_ops->cw_disable_ints(port);
/* Wait the TX buffer to be empty */
j = 5000000; /* Maximum wait */
- while (!(in_be16(&psc->mpc52xx_psc_status) & MPC52xx_PSC_SR_TXEMP) &&
- --j)
+ while (!mpc52xx_uart_tx_empty(port) && --j)
udelay(1);
/* Write all the chars */
for (i = 0; i < count; i++, s++) {
/* Line return handling */
if (*s == '\n')
- out_8(&psc->mpc52xx_psc_buffer_8, '\r');
+ psc_ops->write_char(port, '\r');
/* Send the char */
- out_8(&psc->mpc52xx_psc_buffer_8, *s);
+ psc_ops->write_char(port, *s);
/* Wait the TX buffer to be empty */
j = 20000; /* Maximum wait */
- while (!(in_be16(&psc->mpc52xx_psc_status) &
- MPC52xx_PSC_SR_TXEMP) && --j)
+ while (!mpc52xx_uart_tx_empty(port) && --j)
udelay(1);
}
/* Restore interrupt state */
- out_be16(&psc->mpc52xx_psc_imr, port->read_status_mask);
+ psc_ops->cw_restore_ints(port);
}
#if !defined(CONFIG_PPC_MERGE)
{
struct uart_port *port = &mpc52xx_uart_ports[co->index];
struct device_node *np = mpc52xx_uart_nodes[co->index];
- unsigned int ipb_freq;
+ unsigned int uartclk;
struct resource res;
int ret;
}
pr_debug("Console on ttyPSC%x is %s\n",
- co->index, mpc52xx_uart_nodes[co->index]->full_name);
+ co->index, mpc52xx_uart_nodes[co->index]->full_name);
/* Fetch register locations */
- if ((ret = of_address_to_resource(np, 0, &res)) != 0) {
+ ret = of_address_to_resource(np, 0, &res);
+ if (ret) {
pr_debug("Could not get resources for PSC%x\n", co->index);
return ret;
}
- /* Search for bus-frequency property in this node or a parent */
- if ((ipb_freq = mpc52xx_find_ipb_freq(np)) == 0) {
- pr_debug("Could not find IPB bus frequency!\n");
+ uartclk = psc_ops->getuartclk(np);
+ if (uartclk == 0) {
+ pr_debug("Could not find uart clock frequency!\n");
return -EINVAL;
}
/* Basic port init. Needed since we use some uart_??? func before
* real init for early access */
spin_lock_init(&port->lock);
- port->uartclk = ipb_freq / 2;
+ port->uartclk = uartclk;
port->ops = &mpc52xx_uart_ops;
port->mapbase = res.start;
port->membase = ioremap(res.start, sizeof(struct mpc52xx_psc));
if (port->membase == NULL)
return -EINVAL;
- pr_debug("mpc52xx-psc uart at %lx, mapped to %p, irq=%x, freq=%i\n",
- port->mapbase, port->membase, port->irq, port->uartclk);
+ pr_debug("mpc52xx-psc uart at %p, mapped to %p, irq=%x, freq=%i\n",
+ (void *)port->mapbase, port->membase,
+ port->irq, port->uartclk);
/* Setup the port parameters accoding to options */
if (options)
mpc52xx_console_get_options(port, &baud, &parity, &bits, &flow);
pr_debug("Setting console parameters: %i %i%c1 flow=%c\n",
- baud, bits, parity, flow);
+ baud, bits, parity, flow);
return uart_set_options(port, co, baud, parity, bits, flow);
}
.device = uart_console_device,
.setup = mpc52xx_console_setup,
.flags = CON_PRINTBUFFER,
- .index = -1, /* Specified on the cmdline (e.g. console=ttyPSC0 ) */
+ .index = -1, /* Specified on the cmdline (e.g. console=ttyPSC0) */
.data = &mpc52xx_uart_driver,
};
/* ======================================================================== */
static struct uart_driver mpc52xx_uart_driver = {
- .owner = THIS_MODULE,
.driver_name = "mpc52xx_psc_uart",
.dev_name = "ttyPSC",
.major = SERIAL_PSC_MAJOR,
if (idx < 0 || idx >= MPC52xx_PSC_MAXNUM)
return -EINVAL;
- if (!mpc52xx_match_psc_function(idx,"uart"))
+ if (!mpc52xx_match_psc_function(idx, "uart"))
return -ENODEV;
/* Init the port structure */
port->fifosize = 512;
port->iotype = UPIO_MEM;
port->flags = UPF_BOOT_AUTOCONF |
- ( uart_console(port) ? 0 : UPF_IOREMAP );
+ (uart_console(port) ? 0 : UPF_IOREMAP);
port->line = idx;
port->ops = &mpc52xx_uart_ops;
port->dev = &dev->dev;
/* Search for IRQ and mapbase */
- for (i=0 ; i<dev->num_resources ; i++, res++) {
+ for (i = 0 ; i < dev->num_resources ; i++, res++) {
if (res->flags & IORESOURCE_MEM)
port->mapbase = res->start;
else if (res->flags & IORESOURCE_IRQ)
/* Add the port to the uart sub-system */
ret = uart_add_one_port(&mpc52xx_uart_driver, port);
if (!ret)
- platform_set_drvdata(dev, (void*)port);
+ platform_set_drvdata(dev, (void *)port);
return ret;
}
.resume = mpc52xx_uart_resume,
#endif
.driver = {
+ .owner = THIS_MODULE,
.name = "mpc52xx-psc",
},
};
/* OF Platform Driver */
/* ======================================================================== */
+static struct of_device_id mpc52xx_uart_of_match[] = {
+#ifdef CONFIG_PPC_MPC52xx
+ { .compatible = "fsl,mpc5200-psc-uart", .data = &mpc52xx_psc_ops, },
+ /* binding used by old lite5200 device trees: */
+ { .compatible = "mpc5200-psc-uart", .data = &mpc52xx_psc_ops, },
+ /* binding used by efika: */
+ { .compatible = "mpc5200-serial", .data = &mpc52xx_psc_ops, },
+#endif
+#ifdef CONFIG_PPC_MPC512x
+ { .compatible = "fsl,mpc5121-psc-uart", .data = &mpc512x_psc_ops, },
+ {},
+#endif
+};
+
static int __devinit
mpc52xx_uart_of_probe(struct of_device *op, const struct of_device_id *match)
{
int idx = -1;
- unsigned int ipb_freq;
+ unsigned int uartclk;
struct uart_port *port = NULL;
struct resource res;
int ret;
if (idx >= MPC52xx_PSC_MAXNUM)
return -EINVAL;
pr_debug("Found %s assigned to ttyPSC%x\n",
- mpc52xx_uart_nodes[idx]->full_name, idx);
+ mpc52xx_uart_nodes[idx]->full_name, idx);
- /* Search for bus-frequency property in this node or a parent */
- if ((ipb_freq = mpc52xx_find_ipb_freq(op->node)) == 0) {
- dev_dbg(&op->dev, "Could not find IPB bus frequency!\n");
+ uartclk = psc_ops->getuartclk(op->node);
+ if (uartclk == 0) {
+ dev_dbg(&op->dev, "Could not find uart clock frequency!\n");
return -EINVAL;
}
port = &mpc52xx_uart_ports[idx];
spin_lock_init(&port->lock);
- port->uartclk = ipb_freq / 2;
+ port->uartclk = uartclk;
port->fifosize = 512;
port->iotype = UPIO_MEM;
port->flags = UPF_BOOT_AUTOCONF |
- ( uart_console(port) ? 0 : UPF_IOREMAP );
+ (uart_console(port) ? 0 : UPF_IOREMAP);
port->line = idx;
port->ops = &mpc52xx_uart_ops;
port->dev = &op->dev;
/* Search for IRQ and mapbase */
- if ((ret = of_address_to_resource(op->node, 0, &res)) != 0)
+ ret = of_address_to_resource(op->node, 0, &res);
+ if (ret)
return ret;
port->mapbase = res.start;
port->irq = irq_of_parse_and_map(op->node, 0);
- dev_dbg(&op->dev, "mpc52xx-psc uart at %lx, irq=%x, freq=%i\n",
- port->mapbase, port->irq, port->uartclk);
+ dev_dbg(&op->dev, "mpc52xx-psc uart at %p, irq=%x, freq=%i\n",
+ (void *)port->mapbase, port->irq, port->uartclk);
- if ((port->irq==NO_IRQ) || !port->mapbase) {
+ if ((port->irq == NO_IRQ) || !port->mapbase) {
printk(KERN_ERR "Could not allocate resources for PSC\n");
return -EINVAL;
}
/* Add the port to the uart sub-system */
ret = uart_add_one_port(&mpc52xx_uart_driver, port);
if (!ret)
- dev_set_drvdata(&op->dev, (void*)port);
+ dev_set_drvdata(&op->dev, (void *)port);
return ret;
}
if (idx < 0)
return; /* No free slot; abort */
+ of_node_get(np);
/* If the slot is already occupied, then swap slots */
if (mpc52xx_uart_nodes[idx] && (free_idx != -1))
mpc52xx_uart_nodes[free_idx] = mpc52xx_uart_nodes[idx];
static void
mpc52xx_uart_of_enumerate(void)
{
- static int enum_done = 0;
+ static int enum_done;
struct device_node *np;
const unsigned int *devno;
+ const struct of_device_id *match;
int i;
if (enum_done)
return;
for_each_node_by_type(np, "serial") {
- if (!of_match_node(mpc52xx_uart_of_match, np))
+ match = of_match_node(mpc52xx_uart_of_match, np);
+ if (!match)
continue;
+ psc_ops = match->data;
+
/* Is a particular device number requested? */
devno = of_get_property(np, "port-number", NULL);
- mpc52xx_uart_of_assign(of_node_get(np), devno ? *devno : -1);
+ mpc52xx_uart_of_assign(np, devno ? *devno : -1);
}
enum_done = 1;
for (i = 0; i < MPC52xx_PSC_MAXNUM; i++) {
if (mpc52xx_uart_nodes[i])
pr_debug("%s assigned to ttyPSC%x\n",
- mpc52xx_uart_nodes[i]->full_name, i);
+ mpc52xx_uart_nodes[i]->full_name, i);
}
}
MODULE_DEVICE_TABLE(of, mpc52xx_uart_of_match);
static struct of_platform_driver mpc52xx_uart_of_driver = {
- .owner = THIS_MODULE,
- .name = "mpc52xx-psc-uart",
.match_table = mpc52xx_uart_of_match,
.probe = mpc52xx_uart_of_probe,
.remove = mpc52xx_uart_of_remove,
printk(KERN_INFO "Serial: MPC52xx PSC UART driver\n");
- if ((ret = uart_register_driver(&mpc52xx_uart_driver)) != 0) {
+ ret = uart_register_driver(&mpc52xx_uart_driver);
+ if (ret) {
printk(KERN_ERR "%s: uart_register_driver failed (%i)\n",
__FILE__, ret);
return ret;
return ret;
}
#else
+ psc_ops = &mpc52xx_psc_ops;
ret = platform_driver_register(&mpc52xx_uart_platform_driver);
if (ret) {
printk(KERN_ERR "%s: platform_driver_register failed (%i)\n",
git.samba.org / sfrench / cifs-2.6.git / blobdiff