static int mwifiex_init_sdio_new_mode(struct mwifiex_adapter *adapter)
{
u8 reg;
+ struct sdio_mmc_card *card = adapter->card;
adapter->ioport = MEM_PORT;
/* enable sdio new mode */
- if (mwifiex_read_reg(adapter, CARD_CONFIG_2_1_REG, ®))
+ if (mwifiex_read_reg(adapter, card->reg->card_cfg_2_1_reg, ®))
return -1;
- if (mwifiex_write_reg(adapter, CARD_CONFIG_2_1_REG,
+ if (mwifiex_write_reg(adapter, card->reg->card_cfg_2_1_reg,
reg | CMD53_NEW_MODE))
return -1;
/* Configure cmd port and enable reading rx length from the register */
- if (mwifiex_read_reg(adapter, CMD_CONFIG_0, ®))
+ if (mwifiex_read_reg(adapter, card->reg->cmd_cfg_0, ®))
return -1;
- if (mwifiex_write_reg(adapter, CMD_CONFIG_0, reg | CMD_PORT_RD_LEN_EN))
+ if (mwifiex_write_reg(adapter, card->reg->cmd_cfg_0,
+ reg | CMD_PORT_RD_LEN_EN))
return -1;
/* Enable Dnld/Upld ready auto reset for cmd port after cmd53 is
* completed
*/
- if (mwifiex_read_reg(adapter, CMD_CONFIG_1, ®))
+ if (mwifiex_read_reg(adapter, card->reg->cmd_cfg_1, ®))
return -1;
- if (mwifiex_write_reg(adapter, CMD_CONFIG_1, reg | CMD_PORT_AUTO_EN))
+ if (mwifiex_write_reg(adapter, card->reg->cmd_cfg_1,
+ reg | CMD_PORT_AUTO_EN))
return -1;
return 0;
}
/* Read the IO port */
- if (!mwifiex_read_reg(adapter, IO_PORT_0_REG, ®))
+ if (!mwifiex_read_reg(adapter, card->reg->io_port_0_reg, ®))
adapter->ioport |= (reg & 0xff);
else
return -1;
- if (!mwifiex_read_reg(adapter, IO_PORT_1_REG, ®))
+ if (!mwifiex_read_reg(adapter, card->reg->io_port_1_reg, ®))
adapter->ioport |= ((reg & 0xff) << 8);
else
return -1;
- if (!mwifiex_read_reg(adapter, IO_PORT_2_REG, ®))
+ if (!mwifiex_read_reg(adapter, card->reg->io_port_2_reg, ®))
adapter->ioport |= ((reg & 0xff) << 16);
else
return -1;
pr_debug("info: SDIO FUNC1 IO port: %#x\n", adapter->ioport);
/* Set Host interrupt reset to read to clear */
- if (!mwifiex_read_reg(adapter, HOST_INT_RSR_REG, ®))
- mwifiex_write_reg(adapter, HOST_INT_RSR_REG,
+ if (!mwifiex_read_reg(adapter, card->reg->host_int_rsr_reg, ®))
+ mwifiex_write_reg(adapter, card->reg->host_int_rsr_reg,
reg | card->reg->sdio_int_mask);
else
return -1;
dev_dbg(adapter->dev, "data: mp_wr_bitmap=0x%08x\n", wr_bitmap);
- if (card->supports_sdio_new_mode &&
- !(wr_bitmap & reg->data_port_mask)) {
+ if (!(wr_bitmap & card->mp_data_port_mask)) {
adapter->data_sent = true;
return -EBUSY;
- } else if (!card->supports_sdio_new_mode &&
- !(wr_bitmap & card->mp_data_port_mask)) {
- return -1;
}
if (card->mp_wr_bitmap & (1 << card->curr_wr_port)) {
card->mp_wr_bitmap &= (u32) (~(1 << card->curr_wr_port));
*port = card->curr_wr_port;
- if (((card->supports_sdio_new_mode) &&
- (++card->curr_wr_port == card->max_ports)) ||
- ((!card->supports_sdio_new_mode) &&
- (++card->curr_wr_port == card->mp_end_port)))
+ if (++card->curr_wr_port == card->mp_end_port)
card->curr_wr_port = reg->start_wr_port;
} else {
adapter->data_sent = true;
struct sdio_func *func = card->func;
sdio_claim_host(func);
- mwifiex_write_reg_locked(func, HOST_INT_MASK_REG, 0);
+ mwifiex_write_reg_locked(func, card->reg->host_int_mask_reg, 0);
sdio_release_irq(func);
sdio_release_host(func);
}
return;
}
- sdio_ireg = card->mp_regs[HOST_INTSTATUS_REG];
+ sdio_ireg = card->mp_regs[card->reg->host_int_status_reg];
if (sdio_ireg) {
/*
* DN_LD_HOST_INT_STATUS and/or UP_LD_HOST_INT_STATUS
}
/* Simply write the mask to the register */
- ret = mwifiex_write_reg_locked(func, HOST_INT_MASK_REG,
+ ret = mwifiex_write_reg_locked(func, card->reg->host_int_mask_reg,
card->reg->host_int_enable);
if (ret) {
dev_err(adapter->dev, "enable host interrupt failed\n");
switch (upld_typ) {
case MWIFIEX_TYPE_DATA:
dev_dbg(adapter->dev, "info: --- Rx: Data packet ---\n");
- mwifiex_handle_rx_packet(adapter, skb);
+ if (adapter->rx_work_enabled) {
+ skb_queue_tail(&adapter->rx_data_q, skb);
+ adapter->data_received = true;
+ atomic_inc(&adapter->rx_pending);
+ } else {
+ mwifiex_handle_rx_packet(adapter, skb);
+ }
break;
case MWIFIEX_TYPE_CMD:
u32 pkt_type;
/* read the len of control packet */
- rx_len = card->mp_regs[CMD_RD_LEN_1] << 8;
- rx_len |= (u16) card->mp_regs[CMD_RD_LEN_0];
+ rx_len = card->mp_regs[reg->cmd_rd_len_1] << 8;
+ rx_len |= (u16)card->mp_regs[reg->cmd_rd_len_0];
rx_blocks = DIV_ROUND_UP(rx_len, MWIFIEX_SDIO_BLOCK_SIZE);
if (rx_len <= INTF_HEADER_LEN ||
(rx_blocks * MWIFIEX_SDIO_BLOCK_SIZE) >
__func__);
if (MP_TX_AGGR_IN_PROGRESS(card)) {
- if (!mp_tx_aggr_port_limit_reached(card) &&
- MP_TX_AGGR_BUF_HAS_ROOM(card, pkt_len)) {
+ if (MP_TX_AGGR_BUF_HAS_ROOM(card, pkt_len)) {
f_precopy_cur_buf = 1;
if (!(card->mp_wr_bitmap &
/* No room in Aggr buf, send it */
f_send_aggr_buf = 1;
- if (mp_tx_aggr_port_limit_reached(card) ||
- !(card->mp_wr_bitmap &
+ if (!(card->mp_wr_bitmap &
(1 << card->curr_wr_port)))
f_send_cur_buf = 1;
else
sdio_set_drvdata(card->func, card);
/*
- * Read the HOST_INT_STATUS_REG for ACK the first interrupt got
+ * Read the host_int_status_reg for ACK the first interrupt got
* from the bootloader. If we don't do this we get a interrupt
* as soon as we register the irq.
*/
- mwifiex_read_reg(adapter, HOST_INTSTATUS_REG, &sdio_ireg);
+ mwifiex_read_reg(adapter, card->reg->host_int_status_reg, &sdio_ireg);
/* Get SDIO ioport */
mwifiex_init_sdio_ioport(adapter);