net/mlx5: Configure cache line size for start and end padding
[sfrench/cifs-2.6.git] / drivers / net / ethernet / mellanox / mlx5 / core / main.c
index f7e50ba67f9414b556fc588de65f813cf08c1e7c..c4242a4e81309f0d90a0cae8bdfc09fd39da5649 100644 (file)
@@ -543,6 +543,12 @@ static int handle_hca_cap(struct mlx5_core_dev *dev)
 
        MLX5_SET(cmd_hca_cap, set_hca_cap, log_uar_page_sz, PAGE_SHIFT - 12);
 
+       if (MLX5_CAP_GEN_MAX(dev, cache_line_128byte))
+               MLX5_SET(cmd_hca_cap,
+                        set_hca_cap,
+                        cache_line_128byte,
+                        cache_line_size() == 128 ? 1 : 0);
+
        err = set_caps(dev, set_ctx, set_sz,
                       MLX5_SET_HCA_CAP_OP_MOD_GENERAL_DEVICE);