net/mlx5e: XDP Tx, no inline copy on ConnectX-5

[sfrench/cifs-2.6.git] / drivers / net / ethernet / mellanox / mlx5 / core / en_main.c

diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_main.c b/drivers/net/ethernet/mellanox/mlx5/core/en_main.c
index 1b7fe43ab22b2767fb226360453abceaf9d38621..ed230757d9c5fecfbbb94f8cfec5cb3a86f9db60 100644 (file)
--- a/drivers/net/ethernet/mellanox/mlx5/core/en_main.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/en_main.c
@@ -1029,9 +1029,7 @@ static int mlx5e_create_sq(struct mlx5e_channel *c,
 
        sq->bf_buf_size = (1 << MLX5_CAP_GEN(mdev, log_bf_reg_size)) / 2;
        sq->max_inline  = param->max_inline;
-       sq->min_inline_mode =
-               MLX5_CAP_ETH(mdev, wqe_inline_mode) == MLX5_CAP_INLINE_MODE_VPORT_CONTEXT ?
-               param->min_inline_mode : 0;
+       sq->min_inline_mode = param->min_inline_mode;
 
        err = mlx5e_alloc_sq_db(sq, cpu_to_node(c->cpu));
        if (err)
@@ -1095,7 +1093,10 @@ static int mlx5e_enable_sq(struct mlx5e_sq *sq, struct mlx5e_sq_param *param)
        MLX5_SET(sqc,  sqc, tis_num_0, param->type == MLX5E_SQ_ICO ?
                                       0 : priv->tisn[sq->tc]);
        MLX5_SET(sqc,  sqc, cqn,                sq->cq.mcq.cqn);
-       MLX5_SET(sqc,  sqc, min_wqe_inline_mode, sq->min_inline_mode);
+
+       if (MLX5_CAP_ETH(mdev, wqe_inline_mode) == MLX5_CAP_INLINE_MODE_VPORT_CONTEXT)
+               MLX5_SET(sqc,  sqc, min_wqe_inline_mode, sq->min_inline_mode);
+
        MLX5_SET(sqc,  sqc, state,              MLX5_SQC_STATE_RST);
        MLX5_SET(sqc,  sqc, tis_lst_sz, param->type == MLX5E_SQ_ICO ? 0 : 1);
 
@@ -1805,8 +1806,7 @@ static void mlx5e_build_xdpsq_param(struct mlx5e_priv *priv,
        MLX5_SET(wq, wq, log_wq_sz,     priv->params.log_sq_size);
 
        param->max_inline = priv->params.tx_max_inline;
-       /* FOR XDP SQs will support only L2 inline mode */
-       param->min_inline_mode = MLX5_INLINE_MODE_NONE;
+       param->min_inline_mode = priv->params.tx_min_inline_mode;
        param->type = MLX5E_SQ_XDP;
 }
 
@@ -3533,6 +3533,10 @@ static void mlx5e_build_nic_netdev_priv(struct mlx5_core_dev *mdev,
                MLX5E_PARAMS_DEFAULT_TX_CQ_MODERATION_PKTS;
        priv->params.tx_max_inline         = mlx5e_get_max_inline_cap(mdev);
        mlx5_query_min_inline(mdev, &priv->params.tx_min_inline_mode);
+       if (priv->params.tx_min_inline_mode == MLX5_INLINE_MODE_NONE &&
+           !MLX5_CAP_ETH(mdev, wqe_vlan_insert))
+               priv->params.tx_min_inline_mode = MLX5_INLINE_MODE_L2;
+
        priv->params.num_tc                = 1;
        priv->params.rss_hfunc             = ETH_RSS_HASH_XOR;