net/mlx5e: Introduce net device priv flags infrastructure

[sfrench/cifs-2.6.git] / drivers / net / ethernet / mellanox / mlx5 / core / en.h

diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en.h b/drivers/net/ethernet/mellanox/mlx5/core/en.h
index e8a6c3325b396c6295db60c833309c4e4102e780..02fa4daef59d403cc2abeaf10090cae56a06da75 100644 (file)
--- a/drivers/net/ethernet/mellanox/mlx5/core/en.h
+++ b/drivers/net/ethernet/mellanox/mlx5/core/en.h
@@ -88,6 +88,7 @@
 #define MLX5E_LOG_INDIR_RQT_SIZE       0x7
 #define MLX5E_INDIR_RQT_SIZE           BIT(MLX5E_LOG_INDIR_RQT_SIZE)
 #define MLX5E_MAX_NUM_CHANNELS         (MLX5E_INDIR_RQT_SIZE >> 1)
+#define MLX5E_MAX_NUM_SQS              (MLX5E_MAX_NUM_CHANNELS * MLX5E_MAX_NUM_TC)
 #define MLX5E_TX_CQ_POLL_BUDGET        128
 #define MLX5E_UPDATE_STATS_INTERVAL    200 /* msecs */
 #define MLX5E_SQ_BF_BUDGET             16
@@ -143,6 +144,22 @@ struct mlx5e_umr_wqe {
        struct mlx5_wqe_data_seg       data;
 };
 
+static const char mlx5e_priv_flags[][ETH_GSTRING_LEN] = {
+       "nop",
+};
+
+enum mlx5e_priv_flag {
+       MLX5E_PFLAG_NOP = (1 << 0),
+};
+
+#define MLX5E_SET_PRIV_FLAG(priv, pflag, enable)    \
+       do {                                        \
+               if (enable)                         \
+                       priv->pflags |= pflag;      \
+               else                                \
+                       priv->pflags &= ~pflag;     \
+       } while (0)
+
 #ifdef CONFIG_MLX5_CORE_EN_DCB
 #define MLX5E_MAX_BW_ALLOC 100 /* Max percentage of BW allocation */
 #define MLX5E_MIN_BW_ALLOC 1   /* Min percentage of BW allocation */
@@ -354,6 +371,7 @@ struct mlx5e_sq {
        struct mlx5e_channel      *channel;
        int                        tc;
        struct mlx5e_ico_wqe_info *ico_wqe_info;
+       u32                        rate_limit;
 } ____cacheline_aligned_in_smp;
 
 static inline bool mlx5e_sq_has_room_for(struct mlx5e_sq *sq, u16 n)
@@ -530,6 +548,7 @@ struct mlx5e_priv {
        u32                        indir_rqtn;
        u32                        indir_tirn[MLX5E_NUM_INDIR_TIRS];
        struct mlx5e_direct_tir    direct_tir[MLX5E_MAX_NUM_CHANNELS];
+       u32                        tx_rates[MLX5E_MAX_NUM_SQS];
 
        struct mlx5e_flow_steering fs;
        struct mlx5e_vxlan_db      vxlan;
@@ -540,6 +559,7 @@ struct mlx5e_priv {
        struct work_struct         set_rx_mode_work;
        struct delayed_work        update_stats_work;
 
+       u32                        pflags;
        struct mlx5_core_dev      *mdev;
        struct net_device         *netdev;
        struct mlx5e_stats         stats;