Merge branch 'drm-radeon-testing' of /ssd/git/drm-radeon-next into drm-next-stage

[sfrench/cifs-2.6.git] / drivers / gpu / drm / radeon / radeon_drv.h

diff --git a/drivers/gpu/drm/radeon/radeon_drv.h b/drivers/gpu/drm/radeon/radeon_drv.h
index e13785282a825bbdbae44bb65fa02e3c93b8173b..cf911859eac2c7dd7cfa3fe425311ca1e2a7648c 100644 (file)
--- a/drivers/gpu/drm/radeon/radeon_drv.h
+++ b/drivers/gpu/drm/radeon/radeon_drv.h
@@ -106,9 +106,10 @@
  * 1.29- R500 3D cmd buffer support
  * 1.30- Add support for occlusion queries
  * 1.31- Add support for num Z pipes from GET_PARAM
+ * 1.32- fixes for rv740 setup
  */
 #define DRIVER_MAJOR           1
-#define DRIVER_MINOR           31
+#define DRIVER_MINOR           32
 #define DRIVER_PATCHLEVEL      0
 
 enum radeon_cp_microcode_version {
@@ -267,6 +268,8 @@ typedef struct drm_radeon_private {
 
        u32 scratch_ages[5];
 
+       int have_z_offset;
+
        /* starting from here on, data is preserved accross an open */
        uint32_t flags;         /* see radeon_chip_flags */
        resource_size_t fb_aper_offset;
@@ -294,6 +297,9 @@ typedef struct drm_radeon_private {
        int r700_sc_prim_fifo_size;
        int r700_sc_hiz_tile_fifo_size;
        int r700_sc_earlyz_tile_fifo_fize;
+       int r600_group_size;
+       int r600_npipes;
+       int r600_nbanks;
 
        struct mutex cs_mutex;
        u32 cs_id_scnt;
@@ -309,9 +315,11 @@ typedef struct drm_radeon_buf_priv {
        u32 age;
 } drm_radeon_buf_priv_t;
 
+struct drm_buffer;
+
 typedef struct drm_radeon_kcmd_buffer {
        int bufsz;
-       char *buf;
+       struct drm_buffer *buffer;
        int nbox;
        struct drm_clip_rect __user *boxes;
 } drm_radeon_kcmd_buffer_t;
@@ -2121,4 +2129,32 @@ extern void radeon_commit_ring(drm_radeon_private_t *dev_priv);
        write &= mask;                                          \
 } while (0)
 
+/**
+ * Copy given number of dwords from drm buffer to the ring buffer.
+ */
+#define OUT_RING_DRM_BUFFER(buf, sz) do {                              \
+       int _size = (sz) * 4;                                           \
+       struct drm_buffer *_buf = (buf);                                \
+       int _part_size;                                                 \
+       while (_size > 0) {                                             \
+               _part_size = _size;                                     \
+                                                                       \
+               if (write + _part_size/4 > mask)                        \
+                       _part_size = ((mask + 1) - write)*4;            \
+                                                                       \
+               if (drm_buffer_index(_buf) + _part_size > PAGE_SIZE)    \
+                       _part_size = PAGE_SIZE - drm_buffer_index(_buf);\
+                                                                       \
+                                                                       \
+                                                                       \
+               memcpy(ring + write, &_buf->data[drm_buffer_page(_buf)] \
+                       [drm_buffer_index(_buf)], _part_size);          \
+                                                                       \
+               _size -= _part_size;                                    \
+               write = (write + _part_size/4) & mask;                  \
+               drm_buffer_advance(_buf, _part_size);                   \
+       }                                                               \
+} while (0)
+
+
 #endif                         /* __RADEON_DRV_H__ */