Merge branch 'topic/oxygen' into for-linus

[sfrench/cifs-2.6.git] / drivers / gpu / drm / i915 / i915_gem_tiling.c

diff --git a/drivers/gpu/drm/i915/i915_gem_tiling.c b/drivers/gpu/drm/i915/i915_gem_tiling.c
index 52a059354e83a7397c96dd8401434e6134cceee5..540dd336e6ec682ade96cc0c56f9f7078a2e97ac 100644 (file)
--- a/drivers/gpu/drm/i915/i915_gem_tiling.c
+++ b/drivers/gpu/drm/i915/i915_gem_tiling.c
@@ -213,7 +213,8 @@ i915_tiling_ok(struct drm_device *dev, int stride, int size, int tiling_mode)
        if (tiling_mode == I915_TILING_NONE)
                return true;
 
-       if (tiling_mode == I915_TILING_Y && HAS_128_BYTE_Y_TILING(dev))
+       if (!IS_I9XX(dev) ||
+           (tiling_mode == I915_TILING_Y && HAS_128_BYTE_Y_TILING(dev)))
                tile_width = 128;
        else
                tile_width = 512;
@@ -225,11 +226,18 @@ i915_tiling_ok(struct drm_device *dev, int stride, int size, int tiling_mode)
                if (stride / 128 > I965_FENCE_MAX_PITCH_VAL)
                        return false;
        } else if (IS_I9XX(dev)) {
-               if (stride / tile_width > I830_FENCE_MAX_PITCH_VAL ||
+               uint32_t pitch_val = ffs(stride / tile_width) - 1;
+
+               /* XXX: For Y tiling, FENCE_MAX_PITCH_VAL is actually 6 (8KB)
+                * instead of 4 (2KB) on 945s.
+                */
+               if (pitch_val > I915_FENCE_MAX_PITCH_VAL ||
                    size > (I830_FENCE_MAX_SIZE_VAL << 20))
                        return false;
        } else {
-               if (stride / 128 > I830_FENCE_MAX_PITCH_VAL ||
+               uint32_t pitch_val = ffs(stride / tile_width) - 1;
+
+               if (pitch_val > I830_FENCE_MAX_PITCH_VAL ||
                    size > (I830_FENCE_MAX_SIZE_VAL << 19))
                        return false;
        }