Merge branch 'linux-4.12' of git://github.com/skeggsb/linux into drm-next

[sfrench/cifs-2.6.git] / drivers / gpu / drm / i915 / gvt / execlist.c

diff --git a/drivers/gpu/drm/i915/gvt/execlist.c b/drivers/gpu/drm/i915/gvt/execlist.c
index f1f426a97aa9d43826010d7be90f6bffdbe59426..dca989eb2d42ed48f6c13c15fe9d3f8a9cbfaab2 100644 (file)
--- a/drivers/gpu/drm/i915/gvt/execlist.c
+++ b/drivers/gpu/drm/i915/gvt/execlist.c
@@ -56,8 +56,8 @@ static int context_switch_events[] = {
 
 static int ring_id_to_context_switch_event(int ring_id)
 {
-       if (WARN_ON(ring_id < RCS && ring_id >
-                               ARRAY_SIZE(context_switch_events)))
+       if (WARN_ON(ring_id < RCS ||
+                   ring_id >= ARRAY_SIZE(context_switch_events)))
                return -EINVAL;
 
        return context_switch_events[ring_id];
@@ -394,9 +394,11 @@ static void prepare_shadow_batch_buffer(struct intel_vgpu_workload *workload)
 
 static int update_wa_ctx_2_shadow_ctx(struct intel_shadow_wa_ctx *wa_ctx)
 {
-       int ring_id = wa_ctx->workload->ring_id;
-       struct i915_gem_context *shadow_ctx =
-               wa_ctx->workload->vgpu->shadow_ctx;
+       struct intel_vgpu_workload *workload = container_of(wa_ctx,
+                                       struct intel_vgpu_workload,
+                                       wa_ctx);
+       int ring_id = workload->ring_id;
+       struct i915_gem_context *shadow_ctx = workload->vgpu->shadow_ctx;
        struct drm_i915_gem_object *ctx_obj =
                shadow_ctx->engine[ring_id].state->obj;
        struct execlist_ring_context *shadow_ring_context;
@@ -680,15 +682,12 @@ static int submit_context(struct intel_vgpu *vgpu, int ring_id,
                        CACHELINE_BYTES;
                workload->wa_ctx.per_ctx.guest_gma =
                        per_ctx & PER_CTX_ADDR_MASK;
-               workload->wa_ctx.workload = workload;
 
                WARN_ON(workload->wa_ctx.indirect_ctx.size && !(per_ctx & 0x1));
        }
 
        if (emulate_schedule_in)
-               memcpy(&workload->elsp_dwords,
-                               &vgpu->execlist[ring_id].elsp_dwords,
-                               sizeof(workload->elsp_dwords));
+               workload->elsp_dwords = vgpu->execlist[ring_id].elsp_dwords;
 
        gvt_dbg_el("workload %p ring id %d head %x tail %x start %x ctl %x\n",
                        workload, ring_id, head, tail, start, ctl);
@@ -775,7 +774,8 @@ static void init_vgpu_execlist(struct intel_vgpu *vgpu, int ring_id)
                        _EL_OFFSET_STATUS_PTR);
 
        ctx_status_ptr.dw = vgpu_vreg(vgpu, ctx_status_ptr_reg);
-       ctx_status_ptr.read_ptr = ctx_status_ptr.write_ptr = 0x7;
+       ctx_status_ptr.read_ptr = 0;
+       ctx_status_ptr.write_ptr = 0x7;
        vgpu_vreg(vgpu, ctx_status_ptr_reg) = ctx_status_ptr.dw;
 }