drm/amd/display: Attach VRR properties for eDP connectors
[sfrench/cifs-2.6.git] / drivers / gpu / drm / amd / display / amdgpu_dm / amdgpu_dm.c
index a9a28dbc3e2421e36468554a554d1987b7c4f46e..0b392bfca28475adc3e5921c7ab8b8ba1a5a7288 100644 (file)
@@ -699,22 +699,36 @@ static void s3_handle_mst(struct drm_device *dev, bool suspend)
 {
        struct amdgpu_dm_connector *aconnector;
        struct drm_connector *connector;
+       struct drm_dp_mst_topology_mgr *mgr;
+       int ret;
+       bool need_hotplug = false;
 
        drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
 
-       list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
-                  aconnector = to_amdgpu_dm_connector(connector);
-                  if (aconnector->dc_link->type == dc_connection_mst_branch &&
-                                  !aconnector->mst_port) {
+       list_for_each_entry(connector, &dev->mode_config.connector_list,
+                           head) {
+               aconnector = to_amdgpu_dm_connector(connector);
+               if (aconnector->dc_link->type != dc_connection_mst_branch ||
+                   aconnector->mst_port)
+                       continue;
 
-                          if (suspend)
-                                  drm_dp_mst_topology_mgr_suspend(&aconnector->mst_mgr);
-                          else
-                                  drm_dp_mst_topology_mgr_resume(&aconnector->mst_mgr);
-                  }
+               mgr = &aconnector->mst_mgr;
+
+               if (suspend) {
+                       drm_dp_mst_topology_mgr_suspend(mgr);
+               } else {
+                       ret = drm_dp_mst_topology_mgr_resume(mgr);
+                       if (ret < 0) {
+                               drm_dp_mst_topology_mgr_set_mst(mgr, false);
+                               need_hotplug = true;
+                       }
+               }
        }
 
        drm_modeset_unlock(&dev->mode_config.connection_mutex);
+
+       if (need_hotplug)
+               drm_kms_helper_hotplug_event(dev);
 }
 
 /**
@@ -898,7 +912,6 @@ static int dm_resume(void *handle)
        struct drm_plane_state *new_plane_state;
        struct dm_plane_state *dm_new_plane_state;
        enum dc_connection_type new_connection_type = dc_connection_none;
-       int ret;
        int i;
 
        /* power on hardware */
@@ -971,13 +984,13 @@ static int dm_resume(void *handle)
                }
        }
 
-       ret = drm_atomic_helper_resume(ddev, dm->cached_state);
+       drm_atomic_helper_resume(ddev, dm->cached_state);
 
        dm->cached_state = NULL;
 
        amdgpu_dm_irq_resume_late(adev);
 
-       return ret;
+       return 0;
 }
 
 /**
@@ -1759,7 +1772,7 @@ static int amdgpu_dm_backlight_update_status(struct backlight_device *bd)
                + caps.min_input_signal * 0x101;
 
        if (dc_link_set_backlight_level(dm->backlight_link,
-                       brightness, 0, 0))
+                       brightness, 0))
                return 0;
        else
                return 1;
@@ -4069,7 +4082,8 @@ void amdgpu_dm_connector_init_helper(struct amdgpu_display_manager *dm,
        }
 
        if (connector_type == DRM_MODE_CONNECTOR_HDMIA ||
-           connector_type == DRM_MODE_CONNECTOR_DisplayPort) {
+           connector_type == DRM_MODE_CONNECTOR_DisplayPort ||
+           connector_type == DRM_MODE_CONNECTOR_eDP) {
                drm_connector_attach_vrr_capable_property(
                        &aconnector->base);
        }
@@ -5920,7 +5934,7 @@ static int amdgpu_dm_atomic_check(struct drm_device *dev,
        for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) {
                if (!drm_atomic_crtc_needs_modeset(new_crtc_state) &&
                    !new_crtc_state->color_mgmt_changed &&
-                   !new_crtc_state->vrr_enabled)
+                   old_crtc_state->vrr_enabled == new_crtc_state->vrr_enabled)
                        continue;
 
                if (!new_crtc_state->enable)