Merge tag 'drm-for-v4.15-part2' of git://people.freedesktop.org/~airlied/linux

[sfrench/cifs-2.6.git] / drivers / gpu / drm / amd / amdgpu / vi.c

diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c b/drivers/gpu/drm/amd/amdgpu/vi.c
index 9ff69b90df363c4ee95472e2133f4f6d2059996e..3a4c2fa7e36dbcf258f9a54c851828951e203f62 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/vi.c
+++ b/drivers/gpu/drm/amd/amdgpu/vi.c
@@ -77,6 +77,7 @@
 #endif
 #include "dce_virtual.h"
 #include "mxgpu_vi.h"
+#include "amdgpu_dm.h"
 
 /*
  * Indirect registers accessor
@@ -1254,7 +1255,6 @@ static int vi_common_set_clockgating_state_by_smu(void *handle,
        uint32_t msg_id, pp_state = 0;
        uint32_t pp_support_state = 0;
        struct amdgpu_device *adev = (struct amdgpu_device *)handle;
-       void *pp_handle = adev->powerplay.pp_handle;
 
        if (adev->cg_flags & (AMD_CG_SUPPORT_MC_LS | AMD_CG_SUPPORT_MC_MGCG)) {
                if (adev->cg_flags & AMD_CG_SUPPORT_MC_LS) {
@@ -1271,7 +1271,8 @@ static int vi_common_set_clockgating_state_by_smu(void *handle,
                               PP_BLOCK_SYS_MC,
                               pp_support_state,
                               pp_state);
-               amd_set_clockgating_by_smu(pp_handle, msg_id);
+               if (adev->powerplay.pp_funcs->set_clockgating_by_smu)
+                       amdgpu_dpm_set_clockgating_by_smu(adev, msg_id);
        }
 
        if (adev->cg_flags & (AMD_CG_SUPPORT_SDMA_LS | AMD_CG_SUPPORT_SDMA_MGCG)) {
@@ -1289,7 +1290,8 @@ static int vi_common_set_clockgating_state_by_smu(void *handle,
                               PP_BLOCK_SYS_SDMA,
                               pp_support_state,
                               pp_state);
-               amd_set_clockgating_by_smu(pp_handle, msg_id);
+               if (adev->powerplay.pp_funcs->set_clockgating_by_smu)
+                       amdgpu_dpm_set_clockgating_by_smu(adev, msg_id);
        }
 
        if (adev->cg_flags & (AMD_CG_SUPPORT_HDP_LS | AMD_CG_SUPPORT_HDP_MGCG)) {
@@ -1307,7 +1309,8 @@ static int vi_common_set_clockgating_state_by_smu(void *handle,
                               PP_BLOCK_SYS_HDP,
                               pp_support_state,
                               pp_state);
-               amd_set_clockgating_by_smu(pp_handle, msg_id);
+               if (adev->powerplay.pp_funcs->set_clockgating_by_smu)
+                       amdgpu_dpm_set_clockgating_by_smu(adev, msg_id);
        }
 
 
@@ -1321,7 +1324,8 @@ static int vi_common_set_clockgating_state_by_smu(void *handle,
                               PP_BLOCK_SYS_BIF,
                               PP_STATE_SUPPORT_LS,
                                pp_state);
-               amd_set_clockgating_by_smu(pp_handle, msg_id);
+               if (adev->powerplay.pp_funcs->set_clockgating_by_smu)
+                       amdgpu_dpm_set_clockgating_by_smu(adev, msg_id);
        }
        if (adev->cg_flags & AMD_CG_SUPPORT_BIF_MGCG) {
                if (state == AMD_CG_STATE_UNGATE)
@@ -1333,7 +1337,8 @@ static int vi_common_set_clockgating_state_by_smu(void *handle,
                               PP_BLOCK_SYS_BIF,
                               PP_STATE_SUPPORT_CG,
                               pp_state);
-               amd_set_clockgating_by_smu(pp_handle, msg_id);
+               if (adev->powerplay.pp_funcs->set_clockgating_by_smu)
+                       amdgpu_dpm_set_clockgating_by_smu(adev, msg_id);
        }
 
        if (adev->cg_flags & AMD_CG_SUPPORT_DRM_LS) {
@@ -1347,7 +1352,8 @@ static int vi_common_set_clockgating_state_by_smu(void *handle,
                               PP_BLOCK_SYS_DRM,
                               PP_STATE_SUPPORT_LS,
                               pp_state);
-               amd_set_clockgating_by_smu(pp_handle, msg_id);
+               if (adev->powerplay.pp_funcs->set_clockgating_by_smu)
+                       amdgpu_dpm_set_clockgating_by_smu(adev, msg_id);
        }
 
        if (adev->cg_flags & AMD_CG_SUPPORT_ROM_MGCG) {
@@ -1361,7 +1367,8 @@ static int vi_common_set_clockgating_state_by_smu(void *handle,
                               PP_BLOCK_SYS_ROM,
                               PP_STATE_SUPPORT_CG,
                               pp_state);
-               amd_set_clockgating_by_smu(pp_handle, msg_id);
+               if (adev->powerplay.pp_funcs->set_clockgating_by_smu)
+                       amdgpu_dpm_set_clockgating_by_smu(adev, msg_id);
        }
        return 0;
 }
@@ -1496,6 +1503,10 @@ int vi_set_ip_blocks(struct amdgpu_device *adev)
                amdgpu_ip_block_add(adev, &amdgpu_pp_ip_block);
                if (adev->enable_virtual_display || amdgpu_sriov_vf(adev))
                        amdgpu_ip_block_add(adev, &dce_virtual_ip_block);
+#if defined(CONFIG_DRM_AMD_DC)
+               else if (amdgpu_device_has_dc_support(adev))
+                       amdgpu_ip_block_add(adev, &dm_ip_block);
+#endif
                else
                        amdgpu_ip_block_add(adev, &dce_v10_1_ip_block);
                amdgpu_ip_block_add(adev, &gfx_v8_0_ip_block);
@@ -1512,6 +1523,10 @@ int vi_set_ip_blocks(struct amdgpu_device *adev)
                amdgpu_ip_block_add(adev, &amdgpu_pp_ip_block);
                if (adev->enable_virtual_display || amdgpu_sriov_vf(adev))
                        amdgpu_ip_block_add(adev, &dce_virtual_ip_block);
+#if defined(CONFIG_DRM_AMD_DC)
+               else if (amdgpu_device_has_dc_support(adev))
+                       amdgpu_ip_block_add(adev, &dm_ip_block);
+#endif
                else
                        amdgpu_ip_block_add(adev, &dce_v10_0_ip_block);
                amdgpu_ip_block_add(adev, &gfx_v8_0_ip_block);
@@ -1530,6 +1545,10 @@ int vi_set_ip_blocks(struct amdgpu_device *adev)
                amdgpu_ip_block_add(adev, &amdgpu_pp_ip_block);
                if (adev->enable_virtual_display)
                        amdgpu_ip_block_add(adev, &dce_virtual_ip_block);
+#if defined(CONFIG_DRM_AMD_DC)
+               else if (amdgpu_device_has_dc_support(adev))
+                       amdgpu_ip_block_add(adev, &dm_ip_block);
+#endif
                else
                        amdgpu_ip_block_add(adev, &dce_v11_2_ip_block);
                amdgpu_ip_block_add(adev, &gfx_v8_0_ip_block);
@@ -1544,6 +1563,10 @@ int vi_set_ip_blocks(struct amdgpu_device *adev)
                amdgpu_ip_block_add(adev, &amdgpu_pp_ip_block);
                if (adev->enable_virtual_display)
                        amdgpu_ip_block_add(adev, &dce_virtual_ip_block);
+#if defined(CONFIG_DRM_AMD_DC)
+               else if (amdgpu_device_has_dc_support(adev))
+                       amdgpu_ip_block_add(adev, &dm_ip_block);
+#endif
                else
                        amdgpu_ip_block_add(adev, &dce_v11_0_ip_block);
                amdgpu_ip_block_add(adev, &gfx_v8_0_ip_block);
@@ -1561,6 +1584,10 @@ int vi_set_ip_blocks(struct amdgpu_device *adev)
                amdgpu_ip_block_add(adev, &amdgpu_pp_ip_block);
                if (adev->enable_virtual_display)
                        amdgpu_ip_block_add(adev, &dce_virtual_ip_block);
+#if defined(CONFIG_DRM_AMD_DC)
+               else if (amdgpu_device_has_dc_support(adev))
+                       amdgpu_ip_block_add(adev, &dm_ip_block);
+#endif
                else
                        amdgpu_ip_block_add(adev, &dce_v11_0_ip_block);
                amdgpu_ip_block_add(adev, &gfx_v8_1_ip_block);