edac: mpc85xx: fix MPC85xx dependency

[sfrench/cifs-2.6.git] / drivers / edac / Kconfig

diff --git a/drivers/edac/Kconfig b/drivers/edac/Kconfig
index 02127e59fe8e68f8f3518453028d47b84988e598..0d2f9dbb47e4fa6d3d3a4440b8427fe544407af3 100644 (file)
--- a/drivers/edac/Kconfig
+++ b/drivers/edac/Kconfig
@@ -47,6 +47,18 @@ config EDAC_DEBUG_VERBOSE
          Source file name and line number where debugging message
          printed will be added to debugging message.
 
+ config EDAC_DECODE_MCE
+       tristate "Decode MCEs in human-readable form (only on AMD for now)"
+       depends on CPU_SUP_AMD && X86_MCE
+       default y
+       ---help---
+         Enable this option if you want to decode Machine Check Exceptions
+         occuring on your machine in human-readable form.
+
+         You should definitely say Y here in case you want to decode MCEs
+         which occur really early upon boot, before the module infrastructure
+         has been initialized.
+
 config EDAC_MM_EDAC
        tristate "Main Memory EDAC (Error Detection And Correction) reporting"
        help
@@ -57,9 +69,12 @@ config EDAC_MM_EDAC
          occurred so that a particular failing memory module can be
          replaced.  If unsure, select 'Y'.
 
+config EDAC_MCE
+       bool
+
 config EDAC_AMD64
        tristate "AMD64 (Opteron, Athlon64) K8, F10h, F11h"
-       depends on EDAC_MM_EDAC && K8_NB && X86_64 && PCI && CPU_SUP_AMD
+       depends on EDAC_MM_EDAC && K8_NB && X86_64 && PCI && EDAC_DECODE_MCE
        help
          Support for error detection and correction on the AMD 64
          Families of Memory Controllers (K8, F10h and F11h)
@@ -154,6 +169,16 @@ config EDAC_I5400
          Support for error detection and correction the Intel
          i5400 MCH chipset (Seaburg).
 
+config EDAC_I7CORE
+       tristate "Intel i7 Core (Nehalem) processors"
+       depends on EDAC_MM_EDAC && PCI && X86
+       select EDAC_MCE
+       help
+         Support for error detection and correction the Intel
+         i7 Core (Nehalem) Integrated Memory Controller that exists on
+         newer processors like i7 Core, i7 Core Extreme, Xeon 35xx
+         and Xeon 55xx processors.
+
 config EDAC_I82860
        tristate "Intel 82860"
        depends on EDAC_MM_EDAC && PCI && X86_32
@@ -184,7 +209,7 @@ config EDAC_I5100
 
 config EDAC_MPC85XX
        tristate "Freescale MPC83xx / MPC85xx"
-       depends on EDAC_MM_EDAC && FSL_SOC && (PPC_83xx || MPC85xx)
+       depends on EDAC_MM_EDAC && FSL_SOC && (PPC_83xx || PPC_85xx)
        help
          Support for error detection and correction on the Freescale
          MPC8349, MPC8560, MPC8540, MPC8548