Merge tag 'nios2-v4.12-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/lftan...

[sfrench/cifs-2.6.git] / drivers / clk / ti / mux.c

diff --git a/drivers/clk/ti/mux.c b/drivers/clk/ti/mux.c
index 44777ab6fdeb3b6f8d0fcd5386790c506f39d300..18c267b38461dc96ff1d5dd26f518136a342ffb3 100644 (file)
--- a/drivers/clk/ti/mux.c
+++ b/drivers/clk/ti/mux.c
@@ -28,7 +28,7 @@
 
 static u8 ti_clk_mux_get_parent(struct clk_hw *hw)
 {
-       struct clk_mux *mux = to_clk_mux(hw);
+       struct clk_omap_mux *mux = to_clk_omap_mux(hw);
        int num_parents = clk_hw_get_num_parents(hw);
        u32 val;
 
@@ -39,7 +39,7 @@ static u8 ti_clk_mux_get_parent(struct clk_hw *hw)
         * OTOH, pmd_trace_clk_mux_ck uses a separate bit for each clock, so
         * val = 0x4 really means "bit 2, index starts at bit 0"
         */
-       val = ti_clk_ll_ops->clk_readl(mux->reg) >> mux->shift;
+       val = ti_clk_ll_ops->clk_readl(&mux->reg) >> mux->shift;
        val &= mux->mask;
 
        if (mux->table) {
@@ -65,7 +65,7 @@ static u8 ti_clk_mux_get_parent(struct clk_hw *hw)
 
 static int ti_clk_mux_set_parent(struct clk_hw *hw, u8 index)
 {
-       struct clk_mux *mux = to_clk_mux(hw);
+       struct clk_omap_mux *mux = to_clk_omap_mux(hw);
        u32 val;
 
        if (mux->table) {
@@ -81,11 +81,11 @@ static int ti_clk_mux_set_parent(struct clk_hw *hw, u8 index)
        if (mux->flags & CLK_MUX_HIWORD_MASK) {
                val = mux->mask << (mux->shift + 16);
        } else {
-               val = ti_clk_ll_ops->clk_readl(mux->reg);
+               val = ti_clk_ll_ops->clk_readl(&mux->reg);
                val &= ~(mux->mask << mux->shift);
        }
        val |= index << mux->shift;
-       ti_clk_ll_ops->clk_writel(val, mux->reg);
+       ti_clk_ll_ops->clk_writel(val, &mux->reg);
 
        return 0;
 }
@@ -97,12 +97,12 @@ const struct clk_ops ti_clk_mux_ops = {
 };
 
 static struct clk *_register_mux(struct device *dev, const char *name,
-                                const char **parent_names, u8 num_parents,
-                                unsigned long flags, void __iomem *reg,
-                                u8 shift, u32 mask, u8 clk_mux_flags,
-                                u32 *table)
+                                const char * const *parent_names,
+                                u8 num_parents, unsigned long flags,
+                                struct clk_omap_reg *reg, u8 shift, u32 mask,
+                                u8 clk_mux_flags, u32 *table)
 {
-       struct clk_mux *mux;
+       struct clk_omap_mux *mux;
        struct clk *clk;
        struct clk_init_data init;
 
@@ -120,14 +120,14 @@ static struct clk *_register_mux(struct device *dev, const char *name,
        init.num_parents = num_parents;
 
        /* struct clk_mux assignments */
-       mux->reg = reg;
+       memcpy(&mux->reg, reg, sizeof(*reg));
        mux->shift = shift;
        mux->mask = mask;
        mux->flags = clk_mux_flags;
        mux->table = table;
        mux->hw.init = &init;
 
-       clk = clk_register(dev, &mux->hw);
+       clk = ti_clk_register(dev, &mux->hw, name);
 
        if (IS_ERR(clk))
                kfree(mux);
@@ -140,12 +140,9 @@ struct clk *ti_clk_register_mux(struct ti_clk *setup)
        struct ti_clk_mux *mux;
        u32 flags;
        u8 mux_flags = 0;
-       struct clk_omap_reg *reg_setup;
-       u32 reg;
+       struct clk_omap_reg reg;
        u32 mask;
 
-       reg_setup = (struct clk_omap_reg *)&reg;
-
        mux = setup->data;
        flags = CLK_SET_RATE_NO_REPARENT;
 
@@ -154,8 +151,9 @@ struct clk *ti_clk_register_mux(struct ti_clk *setup)
                mask--;
 
        mask = (1 << fls(mask)) - 1;
-       reg_setup->index = mux->module;
-       reg_setup->offset = mux->reg;
+       reg.index = mux->module;
+       reg.offset = mux->reg;
+       reg.ptr = NULL;
 
        if (mux->flags & CLKF_INDEX_STARTS_AT_ONE)
                mux_flags |= CLK_MUX_INDEX_ONE;
@@ -164,7 +162,7 @@ struct clk *ti_clk_register_mux(struct ti_clk *setup)
                flags |= CLK_SET_RATE_PARENT;
 
        return _register_mux(NULL, setup->name, mux->parents, mux->num_parents,
-                            flags, (void __iomem *)reg, mux->bit_shift, mask,
+                            flags, &reg, mux->bit_shift, mask,
                             mux_flags, NULL);
 }
 
@@ -177,7 +175,7 @@ struct clk *ti_clk_register_mux(struct ti_clk *setup)
 static void of_mux_clk_setup(struct device_node *node)
 {
        struct clk *clk;
-       void __iomem *reg;
+       struct clk_omap_reg reg;
        unsigned int num_parents;
        const char **parent_names;
        u8 clk_mux_flags = 0;
@@ -196,9 +194,7 @@ static void of_mux_clk_setup(struct device_node *node)
 
        of_clk_parent_fill(node, parent_names, num_parents);
 
-       reg = ti_clk_get_reg_addr(node, 0);
-
-       if (IS_ERR(reg))
+       if (ti_clk_get_reg_addr(node, 0, &reg))
                goto cleanup;
 
        of_property_read_u32(node, "ti,bit-shift", &shift);
@@ -217,7 +213,7 @@ static void of_mux_clk_setup(struct device_node *node)
        mask = (1 << fls(mask)) - 1;
 
        clk = _register_mux(NULL, node->name, parent_names, num_parents,
-                           flags, reg, shift, mask, clk_mux_flags, NULL);
+                           flags, &reg, shift, mask, clk_mux_flags, NULL);
 
        if (!IS_ERR(clk))
                of_clk_add_provider(node, of_clk_src_simple_get, clk);
@@ -229,8 +225,7 @@ CLK_OF_DECLARE(mux_clk, "ti,mux-clock", of_mux_clk_setup);
 
 struct clk_hw *ti_clk_build_component_mux(struct ti_clk_mux *setup)
 {
-       struct clk_mux *mux;
-       struct clk_omap_reg *reg;
+       struct clk_omap_mux *mux;
        int num_parents;
 
        if (!setup)
@@ -240,12 +235,10 @@ struct clk_hw *ti_clk_build_component_mux(struct ti_clk_mux *setup)
        if (!mux)
                return ERR_PTR(-ENOMEM);
 
-       reg = (struct clk_omap_reg *)&mux->reg;
-
        mux->shift = setup->bit_shift;
 
-       reg->index = setup->module;
-       reg->offset = setup->reg;
+       mux->reg.index = setup->module;
+       mux->reg.offset = setup->reg;
 
        if (setup->flags & CLKF_INDEX_STARTS_AT_ONE)
                mux->flags |= CLK_MUX_INDEX_ONE;
@@ -260,7 +253,7 @@ struct clk_hw *ti_clk_build_component_mux(struct ti_clk_mux *setup)
 
 static void __init of_ti_composite_mux_clk_setup(struct device_node *node)
 {
-       struct clk_mux *mux;
+       struct clk_omap_mux *mux;
        unsigned int num_parents;
        u32 val;
 
@@ -268,9 +261,7 @@ static void __init of_ti_composite_mux_clk_setup(struct device_node *node)
        if (!mux)
                return;
 
-       mux->reg = ti_clk_get_reg_addr(node, 0);
-
-       if (IS_ERR(mux->reg))
+       if (ti_clk_get_reg_addr(node, 0, &mux->reg))
                goto cleanup;
 
        if (!of_property_read_u32(node, "ti,bit-shift", &val))