Merge branch 'clk-ti' into clk-next
[sfrench/cifs-2.6.git] / drivers / clk / clk-mux.c
index 7d60d690b7f2c3e24126f62504a2adbc7cff79a1..66e91f740508bd3ba996ffe0e67d2c40d55cb869 100644 (file)
  * parent - parent is adjustable through clk_set_parent
  */
 
+static inline u32 clk_mux_readl(struct clk_mux *mux)
+{
+       if (mux->flags & CLK_MUX_BIG_ENDIAN)
+               return ioread32be(mux->reg);
+
+       return readl(mux->reg);
+}
+
+static inline void clk_mux_writel(struct clk_mux *mux, u32 val)
+{
+       if (mux->flags & CLK_MUX_BIG_ENDIAN)
+               iowrite32be(val, mux->reg);
+       else
+               writel(val, mux->reg);
+}
+
 int clk_mux_val_to_index(struct clk_hw *hw, u32 *table, unsigned int flags,
                         unsigned int val)
 {
@@ -73,7 +89,7 @@ static u8 clk_mux_get_parent(struct clk_hw *hw)
        struct clk_mux *mux = to_clk_mux(hw);
        u32 val;
 
-       val = clk_readl(mux->reg) >> mux->shift;
+       val = clk_mux_readl(mux) >> mux->shift;
        val &= mux->mask;
 
        return clk_mux_val_to_index(hw, mux->table, mux->flags, val);
@@ -94,12 +110,12 @@ static int clk_mux_set_parent(struct clk_hw *hw, u8 index)
        if (mux->flags & CLK_MUX_HIWORD_MASK) {
                reg = mux->mask << (mux->shift + 16);
        } else {
-               reg = clk_readl(mux->reg);
+               reg = clk_mux_readl(mux);
                reg &= ~(mux->mask << mux->shift);
        }
        val = val << mux->shift;
        reg |= val;
-       clk_writel(reg, mux->reg);
+       clk_mux_writel(mux, reg);
 
        if (mux->lock)
                spin_unlock_irqrestore(mux->lock, flags);