x86: unify power/cpu_(32|64) regarding saving processor state

[sfrench/cifs-2.6.git] / arch / x86 / power / cpu_32.c

diff --git a/arch/x86/power/cpu_32.c b/arch/x86/power/cpu_32.c
index ce702c5b3a2c13fded43ab9629c6210352b3772a..294e78baff75051a57a7f27e78039710dc10026a 100644 (file)
--- a/arch/x86/power/cpu_32.c
+++ b/arch/x86/power/cpu_32.c
@@ -7,39 +7,90 @@
  * Copyright (c) 2001 Patrick Mochel <mochel@osdl.org>
  */
 
-#include <linux/module.h>
 #include <linux/suspend.h>
+#include <linux/smp.h>
+
+#include <asm/pgtable.h>
+#include <asm/proto.h>
 #include <asm/mtrr.h>
+#include <asm/page.h>
 #include <asm/mce.h>
 #include <asm/xcr.h>
 #include <asm/suspend.h>
 
+#ifdef CONFIG_X86_32
 static struct saved_context saved_context;
 
 unsigned long saved_context_ebx;
 unsigned long saved_context_esp, saved_context_ebp;
 unsigned long saved_context_esi, saved_context_edi;
 unsigned long saved_context_eflags;
+#else
+/* CONFIG_X86_64 */
+static void fix_processor_context(void);
+
+struct saved_context saved_context;
+#endif
 
+/**
+ *     __save_processor_state - save CPU registers before creating a
+ *             hibernation image and before restoring the memory state from it
+ *     @ctxt - structure to store the registers contents in
+ *
+ *     NOTE: If there is a CPU register the modification of which by the
+ *     boot kernel (ie. the kernel used for loading the hibernation image)
+ *     might affect the operations of the restored target kernel (ie. the one
+ *     saved in the hibernation image), then its contents must be saved by this
+ *     function.  In other words, if kernel A is hibernated and different
+ *     kernel B is used for loading the hibernation image into memory, the
+ *     kernel A's __save_processor_state() function must save all registers
+ *     needed by kernel A, so that it can operate correctly after the resume
+ *     regardless of what kernel B does in the meantime.
+ */
 static void __save_processor_state(struct saved_context *ctxt)
 {
+#ifdef CONFIG_X86_32
        mtrr_save_fixed_ranges(NULL);
+#endif
        kernel_fpu_begin();
 
        /*
         * descriptor tables
         */
+#ifdef CONFIG_X86_32
        store_gdt(&ctxt->gdt);
        store_idt(&ctxt->idt);
+#else
+/* CONFIG_X86_64 */
+       store_gdt((struct desc_ptr *)&ctxt->gdt_limit);
+       store_idt((struct desc_ptr *)&ctxt->idt_limit);
+#endif
        store_tr(ctxt->tr);
 
+       /* XMM0..XMM15 should be handled by kernel_fpu_begin(). */
        /*
         * segment registers
         */
+#ifdef CONFIG_X86_32
        savesegment(es, ctxt->es);
        savesegment(fs, ctxt->fs);
        savesegment(gs, ctxt->gs);
        savesegment(ss, ctxt->ss);
+#else
+/* CONFIG_X86_64 */
+       asm volatile ("movw %%ds, %0" : "=m" (ctxt->ds));
+       asm volatile ("movw %%es, %0" : "=m" (ctxt->es));
+       asm volatile ("movw %%fs, %0" : "=m" (ctxt->fs));
+       asm volatile ("movw %%gs, %0" : "=m" (ctxt->gs));
+       asm volatile ("movw %%ss, %0" : "=m" (ctxt->ss));
+
+       rdmsrl(MSR_FS_BASE, ctxt->fs_base);
+       rdmsrl(MSR_GS_BASE, ctxt->gs_base);
+       rdmsrl(MSR_KERNEL_GS_BASE, ctxt->gs_kernel_base);
+       mtrr_save_fixed_ranges(NULL);
+
+       rdmsrl(MSR_EFER, ctxt->efer);
+#endif
 
        /*
         * control registers
@@ -47,7 +98,13 @@ static void __save_processor_state(struct saved_context *ctxt)
        ctxt->cr0 = read_cr0();
        ctxt->cr2 = read_cr2();
        ctxt->cr3 = read_cr3();
+#ifdef CONFIG_X86_32
        ctxt->cr4 = read_cr4_safe();
+#else
+/* CONFIG_X86_64 */
+       ctxt->cr4 = read_cr4();
+       ctxt->cr8 = read_cr8();
+#endif
 }
 
 /* Needed by apm.c */
@@ -55,7 +112,9 @@ void save_processor_state(void)
 {
        __save_processor_state(&saved_context);
 }
+#ifdef CONFIG_X86_32
 EXPORT_SYMBOL(save_processor_state);
+#endif
 
 static void do_fpu_end(void)
 {