x86: coding style fixes to arch/x86/kernel/cpu/mtrr/state.c
[sfrench/cifs-2.6.git] / arch / x86 / kernel / time_64.c
index 91d4d495904e4ecd3f7f97617db511b607f3c02b..c737849e2ef7a46b66cce8bc63e230d5a4200da8 100644 (file)
@@ -77,13 +77,13 @@ unsigned long __init native_calculate_cpu_khz(void)
                reserve_evntsel_nmi(MSR_K7_EVNTSEL0 + i);
        }
        local_irq_save(flags);
-       /* start meauring cycles, incrementing from 0 */
+       /* start measuring cycles, incrementing from 0 */
        wrmsrl(MSR_K7_PERFCTR0 + i, 0);
        wrmsrl(MSR_K7_EVNTSEL0 + i, 1 << 22 | 3 << 16 | 0x76);
        rdtscl(tsc_start);
        do {
                rdmsrl(MSR_K7_PERFCTR0 + i, pmc_now);
-               tsc_now = get_cycles_sync();
+               tsc_now = get_cycles();
        } while ((tsc_now - tsc_start) < TICK_COUNT);
 
        local_irq_restore(flags);
@@ -120,8 +120,7 @@ void __init time_init(void)
 
        cpu_khz = tsc_khz;
        if (cpu_has(&boot_cpu_data, X86_FEATURE_CONSTANT_TSC) &&
-               boot_cpu_data.x86_vendor == X86_VENDOR_AMD &&
-               boot_cpu_data.x86 == 16)
+               (boot_cpu_data.x86_vendor == X86_VENDOR_AMD))
                cpu_khz = calculate_cpu_khz();
 
        if (unsynchronized_tsc())