x86: on x86_64, correct reading of PC RTC when update in progress in time_64.c
[sfrench/cifs-2.6.git] / arch / x86 / kernel / time_64.c
index 4ad1f7a6a83935f148c3ab806d5f5d1388510b59..368b1942b39aba509cfafe7fae629ef400a7a243 100644 (file)
@@ -161,21 +161,27 @@ unsigned long read_persistent_clock(void)
        unsigned century = 0;
 
        spin_lock_irqsave(&rtc_lock, flags);
        unsigned century = 0;
 
        spin_lock_irqsave(&rtc_lock, flags);
+       /*
+        * if UIP is clear, then we have >= 244 microseconds before RTC
+        * registers will be updated.  Spec sheet says that this is the
+        * reliable way to read RTC - registers invalid (off bus) during update
+        */
+       while ((CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP))
+               cpu_relax();
 
 
-       do {
-               sec = CMOS_READ(RTC_SECONDS);
-               min = CMOS_READ(RTC_MINUTES);
-               hour = CMOS_READ(RTC_HOURS);
-               day = CMOS_READ(RTC_DAY_OF_MONTH);
-               mon = CMOS_READ(RTC_MONTH);
-               year = CMOS_READ(RTC_YEAR);
+
+       /* now read all RTC registers while stable with interrupts disabled */
+       sec = CMOS_READ(RTC_SECONDS);
+       min = CMOS_READ(RTC_MINUTES);
+       hour = CMOS_READ(RTC_HOURS);
+       day = CMOS_READ(RTC_DAY_OF_MONTH);
+       mon = CMOS_READ(RTC_MONTH);
+       year = CMOS_READ(RTC_YEAR);
 #ifdef CONFIG_ACPI
 #ifdef CONFIG_ACPI
-               if (acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID &&
-                                       acpi_gbl_FADT.century)
-                       century = CMOS_READ(acpi_gbl_FADT.century);
+       if (acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID &&
+                               acpi_gbl_FADT.century)
+               century = CMOS_READ(acpi_gbl_FADT.century);
 #endif
 #endif
-       } while (sec != CMOS_READ(RTC_SECONDS));
-
        spin_unlock_irqrestore(&rtc_lock, flags);
 
        /*
        spin_unlock_irqrestore(&rtc_lock, flags);
 
        /*