x86: 32-bit IOAPIC: de-fang IRQ compression

[sfrench/cifs-2.6.git] / arch / x86 / kernel / mpparse_32.c

diff --git a/arch/x86/kernel/mpparse_32.c b/arch/x86/kernel/mpparse_32.c
index 13abb4ebfb79b3f831f8b7f5373c16d31844c2bd..bfcfc41f56070d1a06582e0c4cbbc7e61ab5c194 100644 (file)
--- a/arch/x86/kernel/mpparse_32.c
+++ b/arch/x86/kernel/mpparse_32.c
@@ -258,7 +258,7 @@ static void __init MP_ioapic_info (struct mpc_config_ioapic *m)
        if (!(m->mpc_flags & MPC_APIC_USABLE))
                return;
 
-       printk(KERN_INFO "I/O APIC #%d Version %d at 0x%lX.\n",
+       printk(KERN_INFO "I/O APIC #%d Version %d at 0x%X.\n",
                m->mpc_apicid, m->mpc_apicver, m->mpc_apicaddr);
        if (nr_ioapics >= MAX_IO_APICS) {
                printk(KERN_CRIT "Max # of I/O APICs (%d) exceeded (found %d).\n",
@@ -405,9 +405,9 @@ static int __init smp_read_mpc(struct mp_config_table *mpc)
 
        mps_oem_check(mpc, oem, str);
 
-       printk("APIC at: 0x%lX\n",mpc->mpc_lapic);
+       printk("APIC at: 0x%X\n", mpc->mpc_lapic);
 
-       /* 
+       /*
         * Save the local APIC address (it might be non-default) -- but only
         * if we're not using ACPI.
         */
@@ -918,14 +918,14 @@ void __init mp_register_ioapic(u8 id, u32 address, u32 gsi_base)
         */
        mp_ioapic_routing[idx].apic_id = mp_ioapics[idx].mpc_apicid;
        mp_ioapic_routing[idx].gsi_base = gsi_base;
-       mp_ioapic_routing[idx].gsi_end = gsi_base + 
+       mp_ioapic_routing[idx].gsi_end = gsi_base +
                io_apic_get_redir_entries(idx);
 
-       printk("IOAPIC[%d]: apic_id %d, version %d, address 0x%lx, "
-               "GSI %d-%d\n", idx, mp_ioapics[idx].mpc_apicid, 
-               mp_ioapics[idx].mpc_apicver, mp_ioapics[idx].mpc_apicaddr,
-               mp_ioapic_routing[idx].gsi_base,
-               mp_ioapic_routing[idx].gsi_end);
+       printk("IOAPIC[%d]: apic_id %d, version %d, address 0x%x, "
+              "GSI %d-%d\n", idx, mp_ioapics[idx].mpc_apicid,
+              mp_ioapics[idx].mpc_apicver, mp_ioapics[idx].mpc_apicaddr,
+              mp_ioapic_routing[idx].gsi_base,
+              mp_ioapic_routing[idx].gsi_end);
 }
 
 void __init
@@ -1001,7 +1001,7 @@ void __init mp_config_acpi_legacy_irqs (void)
 
        /* 
         * Use the default configuration for the IRQs 0-15.  Unless
-        * overriden by (MADT) interrupt source override entries.
+        * overridden by (MADT) interrupt source override entries.
         */
        for (i = 0; i < 16; i++) {
                int idx;
@@ -1041,13 +1041,14 @@ void __init mp_config_acpi_legacy_irqs (void)
 }
 
 #define MAX_GSI_NUM    4096
+#define IRQ_COMPRESSION_START  64
 
 int mp_register_gsi(u32 gsi, int triggering, int polarity)
 {
        int ioapic = -1;
        int ioapic_pin = 0;
        int idx, bit = 0;
-       static int pci_irq = 16;
+       static int pci_irq = IRQ_COMPRESSION_START;
        /*
         * Mapping between Global System Interrups, which
         * represent all possible interrupts, and IRQs
@@ -1086,12 +1087,16 @@ int mp_register_gsi(u32 gsi, int triggering, int polarity)
        if ((1<<bit) & mp_ioapic_routing[ioapic].pin_programmed[idx]) {
                Dprintk(KERN_DEBUG "Pin %d-%d already programmed\n",
                        mp_ioapic_routing[ioapic].apic_id, ioapic_pin);
-               return gsi_to_irq[gsi];
+               return (gsi < IRQ_COMPRESSION_START ? gsi : gsi_to_irq[gsi]);
        }
 
        mp_ioapic_routing[ioapic].pin_programmed[idx] |= (1<<bit);
 
-       if (triggering == ACPI_LEVEL_SENSITIVE) {
+       /*
+        * For GSI >= 64, use IRQ compression
+        */
+       if ((gsi >= IRQ_COMPRESSION_START)
+               && (triggering == ACPI_LEVEL_SENSITIVE)) {
                /*
                 * For PCI devices assign IRQs in order, avoiding gaps
                 * due to unused I/O APIC pins.