x86: move quad_local_to_mp_bus_id to numa.c

[sfrench/cifs-2.6.git] / arch / x86 / kernel / mpparse_32.c

diff --git a/arch/x86/kernel/mpparse_32.c b/arch/x86/kernel/mpparse_32.c
index f349e68e45a0207793432ec794fea8aa441f6f77..2abc9392799add841607d59d7c97d843d8506bd2 100644 (file)
--- a/arch/x86/kernel/mpparse_32.c
+++ b/arch/x86/kernel/mpparse_32.c
@@ -45,7 +45,6 @@ int apic_version [MAX_APICS];
 int mp_bus_id_to_type [MAX_MP_BUSSES];
 int mp_bus_id_to_node [MAX_MP_BUSSES];
 int mp_bus_id_to_local [MAX_MP_BUSSES];
-int quad_local_to_mp_bus_id [NR_CPUS/4][4];
 int mp_bus_id_to_pci_bus [MAX_MP_BUSSES] = { [0 ... MAX_MP_BUSSES-1] = -1 };
 static int mp_current_pci_id;
 
@@ -70,6 +69,8 @@ unsigned int boot_cpu_physical_apicid = -1U;
 /* Internal processor count */
 unsigned int num_processors;
 
+unsigned disabled_cpus __cpuinitdata;
+
 /* Bitmask of physically existing CPUs */
 physid_mask_t phys_cpu_present_map;
 
@@ -108,8 +109,10 @@ static void __cpuinit MP_processor_info (struct mpc_config_processor *m)
        int ver, apicid;
        physid_mask_t phys_cpu;
        
-       if (!(m->mpc_cpuflag & CPU_ENABLED))
+       if (!(m->mpc_cpuflag & CPU_ENABLED)) {
+               disabled_cpus++;
                return;
+       }
 
        apicid = mpc_apic_id(m, translation_table[mpc_record]);