Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net

[sfrench/cifs-2.6.git] / arch / x86 / kernel / cpu / intel.c

diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index 74e804ddc5c7567ec8b875fbca0e6f69d5922763..1ef456273172c8875e5673d890916dd70033e8e4 100644 (file)
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -144,6 +144,21 @@ static void early_init_intel(struct cpuinfo_x86 *c)
                        setup_clear_cpu_cap(X86_FEATURE_ERMS);
                }
        }
+
+       /*
+        * Intel Quark Core DevMan_001.pdf section 6.4.11
+        * "The operating system also is required to invalidate (i.e., flush)
+        *  the TLB when any changes are made to any of the page table entries.
+        *  The operating system must reload CR3 to cause the TLB to be flushed"
+        *
+        * As a result cpu_has_pge() in arch/x86/include/asm/tlbflush.h should
+        * be false so that __flush_tlb_all() causes CR3 insted of CR4.PGE
+        * to be modified
+        */
+       if (c->x86 == 5 && c->x86_model == 9) {
+               pr_info("Disabling PGE capability bit\n");
+               setup_clear_cpu_cap(X86_FEATURE_PGE);
+       }
 }
 
 #ifdef CONFIG_X86_32
@@ -382,6 +397,13 @@ static void init_intel(struct cpuinfo_x86 *c)
        }
 
        l2 = init_intel_cacheinfo(c);
+
+       /* Detect legacy cache sizes if init_intel_cacheinfo did not */
+       if (l2 == 0) {
+               cpu_detect_cache_sizes(c);
+               l2 = c->x86_cache_size;
+       }
+
        if (c->cpuid_level > 9) {
                unsigned eax = cpuid_eax(10);
                /* Check for version and the number of counters */
@@ -485,6 +507,13 @@ static unsigned int intel_size_cache(struct cpuinfo_x86 *c, unsigned int size)
         */
        if ((c->x86 == 6) && (c->x86_model == 11) && (size == 0))
                size = 256;
+
+       /*
+        * Intel Quark SoC X1000 contains a 4-way set associative
+        * 16K cache with a 16 byte cache line and 256 lines per tag
+        */
+       if ((c->x86 == 5) && (c->x86_model == 9))
+               size = 16;
        return size;
 }
 #endif
@@ -686,7 +715,8 @@ static const struct cpu_dev intel_cpu_dev = {
                          [3] = "OverDrive PODP5V83",
                          [4] = "Pentium MMX",
                          [7] = "Mobile Pentium 75 - 200",
-                         [8] = "Mobile Pentium MMX"
+                         [8] = "Mobile Pentium MMX",
+                         [9] = "Quark SoC X1000",
                  }
                },
                { .family = 6, .model_names =