Merge branch 'parisc-4.20-1' of git://git.kernel.org/pub/scm/linux/kernel/git/deller...
[sfrench/cifs-2.6.git] / arch / x86 / kernel / amd_nb.c
index b481b95bd8f6b9e439c5d72e42af21b18d250af4..a6eca647bc76e33c8d9bc730ada8cb9d384dba97 100644 (file)
@@ -61,6 +61,21 @@ static const struct pci_device_id amd_nb_link_ids[] = {
        {}
 };
 
+static const struct pci_device_id hygon_root_ids[] = {
+       { PCI_DEVICE(PCI_VENDOR_ID_HYGON, PCI_DEVICE_ID_AMD_17H_ROOT) },
+       {}
+};
+
+const struct pci_device_id hygon_nb_misc_ids[] = {
+       { PCI_DEVICE(PCI_VENDOR_ID_HYGON, PCI_DEVICE_ID_AMD_17H_DF_F3) },
+       {}
+};
+
+static const struct pci_device_id hygon_nb_link_ids[] = {
+       { PCI_DEVICE(PCI_VENDOR_ID_HYGON, PCI_DEVICE_ID_AMD_17H_DF_F4) },
+       {}
+};
+
 const struct amd_nb_bus_dev_range amd_nb_bus_dev_ranges[] __initconst = {
        { 0x00, 0x18, 0x20 },
        { 0xff, 0x00, 0x20 },
@@ -194,15 +209,24 @@ EXPORT_SYMBOL_GPL(amd_df_indirect_read);
 
 int amd_cache_northbridges(void)
 {
-       u16 i = 0;
-       struct amd_northbridge *nb;
+       const struct pci_device_id *misc_ids = amd_nb_misc_ids;
+       const struct pci_device_id *link_ids = amd_nb_link_ids;
+       const struct pci_device_id *root_ids = amd_root_ids;
        struct pci_dev *root, *misc, *link;
+       struct amd_northbridge *nb;
+       u16 i = 0;
 
        if (amd_northbridges.num)
                return 0;
 
+       if (boot_cpu_data.x86_vendor == X86_VENDOR_HYGON) {
+               root_ids = hygon_root_ids;
+               misc_ids = hygon_nb_misc_ids;
+               link_ids = hygon_nb_link_ids;
+       }
+
        misc = NULL;
-       while ((misc = next_northbridge(misc, amd_nb_misc_ids)) != NULL)
+       while ((misc = next_northbridge(misc, misc_ids)) != NULL)
                i++;
 
        if (!i)
@@ -218,11 +242,11 @@ int amd_cache_northbridges(void)
        link = misc = root = NULL;
        for (i = 0; i != amd_northbridges.num; i++) {
                node_to_amd_nb(i)->root = root =
-                       next_northbridge(root, amd_root_ids);
+                       next_northbridge(root, root_ids);
                node_to_amd_nb(i)->misc = misc =
-                       next_northbridge(misc, amd_nb_misc_ids);
+                       next_northbridge(misc, misc_ids);
                node_to_amd_nb(i)->link = link =
-                       next_northbridge(link, amd_nb_link_ids);
+                       next_northbridge(link, link_ids);
        }
 
        if (amd_gart_present())
@@ -261,11 +285,19 @@ EXPORT_SYMBOL_GPL(amd_cache_northbridges);
  */
 bool __init early_is_amd_nb(u32 device)
 {
+       const struct pci_device_id *misc_ids = amd_nb_misc_ids;
        const struct pci_device_id *id;
        u32 vendor = device & 0xffff;
 
+       if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD &&
+           boot_cpu_data.x86_vendor != X86_VENDOR_HYGON)
+               return false;
+
+       if (boot_cpu_data.x86_vendor == X86_VENDOR_HYGON)
+               misc_ids = hygon_nb_misc_ids;
+
        device >>= 16;
-       for (id = amd_nb_misc_ids; id->vendor; id++)
+       for (id = misc_ids; id->vendor; id++)
                if (vendor == id->vendor && device == id->device)
                        return true;
        return false;
@@ -277,7 +309,8 @@ struct resource *amd_get_mmconfig_range(struct resource *res)
        u64 base, msr;
        unsigned int segn_busn_bits;
 
-       if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD)
+       if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD &&
+           boot_cpu_data.x86_vendor != X86_VENDOR_HYGON)
                return NULL;
 
        /* assume all cpus from fam10h have mmconfig */