Merge 'acpi-2.6.12' branch into to-akpm

[sfrench/cifs-2.6.git] / arch / sparc64 / mm / init.c

diff --git a/arch/sparc64/mm/init.c b/arch/sparc64/mm/init.c
index 9c5222075da93ac61018cb996f32008178dffcbd..3fbaf342a452368972f0db2c9881d4be555ad41d 100644 (file)
--- a/arch/sparc64/mm/init.c
+++ b/arch/sparc64/mm/init.c
@@ -121,23 +121,33 @@ __inline__ void flush_dcache_page_impl(struct page *page)
 }
 
 #define PG_dcache_dirty                PG_arch_1
+#define PG_dcache_cpu_shift    24
+#define PG_dcache_cpu_mask     (256 - 1)
+
+#if NR_CPUS > 256
+#error D-cache dirty tracking and thread_info->cpu need fixing for > 256 cpus
+#endif
 
 #define dcache_dirty_cpu(page) \
-       (((page)->flags >> 24) & (NR_CPUS - 1UL))
+       (((page)->flags >> PG_dcache_cpu_shift) & PG_dcache_cpu_mask)
 
 static __inline__ void set_dcache_dirty(struct page *page, int this_cpu)
 {
        unsigned long mask = this_cpu;
-       unsigned long non_cpu_bits = ~((NR_CPUS - 1UL) << 24UL);
-       mask = (mask << 24) | (1UL << PG_dcache_dirty);
+       unsigned long non_cpu_bits;
+
+       non_cpu_bits = ~(PG_dcache_cpu_mask << PG_dcache_cpu_shift);
+       mask = (mask << PG_dcache_cpu_shift) | (1UL << PG_dcache_dirty);
+
        __asm__ __volatile__("1:\n\t"
                             "ldx       [%2], %%g7\n\t"
                             "and       %%g7, %1, %%g1\n\t"
                             "or        %%g1, %0, %%g1\n\t"
                             "casx      [%2], %%g7, %%g1\n\t"
                             "cmp       %%g7, %%g1\n\t"
+                            "membar    #StoreLoad | #StoreStore\n\t"
                             "bne,pn    %%xcc, 1b\n\t"
-                            " membar   #StoreLoad | #StoreStore"
+                            " nop"
                             : /* no outputs */
                             : "r" (mask), "r" (non_cpu_bits), "r" (&page->flags)
                             : "g1", "g7");
@@ -150,19 +160,21 @@ static __inline__ void clear_dcache_dirty_cpu(struct page *page, unsigned long c
        __asm__ __volatile__("! test_and_clear_dcache_dirty\n"
                             "1:\n\t"
                             "ldx       [%2], %%g7\n\t"
-                            "srlx      %%g7, 24, %%g1\n\t"
+                            "srlx      %%g7, %4, %%g1\n\t"
                             "and       %%g1, %3, %%g1\n\t"
                             "cmp       %%g1, %0\n\t"
                             "bne,pn    %%icc, 2f\n\t"
                             " andn     %%g7, %1, %%g1\n\t"
                             "casx      [%2], %%g7, %%g1\n\t"
                             "cmp       %%g7, %%g1\n\t"
+                            "membar    #StoreLoad | #StoreStore\n\t"
                             "bne,pn    %%xcc, 1b\n\t"
-                            " membar   #StoreLoad | #StoreStore\n"
+                            " nop\n"
                             "2:"
                             : /* no outputs */
                             : "r" (cpu), "r" (mask), "r" (&page->flags),
-                              "i" (NR_CPUS - 1UL)
+                              "i" (PG_dcache_cpu_mask),
+                              "i" (PG_dcache_cpu_shift)
                             : "g1", "g7");
 }
 
@@ -178,7 +190,8 @@ void update_mmu_cache(struct vm_area_struct *vma, unsigned long address, pte_t p
        if (pfn_valid(pfn) &&
            (page = pfn_to_page(pfn), page_mapping(page)) &&
            ((pg_flags = page->flags) & (1UL << PG_dcache_dirty))) {
-               int cpu = ((pg_flags >> 24) & (NR_CPUS - 1UL));
+               int cpu = ((pg_flags >> PG_dcache_cpu_shift) &
+                          PG_dcache_cpu_mask);
                int this_cpu = get_cpu();
 
                /* This is just to optimize away some function calls