#include <linux/sched.h>
#include <linux/capability.h>
#include <linux/errno.h>
-#include <linux/smp_lock.h>
+#include <linux/pci.h>
#include <linux/msi.h>
#include <linux/irq.h>
#include <linux/init.h>
#include <asm/uaccess.h>
-#include <asm/pbm.h>
#include <asm/pgtable.h>
#include <asm/irq.h>
#include <asm/ebus.h>
#else
/* List of all PCI controllers found in the system. */
-struct pci_controller_info *pci_controller_root = NULL;
+struct pci_pbm_info *pci_pbm_root = NULL;
-/* Each PCI controller found gets a unique index. */
-int pci_num_controllers = 0;
+/* Each PBM found gets a unique index. */
+int pci_num_pbms = 0;
volatile int pci_poke_in_progress;
volatile int pci_poke_cpu = -1;
extern void schizo_plus_init(struct device_node *, const char *);
extern void tomatillo_init(struct device_node *, const char *);
extern void sun4v_pci_init(struct device_node *, const char *);
+extern void fire_pci_init(struct device_node *, const char *);
static struct {
char *model_name;
{ "SUNW,tomatillo", tomatillo_init },
{ "pci108e,a801", tomatillo_init },
{ "SUNW,sun4v-pci", sun4v_pci_init },
+ { "pciex108e,80f0", fire_pci_init },
};
#define PCI_NUM_CONTROLLER_TYPES (sizeof(pci_controller_table) / \
sizeof(pci_controller_table[0]))
/* Find each controller in the system, attach and initialize
* software state structure for each and link into the
- * pci_controller_root. Setup the controller enough such
+ * pci_pbm_root. Setup the controller enough such
* that bus scanning can be done.
*/
static void __init pci_controller_probe(void)
pci_controller_scan(pci_controller_init);
}
+static int ofpci_verbose;
+
+static int __init ofpci_debug(char *str)
+{
+ int val = 0;
+
+ get_option(&str, &val);
+ if (val)
+ ofpci_verbose = 1;
+ return 1;
+}
+
+__setup("ofpci_debug=", ofpci_debug);
+
static unsigned long pci_parse_of_flags(u32 addr0)
{
unsigned long flags = 0;
addrs = of_get_property(node, "assigned-addresses", &proplen);
if (!addrs)
return;
- printk(" parse addresses (%d bytes) @ %p\n", proplen, addrs);
+ if (ofpci_verbose)
+ printk(" parse addresses (%d bytes) @ %p\n",
+ proplen, addrs);
op_res = &op->resource[0];
for (; proplen >= 20; proplen -= 20, addrs += 5, op_res++) {
struct resource *res;
if (!flags)
continue;
i = addrs[0] & 0xff;
- printk(" start: %lx, end: %lx, i: %x\n",
- op_res->start, op_res->end, i);
+ if (ofpci_verbose)
+ printk(" start: %lx, end: %lx, i: %x\n",
+ op_res->start, op_res->end, i);
if (PCI_BASE_ADDRESS_0 <= i && i <= PCI_BASE_ADDRESS_5) {
res = &dev->resource[(i - PCI_BASE_ADDRESS_0) >> 2];
const char *type;
u32 class;
- dev = kzalloc(sizeof(struct pci_dev), GFP_KERNEL);
+ dev = alloc_pci_dev();
if (!dev)
return NULL;
if (type == NULL)
type = "";
- printk(" create device, devfn: %x, type: %s hostcontroller(%d)\n",
- devfn, type, host_controller);
+ if (ofpci_verbose)
+ printk(" create device, devfn: %x, type: %s\n",
+ devfn, type);
dev->bus = bus;
dev->sysdata = node;
sprintf(pci_name(dev), "%04x:%02x:%02x.%d", pci_domain_nr(bus),
dev->bus->number, PCI_SLOT(devfn), PCI_FUNC(devfn));
}
- printk(" class: 0x%x device name: %s\n",
- dev->class, pci_name(dev));
+ if (ofpci_verbose)
+ printk(" class: 0x%x device name: %s\n",
+ dev->class, pci_name(dev));
+
+ /* I have seen IDE devices which will not respond to
+ * the bmdma simplex check reads if bus mastering is
+ * disabled.
+ */
+ if ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE)
+ pci_set_master(dev);
dev->current_state = 4; /* unknown power state */
dev->error_state = pci_channel_io_normal;
}
pci_parse_of_addrs(sd->op, node, dev);
- printk(" adding to system ...\n");
+ if (ofpci_verbose)
+ printk(" adding to system ...\n");
pci_device_add(dev, bus);
return dev;
}
-static void __init apb_calc_first_last(u8 map, u32 *first_p, u32 *last_p)
+static void __devinit apb_calc_first_last(u8 map, u32 *first_p, u32 *last_p)
{
u32 idx, first, last;
*last_p = last;
}
-static void __init pci_resource_adjust(struct resource *res,
- struct resource *root)
+static void pci_resource_adjust(struct resource *res,
+ struct resource *root)
{
res->start += root->start;
res->end += root->start;
}
+/* For PCI bus devices which lack a 'ranges' property we interrogate
+ * the config space values to set the resources, just like the generic
+ * Linux PCI probing code does.
+ */
+static void __devinit pci_cfg_fake_ranges(struct pci_dev *dev,
+ struct pci_bus *bus,
+ struct pci_pbm_info *pbm)
+{
+ struct resource *res;
+ u8 io_base_lo, io_limit_lo;
+ u16 mem_base_lo, mem_limit_lo;
+ unsigned long base, limit;
+
+ pci_read_config_byte(dev, PCI_IO_BASE, &io_base_lo);
+ pci_read_config_byte(dev, PCI_IO_LIMIT, &io_limit_lo);
+ base = (io_base_lo & PCI_IO_RANGE_MASK) << 8;
+ limit = (io_limit_lo & PCI_IO_RANGE_MASK) << 8;
+
+ if ((io_base_lo & PCI_IO_RANGE_TYPE_MASK) == PCI_IO_RANGE_TYPE_32) {
+ u16 io_base_hi, io_limit_hi;
+
+ pci_read_config_word(dev, PCI_IO_BASE_UPPER16, &io_base_hi);
+ pci_read_config_word(dev, PCI_IO_LIMIT_UPPER16, &io_limit_hi);
+ base |= (io_base_hi << 16);
+ limit |= (io_limit_hi << 16);
+ }
+
+ res = bus->resource[0];
+ if (base <= limit) {
+ res->flags = (io_base_lo & PCI_IO_RANGE_TYPE_MASK) | IORESOURCE_IO;
+ if (!res->start)
+ res->start = base;
+ if (!res->end)
+ res->end = limit + 0xfff;
+ pci_resource_adjust(res, &pbm->io_space);
+ }
+
+ pci_read_config_word(dev, PCI_MEMORY_BASE, &mem_base_lo);
+ pci_read_config_word(dev, PCI_MEMORY_LIMIT, &mem_limit_lo);
+ base = (mem_base_lo & PCI_MEMORY_RANGE_MASK) << 16;
+ limit = (mem_limit_lo & PCI_MEMORY_RANGE_MASK) << 16;
+
+ res = bus->resource[1];
+ if (base <= limit) {
+ res->flags = ((mem_base_lo & PCI_MEMORY_RANGE_TYPE_MASK) |
+ IORESOURCE_MEM);
+ res->start = base;
+ res->end = limit + 0xfffff;
+ pci_resource_adjust(res, &pbm->mem_space);
+ }
+
+ pci_read_config_word(dev, PCI_PREF_MEMORY_BASE, &mem_base_lo);
+ pci_read_config_word(dev, PCI_PREF_MEMORY_LIMIT, &mem_limit_lo);
+ base = (mem_base_lo & PCI_PREF_RANGE_MASK) << 16;
+ limit = (mem_limit_lo & PCI_PREF_RANGE_MASK) << 16;
+
+ if ((mem_base_lo & PCI_PREF_RANGE_TYPE_MASK) == PCI_PREF_RANGE_TYPE_64) {
+ u32 mem_base_hi, mem_limit_hi;
+
+ pci_read_config_dword(dev, PCI_PREF_BASE_UPPER32, &mem_base_hi);
+ pci_read_config_dword(dev, PCI_PREF_LIMIT_UPPER32, &mem_limit_hi);
+
+ /*
+ * Some bridges set the base > limit by default, and some
+ * (broken) BIOSes do not initialize them. If we find
+ * this, just assume they are not being used.
+ */
+ if (mem_base_hi <= mem_limit_hi) {
+ base |= ((long) mem_base_hi) << 32;
+ limit |= ((long) mem_limit_hi) << 32;
+ }
+ }
+
+ res = bus->resource[2];
+ if (base <= limit) {
+ res->flags = ((mem_base_lo & PCI_MEMORY_RANGE_TYPE_MASK) |
+ IORESOURCE_MEM | IORESOURCE_PREFETCH);
+ res->start = base;
+ res->end = limit + 0xfffff;
+ pci_resource_adjust(res, &pbm->mem_space);
+ }
+}
+
/* Cook up fake bus resources for SUNW,simba PCI bridges which lack
* a proper 'ranges' property.
*/
-static void __init apb_fake_ranges(struct pci_dev *dev,
- struct pci_bus *bus,
- struct pci_pbm_info *pbm)
+static void __devinit apb_fake_ranges(struct pci_dev *dev,
+ struct pci_bus *bus,
+ struct pci_pbm_info *pbm)
{
struct resource *res;
u32 first, last;
pci_resource_adjust(res, &pbm->mem_space);
}
-static void __init pci_of_scan_bus(struct pci_pbm_info *pbm,
- struct device_node *node,
- struct pci_bus *bus);
+static void __devinit pci_of_scan_bus(struct pci_pbm_info *pbm,
+ struct device_node *node,
+ struct pci_bus *bus);
#define GET_64BIT(prop, i) ((((u64) (prop)[(i)]) << 32) | (prop)[(i)+1])
-void __devinit of_scan_pci_bridge(struct pci_pbm_info *pbm,
- struct device_node *node,
- struct pci_dev *dev)
+static void __devinit of_scan_pci_bridge(struct pci_pbm_info *pbm,
+ struct device_node *node,
+ struct pci_dev *dev)
{
struct pci_bus *bus;
const u32 *busrange, *ranges;
unsigned int flags;
u64 size;
- printk("of_scan_pci_bridge(%s)\n", node->full_name);
+ if (ofpci_verbose)
+ printk("of_scan_pci_bridge(%s)\n", node->full_name);
/* parse bus-range property */
busrange = of_get_property(node, "bus-range", &len);
simba = 0;
if (ranges == NULL) {
const char *model = of_get_property(node, "model", NULL);
- if (model && !strcmp(model, "SUNW,simba")) {
+ if (model && !strcmp(model, "SUNW,simba"))
simba = 1;
- } else {
- printk(KERN_DEBUG "Can't get ranges for PCI-PCI bridge %s\n",
- node->full_name);
- return;
- }
}
bus = pci_add_new_bus(dev->bus, dev, busrange[0]);
}
if (simba) {
apb_fake_ranges(dev, bus, pbm);
- goto simba_cont;
+ goto after_ranges;
+ } else if (ranges == NULL) {
+ pci_cfg_fake_ranges(dev, bus, pbm);
+ goto after_ranges;
}
i = 1;
for (; len >= 32; len -= 32, ranges += 8) {
*/
pci_resource_adjust(res, root);
}
-simba_cont:
+after_ranges:
sprintf(bus->name, "PCI Bus %04x:%02x", pci_domain_nr(bus),
bus->number);
- printk(" bus name: %s\n", bus->name);
+ if (ofpci_verbose)
+ printk(" bus name: %s\n", bus->name);
pci_of_scan_bus(pbm, node, bus);
}
-static void __init pci_of_scan_bus(struct pci_pbm_info *pbm,
- struct device_node *node,
- struct pci_bus *bus)
+static void __devinit pci_of_scan_bus(struct pci_pbm_info *pbm,
+ struct device_node *node,
+ struct pci_bus *bus)
{
struct device_node *child;
const u32 *reg;
int reglen, devfn;
struct pci_dev *dev;
- printk("PCI: scan_bus[%s] bus no %d\n",
- node->full_name, bus->number);
+ if (ofpci_verbose)
+ printk("PCI: scan_bus[%s] bus no %d\n",
+ node->full_name, bus->number);
child = NULL;
while ((child = of_get_next_child(node, child)) != NULL) {
- printk(" * %s\n", child->full_name);
+ if (ofpci_verbose)
+ printk(" * %s\n", child->full_name);
reg = of_get_property(child, "reg", ®len);
if (reg == NULL || reglen < 20)
continue;
dev = of_create_pci_dev(pbm, child, bus, devfn, 0);
if (!dev)
continue;
- printk("PCI: dev header type: %x\n", dev->hdr_type);
+ if (ofpci_verbose)
+ printk("PCI: dev header type: %x\n",
+ dev->hdr_type);
if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE ||
dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
return PCIBIOS_SUCCESSFUL;
}
-struct pci_bus * __init pci_scan_one_pbm(struct pci_pbm_info *pbm)
+struct pci_bus * __devinit pci_scan_one_pbm(struct pci_pbm_info *pbm)
{
- struct pci_controller_info *p = pbm->parent;
struct device_node *node = pbm->prom_node;
struct pci_dev *host_pdev;
struct pci_bus *bus;
printk("PCI: Scanning PBM %s\n", node->full_name);
/* XXX parent device? XXX */
- bus = pci_create_bus(NULL, pbm->pci_first_busno, p->pci_ops, pbm);
+ bus = pci_create_bus(NULL, pbm->pci_first_busno, pbm->pci_ops, pbm);
if (!bus) {
printk(KERN_ERR "Failed to create bus for %s\n",
node->full_name);
static void __init pci_scan_each_controller_bus(void)
{
- struct pci_controller_info *p;
+ struct pci_pbm_info *pbm;
- for (p = pci_controller_root; p; p = p->next)
- p->scan_bus(p);
+ for (pbm = pci_pbm_root; pbm; pbm = pbm->next)
+ pbm->scan_bus(pbm);
}
extern void power_init(void);
static int __init pcibios_init(void)
{
pci_controller_probe();
- if (pci_controller_root == NULL)
+ if (pci_pbm_root == NULL)
return 0;
pci_scan_each_controller_bus();
enum pci_mmap_state mmap_state)
{
struct pci_pbm_info *pbm = pdev->dev.archdata.host_controller;
- struct pci_controller_info *p;
unsigned long space_size, user_offset, user_size;
- p = pbm->parent;
if (mmap_state == pci_mmap_io) {
space_size = (pbm->io_space.end -
pbm->io_space.start) + 1;
if (pbm == NULL || pbm->parent == NULL) {
ret = -ENXIO;
} else {
- struct pci_controller_info *p = pbm->parent;
-
- ret = p->index;
- ret = ((ret << 1) +
- ((pbm == &pbm->parent->pbm_B) ? 1 : 0));
+ ret = pbm->index;
}
return ret;
int arch_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *desc)
{
struct pci_pbm_info *pbm = pdev->dev.archdata.host_controller;
- struct pci_controller_info *p = pbm->parent;
- int virt_irq, err;
+ int virt_irq;
- if (!pbm->msi_num || !p->setup_msi_irq)
+ if (!pbm->setup_msi_irq)
return -EINVAL;
- err = p->setup_msi_irq(&virt_irq, pdev, desc);
- if (err < 0)
- return err;
-
- return virt_irq;
+ return pbm->setup_msi_irq(&virt_irq, pdev, desc);
}
void arch_teardown_msi_irq(unsigned int virt_irq)
struct msi_desc *entry = get_irq_msi(virt_irq);
struct pci_dev *pdev = entry->dev;
struct pci_pbm_info *pbm = pdev->dev.archdata.host_controller;
- struct pci_controller_info *p = pbm->parent;
- if (!pbm->msi_num || !p->setup_msi_irq)
+ if (!pbm->teardown_msi_irq)
return;
- return p->teardown_msi_irq(virt_irq, pdev);
+ return pbm->teardown_msi_irq(virt_irq, pdev);
}
#endif /* !(CONFIG_PCI_MSI) */
git.samba.org / sfrench / cifs-2.6.git / blobdiff