Merge branch 'x86/cpufeature' into irq/numa

[sfrench/cifs-2.6.git] / arch / sh / kernel / traps_64.c

diff --git a/arch/sh/kernel/traps_64.c b/arch/sh/kernel/traps_64.c
index c0b3c6f6edb52472a1180a0bb8d25b332fea4c09..a85831cbf18ba6524968f8c3e7dfa6a1bc6025d9 100644 (file)
--- a/arch/sh/kernel/traps_64.c
+++ b/arch/sh/kernel/traps_64.c
@@ -30,6 +30,7 @@
 #include <asm/atomic.h>
 #include <asm/processor.h>
 #include <asm/pgtable.h>
+#include <asm/fpu.h>
 
 #undef DEBUG_EXCEPTION
 #ifdef DEBUG_EXCEPTION
@@ -238,7 +239,7 @@ DO_ERROR(12, SIGILL,  "reserved instruction", reserved_inst, current)
 /* Called with interrupts disabled */
 asmlinkage void do_exception_error(unsigned long ex, struct pt_regs *regs)
 {
-       show_excp_regs(__FUNCTION__, -1, -1, regs);
+       show_excp_regs(__func__, -1, -1, regs);
        die_if_kernel("exception", regs, ex);
 }
 
@@ -630,7 +631,7 @@ static int misaligned_fpu_load(struct pt_regs *regs,
                                current->thread.fpu.hard.fp_regs[destreg] = buflo;
                                current->thread.fpu.hard.fp_regs[destreg+1] = bufhi;
                        } else {
-#if defined(CONFIG_LITTLE_ENDIAN)
+#if defined(CONFIG_CPU_LITTLE_ENDIAN)
                                current->thread.fpu.hard.fp_regs[destreg] = bufhi;
                                current->thread.fpu.hard.fp_regs[destreg+1] = buflo;
 #else
@@ -700,7 +701,7 @@ static int misaligned_fpu_store(struct pt_regs *regs,
                                buflo = current->thread.fpu.hard.fp_regs[srcreg];
                                bufhi = current->thread.fpu.hard.fp_regs[srcreg+1];
                        } else {
-#if defined(CONFIG_LITTLE_ENDIAN)
+#if defined(CONFIG_CPU_LITTLE_ENDIAN)
                                bufhi = current->thread.fpu.hard.fp_regs[srcreg];
                                buflo = current->thread.fpu.hard.fp_regs[srcreg+1];
 #else