Merge branch 'drm-next' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied...
[sfrench/cifs-2.6.git] / arch / sh / boards / mach-microdev / setup.c
index a9202fe3cb590b2139ecdc878e6a00b52446b70a..d1df2a4fb9b885913d38a90c49ff44f7bb0ace50 100644 (file)
 #include <mach/microdev.h>
 #include <asm/io.h>
 #include <asm/machvec.h>
-
-extern void microdev_heartbeat(void);
-
-
-/****************************************************************************/
-
-
-       /*
-        * Setup for the SMSC FDC37C93xAPM
-        */
-#define SMSC_CONFIG_PORT_ADDR   (0x3F0)
-#define SMSC_INDEX_PORT_ADDR    SMSC_CONFIG_PORT_ADDR
-#define SMSC_DATA_PORT_ADDR     (SMSC_INDEX_PORT_ADDR + 1)
-
-#define SMSC_ENTER_CONFIG_KEY   0x55
-#define SMSC_EXIT_CONFIG_KEY    0xaa
-
-#define SMCS_LOGICAL_DEV_INDEX          0x07   /* Logical Device Number */
-#define SMSC_DEVICE_ID_INDEX    0x20   /* Device ID */
-#define SMSC_DEVICE_REV_INDEX   0x21   /* Device Revision */
-#define SMSC_ACTIVATE_INDEX     0x30   /* Activate */
-#define SMSC_PRIMARY_BASE_INDEX         0x60   /* Primary Base Address */
-#define SMSC_SECONDARY_BASE_INDEX 0x62 /* Secondary Base Address */
-#define SMSC_PRIMARY_INT_INDEX  0x70   /* Primary Interrupt Select */
-#define SMSC_SECONDARY_INT_INDEX 0x72  /* Secondary Interrupt Select */
-#define SMSC_HDCS0_INDEX        0xf0   /* HDCS0 Address Decoder */
-#define SMSC_HDCS1_INDEX        0xf1   /* HDCS1 Address Decoder */
-
-#define SMSC_IDE1_DEVICE       1       /* IDE #1 logical device */
-#define SMSC_IDE2_DEVICE       2       /* IDE #2 logical device */
-#define SMSC_PARALLEL_DEVICE   3       /* Parallel Port logical device */
-#define SMSC_SERIAL1_DEVICE    4       /* Serial #1 logical device */
-#define SMSC_SERIAL2_DEVICE    5       /* Serial #2 logical device */
-#define SMSC_KEYBOARD_DEVICE   7       /* Keyboard logical device */
-#define SMSC_CONFIG_REGISTERS  8       /* Configuration Registers (Aux I/O) */
-
-#define SMSC_READ_INDEXED(index) ({ \
-       outb((index), SMSC_INDEX_PORT_ADDR); \
-       inb(SMSC_DATA_PORT_ADDR); })
-#define SMSC_WRITE_INDEXED(val, index) ({ \
-       outb((index), SMSC_INDEX_PORT_ADDR); \
-       outb((val),   SMSC_DATA_PORT_ADDR); })
-
-#define        IDE1_PRIMARY_BASE       0x01f0  /* Task File Registe base for IDE #1 */
-#define        IDE1_SECONDARY_BASE     0x03f6  /* Miscellaneous AT registers for IDE #1 */
-#define        IDE2_PRIMARY_BASE       0x0170  /* Task File Registe base for IDE #2 */
-#define        IDE2_SECONDARY_BASE     0x0376  /* Miscellaneous AT registers for IDE #2 */
-
-#define SERIAL1_PRIMARY_BASE   0x03f8
-#define SERIAL2_PRIMARY_BASE   0x02f8
-
-#define        MSB(x)          ( (x) >> 8 )
-#define        LSB(x)          ( (x) & 0xff )
-
-       /* General-Purpose base address on CPU-board FPGA */
-#define        MICRODEV_FPGA_GP_BASE           0xa6100000ul
-
-       /* assume a Keyboard Controller is present */
-int microdev_kbd_controller_present = 1;
+#include <asm/sizes.h>
 
 static struct resource smc91x_resources[] = {
        [0] = {
                .start          = 0x300,
-               .end            = 0x300 + 0x0001000 - 1,
+               .end            = 0x300 + SZ_4K - 1,
                .flags          = IORESOURCE_MEM,
        },
        [1] = {
@@ -97,7 +39,6 @@ static struct platform_device smc91x_device = {
        .resource       = smc91x_resources,
 };
 
-#ifdef CONFIG_FB_S1D13XXX
 static struct s1d13xxxfb_regval s1d13806_initregs[] = {
        { S1DREG_MISC,                  0x00 },
        { S1DREG_COM_DISP_MODE,         0x00 },
@@ -216,12 +157,12 @@ static struct s1d13xxxfb_pdata s1d13806_platform_data = {
 static struct resource s1d13806_resources[] = {
        [0] = {
                .start          = 0x07200000,
-               .end            = 0x07200000 + 0x00200000 - 1,
+               .end            = 0x07200000 + SZ_2M - 1,
                .flags          = IORESOURCE_MEM,
        },
        [1] = {
                .start          = 0x07000000,
-               .end            = 0x07000000 + 0x00200000 - 1,
+               .end            = 0x07000000 + SZ_2M - 1,
                .flags          = IORESOURCE_MEM,
        },
 };
@@ -236,145 +177,24 @@ static struct platform_device s1d13806_device = {
                .platform_data  = &s1d13806_platform_data,
        },
 };
-#endif
 
 static struct platform_device *microdev_devices[] __initdata = {
        &smc91x_device,
-#ifdef CONFIG_FB_S1D13XXX
        &s1d13806_device,
-#endif
 };
 
 static int __init microdev_devices_setup(void)
 {
        return platform_add_devices(microdev_devices, ARRAY_SIZE(microdev_devices));
 }
-
-/*
- * Setup for the SMSC FDC37C93xAPM
- */
-static int __init smsc_superio_setup(void)
-{
-
-       unsigned char devid, devrev;
-
-               /* Initially the chip is in run state */
-               /* Put it into configuration state */
-       outb(SMSC_ENTER_CONFIG_KEY, SMSC_CONFIG_PORT_ADDR);
-
-               /* Read device ID info */
-       devid  = SMSC_READ_INDEXED(SMSC_DEVICE_ID_INDEX);
-       devrev = SMSC_READ_INDEXED(SMSC_DEVICE_REV_INDEX);
-       if ( (devid==0x30) && (devrev==0x01) )
-       {
-               printk("SMSC FDC37C93xAPM SuperIO device detected\n");
-       }
-       else
-       {               /* not the device identity we expected */
-               printk("Not detected a SMSC FDC37C93xAPM SuperIO device (devid=0x%02x, rev=0x%02x)\n",
-                       devid, devrev);
-                       /* inform the keyboard driver that we have no keyboard controller */
-               microdev_kbd_controller_present = 0;
-                       /* little point in doing anything else in this functon */
-               return 0;
-       }
-
-               /* Select the keyboard device */
-       SMSC_WRITE_INDEXED(SMSC_KEYBOARD_DEVICE, SMCS_LOGICAL_DEV_INDEX);
-               /* enable it */
-       SMSC_WRITE_INDEXED(1, SMSC_ACTIVATE_INDEX);
-               /* enable the interrupts */
-       SMSC_WRITE_INDEXED(MICRODEV_FPGA_IRQ_KEYBOARD, SMSC_PRIMARY_INT_INDEX);
-       SMSC_WRITE_INDEXED(MICRODEV_FPGA_IRQ_MOUSE, SMSC_SECONDARY_INT_INDEX);
-
-               /* Select the Serial #1 device */
-       SMSC_WRITE_INDEXED(SMSC_SERIAL1_DEVICE, SMCS_LOGICAL_DEV_INDEX);
-               /* enable it */
-       SMSC_WRITE_INDEXED(1, SMSC_ACTIVATE_INDEX);
-               /* program with port addresses */
-       SMSC_WRITE_INDEXED(MSB(SERIAL1_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+0);
-       SMSC_WRITE_INDEXED(LSB(SERIAL1_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+1);
-       SMSC_WRITE_INDEXED(0x00, SMSC_HDCS0_INDEX);
-               /* enable the interrupts */
-       SMSC_WRITE_INDEXED(MICRODEV_FPGA_IRQ_SERIAL1, SMSC_PRIMARY_INT_INDEX);
-
-               /* Select the Serial #2 device */
-       SMSC_WRITE_INDEXED(SMSC_SERIAL2_DEVICE, SMCS_LOGICAL_DEV_INDEX);
-               /* enable it */
-       SMSC_WRITE_INDEXED(1, SMSC_ACTIVATE_INDEX);
-               /* program with port addresses */
-       SMSC_WRITE_INDEXED(MSB(SERIAL2_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+0);
-       SMSC_WRITE_INDEXED(LSB(SERIAL2_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+1);
-       SMSC_WRITE_INDEXED(0x00, SMSC_HDCS0_INDEX);
-               /* enable the interrupts */
-       SMSC_WRITE_INDEXED(MICRODEV_FPGA_IRQ_SERIAL2, SMSC_PRIMARY_INT_INDEX);
-
-               /* Select the IDE#1 device */
-       SMSC_WRITE_INDEXED(SMSC_IDE1_DEVICE, SMCS_LOGICAL_DEV_INDEX);
-               /* enable it */
-       SMSC_WRITE_INDEXED(1, SMSC_ACTIVATE_INDEX);
-               /* program with port addresses */
-       SMSC_WRITE_INDEXED(MSB(IDE1_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+0);
-       SMSC_WRITE_INDEXED(LSB(IDE1_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+1);
-       SMSC_WRITE_INDEXED(MSB(IDE1_SECONDARY_BASE), SMSC_SECONDARY_BASE_INDEX+0);
-       SMSC_WRITE_INDEXED(LSB(IDE1_SECONDARY_BASE), SMSC_SECONDARY_BASE_INDEX+1);
-       SMSC_WRITE_INDEXED(0x0c, SMSC_HDCS0_INDEX);
-       SMSC_WRITE_INDEXED(0x00, SMSC_HDCS1_INDEX);
-               /* select the interrupt */
-       SMSC_WRITE_INDEXED(MICRODEV_FPGA_IRQ_IDE1, SMSC_PRIMARY_INT_INDEX);
-
-               /* Select the IDE#2 device */
-       SMSC_WRITE_INDEXED(SMSC_IDE2_DEVICE, SMCS_LOGICAL_DEV_INDEX);
-               /* enable it */
-       SMSC_WRITE_INDEXED(1, SMSC_ACTIVATE_INDEX);
-               /* program with port addresses */
-       SMSC_WRITE_INDEXED(MSB(IDE2_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+0);
-       SMSC_WRITE_INDEXED(LSB(IDE2_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+1);
-       SMSC_WRITE_INDEXED(MSB(IDE2_SECONDARY_BASE), SMSC_SECONDARY_BASE_INDEX+0);
-       SMSC_WRITE_INDEXED(LSB(IDE2_SECONDARY_BASE), SMSC_SECONDARY_BASE_INDEX+1);
-               /* select the interrupt */
-       SMSC_WRITE_INDEXED(MICRODEV_FPGA_IRQ_IDE2, SMSC_PRIMARY_INT_INDEX);
-
-               /* Select the configuration registers */
-       SMSC_WRITE_INDEXED(SMSC_CONFIG_REGISTERS, SMCS_LOGICAL_DEV_INDEX);
-               /* enable the appropriate GPIO pins for IDE functionality:
-                * bit[0]   In/Out              1==input;  0==output
-                * bit[1]   Polarity            1==invert; 0==no invert
-                * bit[2]   Int Enb #1          1==Enable Combined IRQ #1; 0==disable
-                * bit[3:4] Function Select     00==original; 01==Alternate Function #1
-                */
-       SMSC_WRITE_INDEXED(0x00, 0xc2); /* GP42 = nIDE1_OE */
-       SMSC_WRITE_INDEXED(0x01, 0xc5); /* GP45 = IDE1_IRQ */
-       SMSC_WRITE_INDEXED(0x00, 0xc6); /* GP46 = nIOROP */
-       SMSC_WRITE_INDEXED(0x00, 0xc7); /* GP47 = nIOWOP */
-       SMSC_WRITE_INDEXED(0x08, 0xe8); /* GP20 = nIDE2_OE */
-
-               /* Exit the configuration state */
-       outb(SMSC_EXIT_CONFIG_KEY, SMSC_CONFIG_PORT_ADDR);
-
-       return 0;
-}
-
-static void __init microdev_setup(char **cmdline_p)
-{
-       int * const fpgaRevisionRegister = (int*)(MICRODEV_FPGA_GP_BASE + 0x8ul);
-       const int fpgaRevision = *fpgaRevisionRegister;
-       int * const CacheControlRegister = (int*)CCR;
-
-       device_initcall(microdev_devices_setup);
-       device_initcall(smsc_superio_setup);
-
-       printk("SuperH %s board (FPGA rev: 0x%0x, CCR: 0x%0x)\n",
-               get_system_type(), fpgaRevision, *CacheControlRegister);
-}
+device_initcall(microdev_devices_setup);
 
 /*
  * The Machine Vector
  */
 static struct sh_machine_vector mv_sh4202_microdev __initmv = {
        .mv_name                = "SH4-202 MicroDev",
-       .mv_setup               = microdev_setup,
-       .mv_nr_irqs             = 72,           /* QQQ need to check this - use the MACRO */
+       .mv_nr_irqs             = 72,
 
        .mv_inb                 = microdev_inb,
        .mv_inw                 = microdev_inw,
@@ -398,8 +218,4 @@ static struct sh_machine_vector mv_sh4202_microdev __initmv = {
        .mv_outsl               = microdev_outsl,
 
        .mv_init_irq            = init_microdev_irq,
-
-#ifdef CONFIG_HEARTBEAT
-       .mv_heartbeat           = microdev_heartbeat,
-#endif
 };