RISC-V: SMP cleanup and new features

[sfrench/cifs-2.6.git] / arch / riscv / kernel / setup.c

diff --git a/arch/riscv/kernel/setup.c b/arch/riscv/kernel/setup.c
index c9461985db7e753bb67da682453ca72163e6b3ed..2c290e6aaa6e414a965d7acc97604a26f75e7548 100644 (file)
--- a/arch/riscv/kernel/setup.c
+++ b/arch/riscv/kernel/setup.c
@@ -81,6 +81,16 @@ EXPORT_SYMBOL(empty_zero_page);
 
 /* The lucky hart to first increment this variable will boot the other cores */
 atomic_t hart_lottery;
+unsigned long boot_cpu_hartid;
+
+unsigned long __cpuid_to_hartid_map[NR_CPUS] = {
+       [0 ... NR_CPUS-1] = INVALID_HARTID
+};
+
+void __init smp_setup_processor_id(void)
+{
+       cpuid_to_hartid_map(0) = boot_cpu_hartid;
+}
 
 #ifdef CONFIG_BLK_DEV_INITRD
 static void __init setup_initrd(void)